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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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| 1 | 2 | /* |
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| 2 | 3 | * Copyright Altera Corporation (C) 2015. All rights reserved. |
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| 3 | | - * |
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| 4 | | - * This program is free software; you can redistribute it and/or modify |
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| 5 | | - * it under the terms and conditions of the GNU General Public License, |
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| 6 | | - * version 2, as published by the Free Software Foundation. |
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| 7 | | - * |
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| 8 | | - * This program is distributed in the hope it will be useful, but WITHOUT |
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| 9 | | - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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| 10 | | - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
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| 11 | | - * more details. |
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| 12 | | - * |
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| 13 | | - * You should have received a copy of the GNU General Public License along with |
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| 14 | | - * this program. If not, see <http://www.gnu.org/licenses/>. |
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| 15 | 4 | */ |
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| 16 | 5 | |
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| 17 | 6 | #include "socfpga_stratix10.dtsi" |
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| .. | .. |
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| 21 | 10 | |
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| 22 | 11 | aliases { |
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| 23 | 12 | serial0 = &uart0; |
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| 13 | + ethernet0 = &gmac0; |
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| 14 | + ethernet1 = &gmac1; |
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| 15 | + ethernet2 = &gmac2; |
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| 24 | 16 | }; |
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| 25 | 17 | |
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| 26 | 18 | chosen { |
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| .. | .. |
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| 64 | 56 | clock-frequency = <25000000>; |
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| 65 | 57 | }; |
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| 66 | 58 | }; |
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| 59 | + |
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| 60 | + eccmgr { |
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| 61 | + sdmmca-ecc@ff8c8c00 { |
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| 62 | + compatible = "altr,socfpga-s10-sdmmc-ecc", |
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| 63 | + "altr,socfpga-sdmmc-ecc"; |
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| 64 | + reg = <0xff8c8c00 0x100>; |
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| 65 | + altr,ecc-parent = <&mmc>; |
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| 66 | + interrupts = <14 4>, |
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| 67 | + <15 4>; |
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| 68 | + }; |
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| 69 | + }; |
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| 67 | 70 | }; |
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| 68 | 71 | }; |
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| 69 | 72 | |
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| .. | .. |
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| 104 | 107 | &mmc { |
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| 105 | 108 | status = "okay"; |
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| 106 | 109 | cap-sd-highspeed; |
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| 110 | + cap-mmc-highspeed; |
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| 107 | 111 | broken-cd; |
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| 108 | 112 | bus-width = <4>; |
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| 109 | 113 | }; |
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| .. | .. |
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| 125 | 129 | status = "okay"; |
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| 126 | 130 | clock-frequency = <100000>; |
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| 127 | 131 | i2c-sda-falling-time-ns = <890>; /* hcnt */ |
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| 128 | | - i2c-sdl-falling-time-ns = <890>; /* lcnt */ |
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| 132 | + i2c-scl-falling-time-ns = <890>; /* lcnt */ |
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| 129 | 133 | |
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| 130 | 134 | adc@14 { |
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| 131 | 135 | compatible = "lltc,ltc2497"; |
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| .. | .. |
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| 155 | 159 | flash@0 { |
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| 156 | 160 | #address-cells = <1>; |
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| 157 | 161 | #size-cells = <1>; |
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| 158 | | - compatible = "n25q00a"; |
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| 162 | + compatible = "micron,mt25qu02g", "jedec,spi-nor"; |
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| 159 | 163 | reg = <0>; |
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| 160 | | - spi-max-frequency = <50000000>; |
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| 164 | + spi-max-frequency = <100000000>; |
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| 161 | 165 | |
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| 162 | 166 | m25p,fast-read; |
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| 163 | 167 | cdns,page-size = <256>; |
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| .. | .. |
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| 175 | 179 | |
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| 176 | 180 | qspi_boot: partition@0 { |
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| 177 | 181 | label = "Boot and fpga data"; |
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| 178 | | - reg = <0x0 0x4000000>; |
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| 182 | + reg = <0x0 0x03FE0000>; |
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| 179 | 183 | }; |
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| 180 | 184 | |
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| 181 | | - qspi_rootfs: partition@4000000 { |
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| 185 | + qspi_rootfs: partition@3FE0000 { |
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| 182 | 186 | label = "Root Filesystem - JFFS2"; |
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| 183 | | - reg = <0x4000000 0x4000000>; |
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| 187 | + reg = <0x03FE0000 0x0C020000>; |
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| 184 | 188 | }; |
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| 185 | 189 | }; |
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| 186 | 190 | }; |
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