| .. | .. |
|---|
| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
|---|
| 1 | 2 | /* |
|---|
| 2 | | - * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ |
|---|
| 3 | | - * |
|---|
| 4 | | - * This program is free software; you can redistribute it and/or modify |
|---|
| 5 | | - * it under the terms of the GNU General Public License version 2 as |
|---|
| 6 | | - * published by the Free Software Foundation. |
|---|
| 3 | + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ |
|---|
| 7 | 4 | */ |
|---|
| 8 | 5 | /dts-v1/; |
|---|
| 9 | 6 | |
|---|
| .. | .. |
|---|
| 32 | 29 | &am33xx_pinmux { |
|---|
| 33 | 30 | bt_pins: pinmux_bt_pins { |
|---|
| 34 | 31 | pinctrl-single,pins = < |
|---|
| 35 | | - AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gmii1_txd0.gpio0_28 - BT_EN */ |
|---|
| 32 | + AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gmii1_txd0.gpio0_28 - BT_EN */ |
|---|
| 36 | 33 | >; |
|---|
| 37 | 34 | }; |
|---|
| 38 | 35 | |
|---|
| 39 | 36 | mmc3_pins: pinmux_mmc3_pins { |
|---|
| 40 | 37 | pinctrl-single,pins = < |
|---|
| 41 | | - AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE6 ) /* (L15) gmii1_rxd1.mmc2_clk */ |
|---|
| 42 | | - AM33XX_IOPAD(0x914, PIN_INPUT_PULLUP | MUX_MODE6 ) /* (J16) gmii1_txen.mmc2_cmd */ |
|---|
| 43 | | - AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE5 ) /* (J17) gmii1_rxdv.mmc2_dat0 */ |
|---|
| 44 | | - AM33XX_IOPAD(0x91c, PIN_INPUT_PULLUP | MUX_MODE5 ) /* (J18) gmii1_txd3.mmc2_dat1 */ |
|---|
| 45 | | - AM33XX_IOPAD(0x920, PIN_INPUT_PULLUP | MUX_MODE5 ) /* (K15) gmii1_txd2.mmc2_dat2 */ |
|---|
| 46 | | - AM33XX_IOPAD(0x908, PIN_INPUT_PULLUP | MUX_MODE5 ) /* (H16) gmii1_col.mmc2_dat3 */ |
|---|
| 38 | + AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE6 ) /* (L15) gmii1_rxd1.mmc2_clk */ |
|---|
| 39 | + AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLUP, MUX_MODE6 ) /* (J16) gmii1_txen.mmc2_cmd */ |
|---|
| 40 | + AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLUP, MUX_MODE5 ) /* (J17) gmii1_rxdv.mmc2_dat0 */ |
|---|
| 41 | + AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLUP, MUX_MODE5 ) /* (J18) gmii1_txd3.mmc2_dat1 */ |
|---|
| 42 | + AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLUP, MUX_MODE5 ) /* (K15) gmii1_txd2.mmc2_dat2 */ |
|---|
| 43 | + AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLUP, MUX_MODE5 ) /* (H16) gmii1_col.mmc2_dat3 */ |
|---|
| 47 | 44 | >; |
|---|
| 48 | 45 | }; |
|---|
| 49 | 46 | |
|---|
| 50 | 47 | uart3_pins: pinmux_uart3_pins { |
|---|
| 51 | 48 | pinctrl-single,pins = < |
|---|
| 52 | | - AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE1) /* gmii1_rxd3.uart3_rxd */ |
|---|
| 53 | | - AM33XX_IOPAD(0x938, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gmii1_rxd2.uart3_txd */ |
|---|
| 54 | | - AM33XX_IOPAD(0x948, PIN_INPUT | MUX_MODE3) /* mdio_data.uart3_ctsn */ |
|---|
| 55 | | - AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* mdio_clk.uart3_rtsn */ |
|---|
| 49 | + AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gmii1_rxd3.uart3_rxd */ |
|---|
| 50 | + AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* gmii1_rxd2.uart3_txd */ |
|---|
| 51 | + AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT, MUX_MODE3) /* mdio_data.uart3_ctsn */ |
|---|
| 52 | + AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* mdio_clk.uart3_rtsn */ |
|---|
| 56 | 53 | >; |
|---|
| 57 | 54 | }; |
|---|
| 58 | 55 | |
|---|
| 59 | 56 | wl18xx_pins: pinmux_wl18xx_pins { |
|---|
| 60 | 57 | pinctrl-single,pins = < |
|---|
| 61 | | - AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gmii1_txclk.gpio3_9 WL_EN */ |
|---|
| 62 | | - AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_refclk.gpio0_29 WL_IRQ */ |
|---|
| 63 | | - AM33XX_IOPAD(0x930, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gmii1_rxclk.gpio3_10 LS_BUF_EN */ |
|---|
| 58 | + AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gmii1_txclk.gpio3_9 WL_EN */ |
|---|
| 59 | + AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) /* rmii1_refclk.gpio0_29 WL_IRQ */ |
|---|
| 60 | + AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gmii1_rxclk.gpio3_10 LS_BUF_EN */ |
|---|
| 64 | 61 | >; |
|---|
| 65 | 62 | }; |
|---|
| 66 | 63 | }; |
|---|
| .. | .. |
|---|
| 78 | 75 | bus-width = <4>; |
|---|
| 79 | 76 | non-removable; |
|---|
| 80 | 77 | cap-power-off-card; |
|---|
| 81 | | - ti,needs-special-hs-handling; |
|---|
| 82 | 78 | keep-power-in-suspend; |
|---|
| 83 | 79 | pinctrl-names = "default"; |
|---|
| 84 | 80 | pinctrl-0 = <&mmc3_pins &wl18xx_pins>; |
|---|