| .. | .. |
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| 10 | 10 | "fsl,imx6sx-usb" |
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| 11 | 11 | "fsl,imx6ul-usb" |
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| 12 | 12 | "fsl,imx7d-usb" |
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| 13 | + "fsl,imx7ulp-usb" |
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| 13 | 14 | "lsi,zevio-usb" |
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| 14 | 15 | "qcom,ci-hdrc" |
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| 15 | 16 | "chipidea,usb2" |
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| 16 | 17 | "xlnx,zynq-usb-2.20a" |
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| 18 | + "nvidia,tegra20-udc" |
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| 19 | + "nvidia,tegra30-udc" |
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| 20 | + "nvidia,tegra114-udc" |
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| 21 | + "nvidia,tegra124-udc" |
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| 17 | 22 | - reg: base address and length of the registers |
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| 18 | 23 | - interrupts: interrupt for the USB controller |
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| 19 | 24 | |
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| .. | .. |
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| 80 | 85 | controller. It's expected that a mux state of 0 indicates device mode and a |
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| 81 | 86 | mux state of 1 indicates host mode. |
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| 82 | 87 | - mux-control-names: Shall be "usb_switch" if mux-controls is specified. |
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| 88 | +- pinctrl-names: Names for optional pin modes in "default", "host", "device". |
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| 89 | + In case of HSIC-mode, "idle" and "active" pin modes are mandatory. In this |
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| 90 | + case, the "idle" state needs to pull down the data and strobe pin |
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| 91 | + and the "active" state needs to pull up the strobe pin. |
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| 92 | +- pinctrl-n: alternate pin modes |
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| 83 | 93 | |
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| 84 | 94 | i.mx specific properties |
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| 85 | 95 | - fsl,usbmisc: phandler of non-core register device, with one |
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| 86 | 96 | argument that indicate usb controller index |
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| 87 | 97 | - disable-over-current: disable over current detect |
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| 88 | | -- over-current-active-high: over current signal polarity is high active, |
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| 89 | | - typically over current signal polarity is low active. |
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| 98 | +- over-current-active-low: over current signal polarity is active low. |
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| 99 | +- over-current-active-high: over current signal polarity is active high. |
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| 100 | + It's recommended to specify the over current polarity. |
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| 101 | +- power-active-high: power signal polarity is active high |
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| 90 | 102 | - external-vbus-divider: enables off-chip resistor divider for Vbus |
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| 103 | +- samsung,picophy-pre-emp-curr-control: HS Transmitter Pre-Emphasis Current |
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| 104 | + Control. This signal controls the amount of current sourced to the |
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| 105 | + USB_OTG*_DP and USB_OTG*_DN pins after a J-to-K or K-to-J transition. |
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| 106 | + The range is from 0x0 to 0x3, the default value is 0x1. |
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| 107 | + Details can refer to TXPREEMPAMPTUNE0 bits of USBNC_n_PHY_CFG1. |
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| 108 | +- samsung,picophy-dc-vol-level-adjust: HS DC Voltage Level Adjustment. |
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| 109 | + Adjust the high-speed transmitter DC level voltage. |
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| 110 | + The range is from 0x0 to 0xf, the default value is 0x3. |
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| 111 | + Details can refer to TXVREFTUNE0 bits of USBNC_n_PHY_CFG1. |
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| 91 | 112 | |
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| 92 | 113 | Example: |
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| 93 | 114 | |
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| .. | .. |
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| 109 | 130 | mux-controls = <&usb_switch>; |
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| 110 | 131 | mux-control-names = "usb_switch"; |
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| 111 | 132 | }; |
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| 133 | + |
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| 134 | +Example for HSIC: |
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| 135 | + |
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| 136 | + usb@2184400 { |
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| 137 | + compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; |
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| 138 | + reg = <0x02184400 0x200>; |
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| 139 | + interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>; |
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| 140 | + clocks = <&clks IMX6QDL_CLK_USBOH3>; |
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| 141 | + fsl,usbphy = <&usbphynop1>; |
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| 142 | + fsl,usbmisc = <&usbmisc 2>; |
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| 143 | + phy_type = "hsic"; |
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| 144 | + dr_mode = "host"; |
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| 145 | + ahb-burst-config = <0x0>; |
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| 146 | + tx-burst-size-dword = <0x10>; |
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| 147 | + rx-burst-size-dword = <0x10>; |
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| 148 | + pinctrl-names = "idle", "active"; |
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| 149 | + pinctrl-0 = <&pinctrl_usbh2_idle>; |
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| 150 | + pinctrl-1 = <&pinctrl_usbh2_active>; |
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| 151 | + #address-cells = <1>; |
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| 152 | + #size-cells = <0>; |
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| 153 | + |
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| 154 | + usbnet: smsc@1 { |
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| 155 | + compatible = "usb424,9730"; |
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| 156 | + reg = <1>; |
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| 157 | + }; |
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| 158 | + }; |
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