~hc/RK356X_SDK_RELEASE.git

..	..	@@ -5,7 +5,7 @@
5	5
6	6	Required properites:
7	7	- reg : Offset and length of the register set of the RCPM block.
8		- - fsl,#rcpm-wakeup-cells : The number of IPPDEXPCR register cells in the
	8	+ - #fsl,rcpm-wakeup-cells : The number of IPPDEXPCR register cells in the
9	9	fsl,rcpm-wakeup property.
10	10	- compatible : Must contain a chip-specific RCPM block compatible string
11	11	and (if applicable) may contain a chassis-version RCPM compatible
..	..	@@ -20,6 +20,7 @@
20	20	* "fsl,qoriq-rcpm-1.0": for chassis 1.0 rcpm
21	21	* "fsl,qoriq-rcpm-2.0": for chassis 2.0 rcpm
22	22	* "fsl,qoriq-rcpm-2.1": for chassis 2.1 rcpm
	23	+ * "fsl,qoriq-rcpm-2.1+": for chassis 2.1+ rcpm
23	24
24	25	All references to "1.0" and "2.0" refer to the QorIQ chassis version to
25	26	which the chip complies.
..	..	@@ -27,14 +28,19 @@
27	28	--------------- -------------------------------
28	29	1.0 p4080, p5020, p5040, p2041, p3041
29	30	2.0 t4240, b4860, b4420
30		-2.1 t1040, ls1021
	31	+2.1 t1040,
	32	+2.1+ ls1021a, ls1012a, ls1043a, ls1046a
	33	+
	34	+Optional properties:
	35	+ - little-endian : RCPM register block is Little Endian. Without it RCPM
	36	+ will be Big Endian (default case).
31	37
32	38	Example:
33	39	The RCPM node for T4240:
34	40	rcpm: global-utilities@e2000 {
35	41	compatible = "fsl,t4240-rcpm", "fsl,qoriq-rcpm-2.0";
36	42	reg = <0xe2000 0x1000>;
37		- fsl,#rcpm-wakeup-cells = <2>;
	43	+ #fsl,rcpm-wakeup-cells = <2>;
38	44	};
39	45
40	46	* Freescale RCPM Wakeup Source Device Tree Bindings
..	..	@@ -44,7 +50,7 @@
44	50
45	51	- fsl,rcpm-wakeup: Consists of a phandle to the rcpm node and the IPPDEXPCR
46	52	register cells. The number of IPPDEXPCR register cells is defined in
47		- "fsl,#rcpm-wakeup-cells" in the rcpm node. The first register cell is
	53	+ "#fsl,rcpm-wakeup-cells" in the rcpm node. The first register cell is
48	54	the bit mask that should be set in IPPDEXPCR0, and the second register
49	55	cell is for IPPDEXPCR1, and so on.
50	56