~hc/RK356X_SDK_RELEASE.git

..	..	@@ -19,7 +19,7 @@
19	19
20	20	Required properties for iomux controller:
21	21	- compatible: "atmel,at91rm9200-pinctrl" or "atmel,at91sam9x5-pinctrl"
22		- or "atmel,sama5d3-pinctrl"
	22	+ or "atmel,sama5d3-pinctrl" or "microchip,sam9x60-pinctrl"
23	23	- atmel,mux-mask: array of mask (periph per bank) to describe if a pin can be
24	24	configured in this periph mode. All the periph and bank need to be describe.
25	25
..	..	@@ -38,7 +38,7 @@
38	38	0xffffffff 0x7fff3ccf /* pioB */
39	39	0xffffffff 0x007fffff /* pioC */
40	40
41		-For each peripheral/bank we will descibe in a u32 if a pin can be
	41	+For each peripheral/bank we will describe in a u32 if a pin can be
42	42	configured in it by putting 1 to the pin bit (1 << pin)
43	43
44	44	Let's take the pioA on peripheral B
..	..	@@ -100,6 +100,7 @@
100	100	11 - High
101	101	OUTPUT (1 << 7): indicate this pin need to be configured as an output.
102	102	OUTPUT_VAL (1 << 8): output val (1 = high, 0 = low)
	103	+SLEWRATE (1 << 9): slew rate of the pin: 0 = disable, 1 = enable
103	104	DEBOUNCE (1 << 16): indicate this pin needs debounce.
104	105	DEBOUNCE_VAL (0x3fff << 17): debounce value.
105	106
..	..	@@ -116,6 +117,19 @@
116	117	configurations by referring to the phandle of that pin configuration node.
117	118	4. The gpio controller must be describe in the pinctrl simple-bus.
118	119
	120	+For each bank the required properties are:
	121	+- compatible: "atmel,at91sam9x5-gpio" or "atmel,at91rm9200-gpio" or
	122	+ "microchip,sam9x60-gpio"
	123	+- reg: physical base address and length of the controller's registers
	124	+- interrupts: interrupt outputs from the controller
	125	+- interrupt-controller: marks the device node as an interrupt controller
	126	+- #interrupt-cells: should be 2; refer to ../interrupt-controller/interrupts.txt
	127	+ for more details.
	128	+- gpio-controller
	129	+- #gpio-cells: should be 2; the first cell is the GPIO number and the second
	130	+ cell specifies GPIO flags as defined in <dt-bindings/gpio/gpio.h>.
	131	+- clocks: bank clock
	132	+
119	133	Examples:
120	134
121	135	pinctrl@fffff400 {
..	..	@@ -125,6 +139,17 @@
125	139	compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
126	140	reg = <0xfffff400 0x600>;
127	141
	142	+ pioA: gpio@fffff400 {
	143	+ compatible = "atmel,at91sam9x5-gpio";
	144	+ reg = <0xfffff400 0x200>;
	145	+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
	146	+ #gpio-cells = <2>;
	147	+ gpio-controller;
	148	+ interrupt-controller;
	149	+ #interrupt-cells = <2>;
	150	+ clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
	151	+ };
	152	+
128	153	atmel,mux-mask = <
129	154	/* A B */
130	155	0xffffffff 0xffc00c3b /* pioA */