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| 410 | 410 | The settings and programming routines for internal/external |
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| 411 | 411 | MDIO are different. Must be included for internal MDIO. |
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| 412 | 412 | |
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| 413 | +- fsl,erratum-a011043 |
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| 414 | + Usage: optional |
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| 415 | + Value type: <boolean> |
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| 416 | + Definition: Indicates the presence of the A011043 erratum |
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| 417 | + describing that the MDIO_CFG[MDIO_RD_ER] bit may be falsely |
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| 418 | + set when reading internal PCS registers. MDIO reads to |
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| 419 | + internal PCS registers may result in having the |
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| 420 | + MDIO_CFG[MDIO_RD_ER] bit set, even when there is no error and |
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| 421 | + read data (MDIO_DATA[MDIO_DATA]) is correct. |
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| 422 | + Software may get false read error when reading internal |
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| 423 | + PCS registers through MDIO. As a workaround, all internal |
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| 424 | + MDIO accesses should ignore the MDIO_CFG[MDIO_RD_ER] bit. |
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| 425 | + |
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| 413 | 426 | For internal PHY device on internal mdio bus, a PHY node should be created. |
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| 414 | 427 | See the definition of the PHY node in booting-without-of.txt for an |
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| 415 | 428 | example of how to define a PHY (Internal PHY has no interrupt line). |
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