修改4g拨号为QMI,需要在系统里后台执行quectel-CM

hc

2024-10-22 8ac6c7a54ed1b98d142dce24b11c6de6a1e239a5

 kernel/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
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@@ -20,6 +20,8 @@
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                      "brcm,brcmnand" and an appropriate version compatibility
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                      string, like "brcm,brcmnand-v7.0"
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                      Possible values:
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+                         brcm,brcmnand-v2.1
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+                         brcm,brcmnand-v2.2
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                          brcm,brcmnand-v4.0
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                          brcm,brcmnand-v5.0
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                          brcm,brcmnand-v6.0
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@@ -28,17 +30,18 @@
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                          brcm,brcmnand-v7.0
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                          brcm,brcmnand-v7.1
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                          brcm,brcmnand-v7.2
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+                         brcm,brcmnand-v7.3
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                          brcm,brcmnand
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 - reg              : the register start and length for NAND register region.
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                      (optional) Flash DMA register range (if present)
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                      (optional) NAND flash cache range (if at non-standard offset)
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 - reg-names        : a list of the names corresponding to the previous register
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                      ranges. Should contain "nand" and (optionally)
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-                     "flash-dma" and/or "nand-cache".
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-- interrupts       : The NAND CTLRDY interrupt and (if Flash DMA is available)
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-                     FLASH_DMA_DONE
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-- interrupt-names  : May be "nand_ctlrdy" or "flash_dma_done", if broken out as
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-                     individual interrupts.
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+                     "flash-dma" or "flash-edu" and/or "nand-cache".
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+- interrupts       : The NAND CTLRDY interrupt, (if Flash DMA is available)
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+                     FLASH_DMA_DONE and if EDU is avaialble and used FLASH_EDU_DONE
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+- interrupt-names  : May be "nand_ctlrdy" or "flash_dma_done" or "flash_edu_done",
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+                     if broken out as individual interrupts.
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                      May be "nand", if the SoC has the individual NAND
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                      interrupts multiplexed behind another custom piece of
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                      hardware
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@@ -101,12 +104,12 @@
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                               number (e.g., 0, 1, 2, etc.)
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 - #address-cells            : see partition.txt
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 - #size-cells               : see partition.txt
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-- nand-ecc-strength         : see nand.txt
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-- nand-ecc-step-size        : must be 512 or 1024. See nand.txt
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 Optional properties:
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+- nand-ecc-strength         : see nand-controller.yaml
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+- nand-ecc-step-size        : must be 512 or 1024. See nand-controller.yaml
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 - nand-on-flash-bbt         : boolean, to enable the on-flash BBT for this
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-                              chip-select. See nand.txt
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+                              chip-select. See nand-controller.yaml
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 - brcm,nand-oob-sector-size : integer, to denote the spare area sector size
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                               expected for the ECC layout in use. This size, in
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                               addition to the strength and step-size,