forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-10-22 8ac6c7a54ed1b98d142dce24b11c6de6a1e239a5
kernel/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt
....@@ -17,13 +17,17 @@
1717 - compatible:
1818 Usage: required
1919 Value type: <string>
20
- Definition: Should contain "qcom,<soc>-pdc"
20
+ Definition: Should contain "qcom,<soc>-pdc" and "qcom,pdc"
21
+ - "qcom,sc7180-pdc": For SC7180
2122 - "qcom,sdm845-pdc": For SDM845
2223
2324 - reg:
2425 Usage: required
2526 Value type: <prop-encoded-array>
2627 Definition: Specifies the base physical address for PDC hardware.
28
+ Optionally, specify the PDC's GIC interface registers that
29
+ need to be configured for wakeup capable GPIOs routed to
30
+ the PDC.
2731
2832 - interrupt-cells:
2933 Usage: required
....@@ -50,15 +54,23 @@
5054 The second element is the GIC hwirq number for the PDC port.
5155 The third element is the number of interrupts in sequence.
5256
57
+- qcom,scm-spi-cfg:
58
+ Usage: optional
59
+ Value type: <bool>
60
+ Definition: Specifies if the SPI configuration registers have to be
61
+ written from the firmware. Sometimes the PDC interface
62
+ register to the GIC can only be written from the firmware.
63
+
5364 Example:
5465
5566 pdc: interrupt-controller@b220000 {
5667 compatible = "qcom,sdm845-pdc";
57
- reg = <0xb220000 0x30000>;
68
+ reg = <0 0x0b220000 0 0x30000>, <0 0x179900f0 0 0x60>;
5869 qcom,pdc-ranges = <0 512 94>, <94 641 15>, <115 662 7>;
5970 #interrupt-cells = <2>;
6071 interrupt-parent = <&intc>;
6172 interrupt-controller;
73
+ qcom,scm-spi-cfg;
6274 };
6375
6476 DT binding of a device that wants to use the GIC SPI 514 as a wakeup