| .. | .. |
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| 35 | 35 | Due to above changes, Tegra114 I2C driver makes incompatible with |
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| 36 | 36 | previous hardware driver. Hence, tegra114 I2C controller is compatible |
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| 37 | 37 | with "nvidia,tegra114-i2c". |
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| 38 | + nvidia,tegra210-i2c-vi: Tegra210 has one I2C controller that is on host1x bus |
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| 39 | + and is part of VE power domain and typically used for camera use-cases. |
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| 40 | + This VI I2C controller is mostly compatible with the programming model |
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| 41 | + of the regular I2C controllers with a few exceptions. The I2C registers |
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| 42 | + start at an offset of 0xc00 (instead of 0), registers are 16 bytes |
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| 43 | + apart (rather than 4) and the controller does not support slave mode. |
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| 38 | 44 | - reg: Should contain I2C controller registers physical address and length. |
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| 39 | 45 | - interrupts: Should contain I2C controller interrupts. |
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| 40 | 46 | - address-cells: Address cells for I2C device address. |
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| .. | .. |
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| 47 | 53 | - fast-clk |
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| 48 | 54 | Tegra114: |
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| 49 | 55 | - div-clk |
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| 56 | + Tegra210: |
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| 57 | + - div-clk |
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| 58 | + - slow (only for nvidia,tegra210-i2c-vi compatible node) |
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| 50 | 59 | - resets: Must contain an entry for each entry in reset-names. |
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| 51 | 60 | See ../reset/reset.txt for details. |
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| 52 | 61 | - reset-names: Must include the following entries: |
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| 53 | 62 | - i2c |
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| 63 | +- power-domains: Only for nvidia,tegra210-i2c-vi compatible node and must |
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| 64 | + include venc powergate node as vi i2c is part of VE power domain. |
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| 65 | + tegra210-i2c-vi: |
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| 66 | + - pd_venc |
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| 54 | 67 | - dmas: Must contain an entry for each entry in clock-names. |
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| 55 | 68 | See ../dma/dma.txt for details. |
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| 56 | 69 | - dma-names: Must include the following entries: |
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