~hc/RK356X_SDK_RELEASE.git

..	..	@@ -8,7 +8,7 @@
8	8
9	9	MDSS:
10	10	Required properties:
11		-- compatible: "qcom,sdm845-mdss"
	11	+- compatible: "qcom,sdm845-mdss", "qcom,sc7180-mdss"
12	12	- reg: physical base address and length of contoller's registers.
13	13	- reg-names: register region names. The following region is required:
14	14	* "mdss"
..	..	@@ -28,6 +28,11 @@
28	28	- #address-cells: number of address cells for the MDSS children. Should be 1.
29	29	- #size-cells: Should be 1.
30	30	- ranges: parent bus address space is the same as the child bus address space.
	31	+- interconnects : interconnect path specifier for MDSS according to
	32	+ Documentation/devicetree/bindings/interconnect/interconnect.txt. Should be
	33	+ 2 paths corresponding to 2 AXI ports.
	34	+- interconnect-names : MDSS will have 2 port names to differentiate between the
	35	+ 2 interconnect paths defined with interconnect specifier.
31	36
32	37	Optional properties:
33	38	- assigned-clocks: list of clock specifiers for clocks needing rate assignment
..	..	@@ -36,7 +41,7 @@
36	41
37	42	MDP:
38	43	Required properties:
39		-- compatible: "qcom,sdm845-dpu"
	44	+- compatible: "qcom,sdm845-dpu", "qcom,sc7180-dpu"
40	45	- reg: physical base address and length of controller's registers.
41	46	- reg-names : register region names. The following region is required:
42	47	* "mdp"
..	..	@@ -86,6 +91,11 @@
86	91	interrupt-controller;
87	92	#interrupt-cells = <1>;
88	93
	94	+ interconnects = <&rsc_hlos MASTER_MDP0 &rsc_hlos SLAVE_EBI1>,
	95	+ <&rsc_hlos MASTER_MDP1 &rsc_hlos SLAVE_EBI1>;
	96	+
	97	+ interconnect-names = "mdp0-mem", "mdp1-mem";
	98	+
89	99	iommus = <&apps_iommu 0>;
90	100
91	101	#address-cells = <2>;