| .. | .. |
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| 6 | 6 | |
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| 7 | 7 | Required properties: |
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| 8 | 8 | - compatible: Should be "mediatek,<chip>-hdmi". |
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| 9 | +- the supported chips are mt2701, mt7623 and mt8173 |
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| 9 | 10 | - reg: Physical base address and length of the controller's registers |
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| 10 | 11 | - interrupts: The interrupt signal from the function block. |
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| 11 | 12 | - clocks: device clocks |
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| .. | .. |
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| 32 | 33 | |
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| 33 | 34 | Required properties: |
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| 34 | 35 | - compatible: Should be "mediatek,<chip>-cec" |
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| 36 | +- the supported chips are mt7623 and mt8173 |
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| 35 | 37 | - reg: Physical base address and length of the controller's registers |
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| 36 | 38 | - interrupts: The interrupt signal from the function block. |
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| 37 | 39 | - clocks: device clock |
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| .. | .. |
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| 44 | 46 | |
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| 45 | 47 | Required properties: |
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| 46 | 48 | - compatible: Should be "mediatek,<chip>-hdmi-ddc" |
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| 49 | +- the supported chips are mt7623 and mt8173 |
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| 47 | 50 | - reg: Physical base address and length of the controller's registers |
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| 48 | 51 | - clocks: device clock |
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| 49 | 52 | - clock-names: Should be "ddc-i2c". |
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| .. | .. |
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| 56 | 59 | |
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| 57 | 60 | Required properties: |
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| 58 | 61 | - compatible: "mediatek,<chip>-hdmi-phy" |
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| 62 | +- the supported chips are mt2701, mt7623 and mt8173 |
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| 59 | 63 | - reg: Physical base address and length of the module's registers |
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| 60 | 64 | - clocks: PLL reference clock |
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| 61 | 65 | - clock-names: must contain "pll_ref" |
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