修改4g拨号为QMI,需要在系统里后台执行quectel-CM

hc

2024-10-22 8ac6c7a54ed1b98d142dce24b11c6de6a1e239a5

 kernel/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
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@@ -27,20 +27,23 @@
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 Required properties (all function blocks):
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 - compatible: "mediatek,<chip>-disp-<function>", one of
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-	"mediatek,<chip>-disp-ovl"   - overlay (4 layers, blending, csc)
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-	"mediatek,<chip>-disp-rdma"  - read DMA / line buffer
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-	"mediatek,<chip>-disp-wdma"  - write DMA
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-	"mediatek,<chip>-disp-color" - color processor
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-	"mediatek,<chip>-disp-aal"   - adaptive ambient light controller
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-	"mediatek,<chip>-disp-gamma" - gamma correction
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-	"mediatek,<chip>-disp-merge" - merge streams from two RDMA sources
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-	"mediatek,<chip>-disp-split" - split stream to two encoders
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-	"mediatek,<chip>-disp-ufoe"  - data compression engine
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-	"mediatek,<chip>-dsi"        - DSI controller, see mediatek,dsi.txt
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-	"mediatek,<chip>-dpi"        - DPI controller, see mediatek,dpi.txt
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-	"mediatek,<chip>-disp-mutex" - display mutex
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-	"mediatek,<chip>-disp-od"    - overdrive
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-  the supported chips are mt2701, mt2712 and mt8173.
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+	"mediatek,<chip>-disp-ovl"   		- overlay (4 layers, blending, csc)
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+	"mediatek,<chip>-disp-ovl-2l"           - overlay (2 layers, blending, csc)
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+	"mediatek,<chip>-disp-rdma"  		- read DMA / line buffer
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+	"mediatek,<chip>-disp-wdma"  		- write DMA
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+	"mediatek,<chip>-disp-ccorr"            - color correction
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+	"mediatek,<chip>-disp-color" 		- color processor
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+	"mediatek,<chip>-disp-dither"           - dither
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+	"mediatek,<chip>-disp-aal"   		- adaptive ambient light controller
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+	"mediatek,<chip>-disp-gamma" 		- gamma correction
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+	"mediatek,<chip>-disp-merge" 		- merge streams from two RDMA sources
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+	"mediatek,<chip>-disp-split" 		- split stream to two encoders
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+	"mediatek,<chip>-disp-ufoe"  		- data compression engine
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+	"mediatek,<chip>-dsi"        		- DSI controller, see mediatek,dsi.txt
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+	"mediatek,<chip>-dpi"        		- DPI controller, see mediatek,dpi.txt
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+	"mediatek,<chip>-disp-mutex" 		- display mutex
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+	"mediatek,<chip>-disp-od"    		- overdrive
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+  the supported chips are mt2701, mt7623, mt2712 and mt8173.
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 - reg: Physical base address and length of the function block register space
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 - interrupts: The interrupt signal from the function block (required, except for
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   merge and split function blocks).
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@@ -49,6 +52,7 @@
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   For most function blocks this is just a single clock input. Only the DSI and
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   DPI controller nodes have multiple clock inputs. These are documented in
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   mediatek,dsi.txt and mediatek,dpi.txt, respectively.
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+  An exception is that the mt8183 mutex is always free running with no clocks property.
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 Required properties (DMA function blocks):
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 - compatible: Should be one of
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@@ -59,7 +63,7 @@
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 - larb: Should contain a phandle pointing to the local arbiter device as defined
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   in Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
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 - iommus: Should point to the respective IOMMU block with master port as
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-  argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
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+  argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
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   for details.
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 Examples: