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| 31 | 31 | - one subnode per DSI device connected on the DSI bus. Each DSI device should |
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| 32 | 32 | contain a reg property encoding its virtual channel. |
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| 33 | 33 | |
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| 34 | | -Cadence DPHY |
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| 35 | | -============ |
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| 36 | | - |
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| 37 | | -Cadence DPHY block. |
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| 38 | | - |
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| 39 | | -Required properties: |
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| 40 | | -- compatible: should be set to "cdns,dphy". |
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| 41 | | -- reg: physical base address and length of the DPHY registers. |
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| 42 | | -- clocks: DPHY reference clocks. |
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| 43 | | -- clock-names: must contain "psm" and "pll_ref". |
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| 44 | | -- #phy-cells: must be set to 0. |
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| 45 | | - |
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| 46 | | - |
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| 47 | 34 | Example: |
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| 48 | | - dphy0: dphy@fd0e0000{ |
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| 49 | | - compatible = "cdns,dphy"; |
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| 50 | | - reg = <0x0 0xfd0e0000 0x0 0x1000>; |
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| 51 | | - clocks = <&psm_clk>, <&pll_ref_clk>; |
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| 52 | | - clock-names = "psm", "pll_ref"; |
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| 53 | | - #phy-cells = <0>; |
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| 54 | | - }; |
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| 55 | | - |
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| 56 | 35 | dsi0: dsi@fd0c0000 { |
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| 57 | 36 | compatible = "cdns,dsi"; |
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| 58 | 37 | reg = <0x0 0xfd0c0000 0x0 0x1000>; |
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