forked from ~ljy/RK356X_SDK_RELEASE
kernel/Documentation/devicetree/bindings/clock/ti,cdce925.txt
.. .. @@ -4,10 +4,10 @@ 4 4 This binding uses the common clock binding[1]. 5 5 6 6 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt 7 8 9 10 7 8 9 10 11 11 12 12 The driver provides clock sources for each output Y1 through Y5. 13 13 .. .. @@ -24,6 +24,8 @@ 24 24 Optional properties: 25 25 - xtal-load-pf: Crystal load-capacitor value to fine-tune performance on a 26 26 board, or to compensate for external influences. 27 28 27 29 28 30 For all PLL1, PLL2, ... an optional child node can be used to specify spread 29 31 spectrum clocking parameters for a board. .. .. @@ -41,6 +43,8 @@ 41 43 clocks = <&xtal_27Mhz>; 42 44 #clock-cells = <1>; 43 45 xtal-load-pf = <5>; 46 47 44 48 /* PLL options to get SSC 1% centered */ 45 49 PLL2 { 46 50 spread-spectrum = <4>;
