| .. | .. |
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| 13 | 13 | - external (optional) RGMII_REFCLK |
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| 14 | 14 | - clock-names: Must be: |
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| 15 | 15 | clock-names = "mclk", "rtc", "jtag", "rgmii_ref_ext"; |
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| 16 | + - #power-domain-cells: Must be 0 |
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| 16 | 17 | |
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| 17 | 18 | Examples |
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| 18 | 19 | -------- |
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| .. | .. |
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| 27 | 28 | clocks = <&ext_mclk>, <&ext_rtc_clk>, |
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| 28 | 29 | <&ext_jtag_clk>, <&ext_rgmii_ref>; |
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| 29 | 30 | clock-names = "mclk", "rtc", "jtag", "rgmii_ref_ext"; |
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| 31 | + #power-domain-cells = <0>; |
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| 30 | 32 | }; |
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| 31 | 33 | |
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| 32 | 34 | - Other nodes can use the clocks provided by SYSCTRL as in: |
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| .. | .. |
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| 38 | 40 | interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; |
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| 39 | 41 | reg-shift = <2>; |
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| 40 | 42 | reg-io-width = <4>; |
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| 41 | | - clocks = <&sysctrl R9A06G032_CLK_UART0>; |
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| 42 | | - clock-names = "baudclk"; |
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| 43 | + clocks = <&sysctrl R9A06G032_CLK_UART0>, <&sysctrl R9A06G032_HCLK_UART0>; |
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| 44 | + clock-names = "baudclk", "apb_pclk"; |
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| 45 | + power-domains = <&sysctrl>; |
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| 43 | 46 | }; |
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