~hc/RK356X_SDK_RELEASE.git

..	..	@@ -9,14 +9,17 @@
9	9	- "amlogic,meson8-clkc" for Meson8 (S802) SoCs
10	10	- "amlogic,meson8b-clkc" for Meson8 (S805) SoCs
11	11	- "amlogic,meson8m2-clkc" for Meson8m2 (S812) SoCs
12		-- reg: it must be composed by two tuples:
13		- 0) physical base address of the xtal register and length of memory
14		- mapped region.
15		- 1) physical base address of the clock controller and length of memory
16		- mapped region.
17		-
18	12	- #clock-cells: should be 1.
19	13	- #reset-cells: should be 1.
	14	+- clocks: list of clock phandles, one for each entry in clock-names
	15	+- clock-names: should contain the following:
	16	+ * "xtal": the 24MHz system oscillator
	17	+ * "ddr_pll": the DDR PLL clock
	18	+ * "clk_32k": (if present) the 32kHz clock signal from GPIOAO_6 (CLK_32K_IN)
	19	+
	20	+Parent node should have the following properties :
	21	+- compatible: "amlogic,meson-hhi-sysctrl", "simple-mfd", "syscon"
	22	+- reg: base address and size of the HHI system control register space.
20	23
21	24	Each clock is assigned an identifier and client nodes can use this identifier
22	25	to specify the clock which they consume. All available clocks are defined as
..	..	@@ -30,9 +33,8 @@
30	33
31	34	Example: Clock controller node:
32	35
33		- clkc: clock-controller@c1104000 {
	36	+ clkc: clock-controller {
34	37	compatible = "amlogic,meson8b-clkc";
35		- reg = <0xc1108000 0x4>, <0xc1104000 0x460>;
36	38	#clock-cells = <1>;
37	39	#reset-cells = <1>;
38	40	};