修改4g拨号为QMI,需要在系统里后台执行quectel-CM

hc

2024-10-22 8ac6c7a54ed1b98d142dce24b11c6de6a1e239a5

 kernel/Documentation/ABI/testing/sysfs-bus-coresight-devices-tmc
..
..
@@ -11,21 +11,21 @@
11
11
 Date:           March 2016
12
12
 KernelVersion:  4.7
13
13
 Contact:        Mathieu Poirier <mathieu.poirier@linaro.org>
14
-Description:    (R) Defines the size, in 32-bit words, of the local RAM buffer.
14
+Description:    (Read) Defines the size, in 32-bit words, of the local RAM buffer.
15
15
                 The value is read directly from HW register RSZ, 0x004.
16
16
 
17
17
 What:           /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/sts
18
18
 Date:           March 2016
19
19
 KernelVersion:  4.7
20
20
 Contact:        Mathieu Poirier <mathieu.poirier@linaro.org>
21
-Description:	(R) Shows the value held by the TMC status register.  The value
21
+Description:	(Read) Shows the value held by the TMC status register.  The value
22
22
                 is read directly from HW register STS, 0x00C.
23
23
 
24
24
 What:		/sys/bus/coresight/devices/<memory_map>.tmc/mgmt/rrp
25
25
 Date:		March 2016
26
26
 KernelVersion:	4.7
27
27
 Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
28
-Description:	(R) Shows the value held by the TMC RAM Read Pointer register
28
+Description:	(Read) Shows the value held by the TMC RAM Read Pointer register
29
29
 		that is used to read entries from the Trace RAM over the APB
30
30
 		interface.  The value is read directly from HW register RRP,
31
31
 		0x014.
..
..
@@ -34,7 +34,7 @@
34
34
 Date:		March 2016
35
35
 KernelVersion:	4.7
36
36
 Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
37
-Description:	(R) Shows the value held by the TMC RAM Write Pointer register
37
+Description:	(Read) Shows the value held by the TMC RAM Write Pointer register
38
38
 		that is used to sets the write pointer to write entries from
39
39
 		the CoreSight bus into the Trace RAM. The value is read directly
40
40
 		from HW register RWP, 0x018.
..
..
@@ -43,21 +43,21 @@
43
43
 Date:		March 2016
44
44
 KernelVersion:	4.7
45
45
 Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
46
-Description:	(R) Similar to "trigger_cntr" above except that this value is
46
+Description:	(Read) Similar to "trigger_cntr" above except that this value is
47
47
 		read directly from HW register TRG, 0x01C.
48
48
 
49
49
 What:		/sys/bus/coresight/devices/<memory_map>.tmc/mgmt/ctl
50
50
 Date:		March 2016
51
51
 KernelVersion:	4.7
52
52
 Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
53
-Description:	(R) Shows the value held by the TMC Control register. The value
53
+Description:	(Read) Shows the value held by the TMC Control register. The value
54
54
 		is read directly from HW register CTL, 0x020.
55
55
 
56
56
 What:		/sys/bus/coresight/devices/<memory_map>.tmc/mgmt/ffsr
57
57
 Date:		March 2016
58
58
 KernelVersion:	4.7
59
59
 Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
60
-Description:	(R) Shows the value held by the TMC Formatter and Flush Status
60
+Description:	(Read) Shows the value held by the TMC Formatter and Flush Status
61
61
 		register.  The value is read directly from HW register FFSR,
62
62
 		0x300.
63
63
 
..
..
@@ -65,7 +65,7 @@
65
65
 Date:		March 2016
66
66
 KernelVersion:	4.7
67
67
 Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
68
-Description:	(R) Shows the value held by the TMC Formatter and Flush Control
68
+Description:	(Read) Shows the value held by the TMC Formatter and Flush Control
69
69
 		register.  The value is read directly from HW register FFCR,
70
70
 		0x304.
71
71
 
..
..
@@ -73,7 +73,7 @@
73
73
 Date:		March 2016
74
74
 KernelVersion:	4.7
75
75
 Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
76
-Description:	(R) Shows the value held by the TMC Mode register, which
76
+Description:	(Read) Shows the value held by the TMC Mode register, which
77
77
 		indicate the mode the device has been configured to enact.  The
78
78
 		The value is read directly from the MODE register, 0x028.
79
79
 
..
..
@@ -81,7 +81,7 @@
81
81
 Date:		March 2016
82
82
 KernelVersion:	4.7
83
83
 Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
84
-Description:	(R) Indicates the capabilities of the Coresight TMC.
84
+Description:	(Read) Indicates the capabilities of the Coresight TMC.
85
85
 		The value is read directly from the DEVID register, 0xFC8,
86
86
 
87
87
 What:		/sys/bus/coresight/devices/<memory_map>.tmc/buffer_size