修改4g拨号为QMI,需要在系统里后台执行quectel-CM

hc

2024-10-22 8ac6c7a54ed1b98d142dce24b11c6de6a1e239a5

 kernel/Documentation/ABI/testing/sysfs-bus-coresight-devices-etb10
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@@ -4,7 +4,10 @@
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 Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
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 Description:	(RW) Add/remove a sink from a trace path.  There can be multiple
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 		source for a single sink.
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-		ex: echo 1 > /sys/bus/coresight/devices/20010000.etb/enable_sink
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+
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+		ex::
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+		  echo 1 > /sys/bus/coresight/devices/20010000.etb/enable_sink
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 What:		/sys/bus/coresight/devices/<memory_map>.etb/trigger_cntr
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 Date:		November 2014
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@@ -20,21 +23,21 @@
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 Date:		March 2016
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 KernelVersion:	4.7
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 Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
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-Description:	(R) Defines the depth, in words, of the trace RAM in powers of
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+Description:	(Read) Defines the depth, in words, of the trace RAM in powers of
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 		2.  The value is read directly from HW register RDP, 0x004.
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 What:		/sys/bus/coresight/devices/<memory_map>.etb/mgmt/sts
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 Date:		March 2016
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 KernelVersion:	4.7
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 Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
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-Description:	(R) Shows the value held by the ETB status register.  The value
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+Description:	(Read) Shows the value held by the ETB status register.  The value
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 		is read directly from HW register STS, 0x00C.
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 What:		/sys/bus/coresight/devices/<memory_map>.etb/mgmt/rrp
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 Date:		March 2016
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 KernelVersion:	4.7
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 Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
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-Description:	(R) Shows the value held by the ETB RAM Read Pointer register
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+Description:	(Read) Shows the value held by the ETB RAM Read Pointer register
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 		that is used to read entries from the Trace RAM over the APB
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 		interface.  The value is read directly from HW register RRP,
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 		0x014.
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@@ -43,7 +46,7 @@
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 Date:		March 2016
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 KernelVersion:	4.7
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 Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
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-Description:	(R) Shows the value held by the ETB RAM Write Pointer register
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+Description:	(Read) Shows the value held by the ETB RAM Write Pointer register
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 		that is used to sets the write pointer to write entries from
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 		the CoreSight bus into the Trace RAM. The value is read directly
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 		from HW register RWP, 0x018.
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@@ -52,21 +55,21 @@
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 Date:		March 2016
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 KernelVersion:	4.7
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 Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
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-Description:	(R) Similar to "trigger_cntr" above except that this value is
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+Description:	(Read) Similar to "trigger_cntr" above except that this value is
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 		read directly from HW register TRG, 0x01C.
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 What:		/sys/bus/coresight/devices/<memory_map>.etb/mgmt/ctl
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 Date:		March 2016
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 KernelVersion:	4.7
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 Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
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-Description:	(R) Shows the value held by the ETB Control register. The value
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+Description:	(Read) Shows the value held by the ETB Control register. The value
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 		is read directly from HW register CTL, 0x020.
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 What:		/sys/bus/coresight/devices/<memory_map>.etb/mgmt/ffsr
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 Date:		March 2016
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 KernelVersion:	4.7
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 Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
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-Description:	(R) Shows the value held by the ETB Formatter and Flush Status
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+Description:	(Read) Shows the value held by the ETB Formatter and Flush Status
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 		register.  The value is read directly from HW register FFSR,
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 		0x300.
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@@ -74,6 +77,6 @@
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 Date:		March 2016
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 KernelVersion:	4.7
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 Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
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-Description:	(R) Shows the value held by the ETB Formatter and Flush Control
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+Description:	(Read) Shows the value held by the ETB Formatter and Flush Control
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 		register.  The value is read directly from HW register FFCR,
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 		0x304.