default settings GPIO PA4 PA6 PA3 PB5

hc

2024-02-19 890e1df1bec891d9203724541e81f8fbe5183388

 kernel/include/uapi/drm/rockchip_drm.h
..
..
@@ -15,6 +15,12 @@
15
15
 #ifndef _UAPI_ROCKCHIP_DRM_H
16
16
 #define _UAPI_ROCKCHIP_DRM_H
17
17
 
18
+#ifdef __KERNEL__
19
+#include <linux/types.h>
20
+#else
21
+#include <stdint.h>
22
+#endif
23
+
18
24
 #include <drm/drm.h>
19
25
 
20
26
 /*
..
..
@@ -35,8 +41,11 @@
35
41
 	ROCKCHIP_BO_SECURE	= 1 << 3,
36
42
 	/* keep kmap for cma buffer or alloc kmap for other type memory */
37
43
 	ROCKCHIP_BO_ALLOC_KMAP	= 1 << 4,
44
+	/* alloc page with gfp_dma32 */
45
+	ROCKCHIP_BO_DMA32	= 1 << 5,
38
46
 	ROCKCHIP_BO_MASK	= ROCKCHIP_BO_CONTIG | ROCKCHIP_BO_CACHABLE |
39
-				ROCKCHIP_BO_WC
47
+				ROCKCHIP_BO_WC | ROCKCHIP_BO_SECURE | ROCKCHIP_BO_ALLOC_KMAP |
48
+				ROCKCHIP_BO_DMA32,
40
49
 };
41
50
 
42
51
 /**
..
..
@@ -78,6 +87,13 @@
78
87
 	DRM_ROCKCHIP_GEM_CPU_ACQUIRE_EXCLUSIVE = 0x1,
79
88
 };
80
89
 
90
+enum rockchip_crtc_feture {
91
+	ROCKCHIP_DRM_CRTC_FEATURE_ALPHA_SCALE,
92
+	ROCKCHIP_DRM_CRTC_FEATURE_HDR10,
93
+	ROCKCHIP_DRM_CRTC_FEATURE_NEXT_HDR,
94
+	ROCKCHIP_DRM_CRTC_FEATURE_VIVID_HDR,
95
+};
96
+
81
97
 enum rockchip_plane_feture {
82
98
 	ROCKCHIP_DRM_PLANE_FEATURE_SCALE,
83
99
 	ROCKCHIP_DRM_PLANE_FEATURE_ALPHA,
..
..
@@ -88,19 +104,11 @@
88
104
 	ROCKCHIP_DRM_PLANE_FEATURE_MAX,
89
105
 };
90
106
 
91
-enum rockchip_crtc_feture {
92
-	ROCKCHIP_DRM_CRTC_FEATURE_AFBDC,
93
-};
94
-
95
107
 enum rockchip_cabc_mode {
96
108
 	ROCKCHIP_DRM_CABC_MODE_DISABLE,
97
109
 	ROCKCHIP_DRM_CABC_MODE_NORMAL,
98
110
 	ROCKCHIP_DRM_CABC_MODE_LOWPOWER,
99
111
 	ROCKCHIP_DRM_CABC_MODE_USERSPACE,
100
-};
101
-
102
-struct drm_rockchip_vcnt_event {
103
-	struct drm_pending_event	base;
104
112
 };
105
113
 
106
114
 #define DRM_ROCKCHIP_GEM_CREATE		0x00