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2024-02-19 890e1df1bec891d9203724541e81f8fbe5183388 
 kernel/arch/arm/boot/dts/ste-href-family-pinctrl.dtsi
....@@ -1,220 +1,13 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
23  * Copyright 2013 Linaro Ltd.
3
- *
4
- * The code contained herein is licensed under the GNU General Public
5
- * License. You may obtain a copy of the GNU General Public License
6
- * Version 2 or later at the following locations:
7
- *
8
- * http://www.opensource.org/licenses/gpl-license.html
9
- * http://www.gnu.org/copyleft/gpl.html
104  */
115 
12
-#include "ste-nomadik-pinctrl.dtsi"
6
+#include "ste-dbx5x0-pinctrl.dtsi"
137 
148 / {
159 	soc {
1610 		pinctrl {
17
-			/* Settings for all UART default and sleep states */
18
-			uart0 {
19
-				uart0_default_mode: uart0_default {
20
-					default_mux {
21
-						function = "u0";
22
-						groups = "u0_a_1";
23
-					};
24
-					default_cfg1 {
25
-						pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
26
-						ste,config = <&in_pu>;
27
-					};
28
-
29
-					default_cfg2 {
30
-						pins = "GPIO1_AJ3", "GPIO3_AH3"; /* RTS+TXD */
31
-						ste,config = <&out_hi>;
32
-					};
33
-				};
34
-
35
-				uart0_sleep_mode: uart0_sleep {
36
-					sleep_cfg1 {
37
-						pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
38
-						ste,config = <&slpm_in_wkup_pdis>;
39
-					};
40
-
41
-					sleep_cfg2 {
42
-						pins = "GPIO1_AJ3"; /* RTS */
43
-						ste,config = <&slpm_out_hi_wkup_pdis>;
44
-					};
45
-
46
-					sleep_cfg3 {
47
-						pins = "GPIO3_AH3"; /* TXD */
48
-						ste,config = <&slpm_out_wkup_pdis>;
49
-					};
50
-				};
51
-			};
52
-
53
-			uart1 {
54
-				uart1_default_mode: uart1_default {
55
-					default_mux {
56
-						function = "u1";
57
-						groups = "u1rxtx_a_1";
58
-					};
59
-					default_cfg1 {
60
-						pins = "GPIO4_AH6"; /* RXD */
61
-						ste,config = <&in_pu>;
62
-					};
63
-
64
-					default_cfg2 {
65
-						pins = "GPIO5_AG6"; /* TXD */
66
-						ste,config = <&out_hi>;
67
-					};
68
-				};
69
-
70
-				uart1_sleep_mode: uart1_sleep {
71
-					sleep_cfg1 {
72
-						pins = "GPIO4_AH6"; /* RXD */
73
-						ste,config = <&slpm_in_wkup_pdis>;
74
-					};
75
-
76
-					sleep_cfg2 {
77
-						pins = "GPIO5_AG6"; /* TXD */
78
-						ste,config = <&slpm_out_wkup_pdis>;
79
-					};
80
-				};
81
-			};
82
-
83
-			uart2 {
84
-				uart2_default_mode: uart2_default {
85
-					default_mux {
86
-						function = "u2";
87
-						groups = "u2rxtx_c_1";
88
-					};
89
-					default_cfg1 {
90
-						pins = "GPIO29_W2"; /* RXD */
91
-						ste,config = <&in_pu>;
92
-					};
93
-
94
-					default_cfg2 {
95
-						pins = "GPIO30_W3"; /* TXD */
96
-						ste,config = <&out_hi>;
97
-					};
98
-				};
99
-
100
-				uart2_sleep_mode: uart2_sleep {
101
-					sleep_cfg1 {
102
-						pins = "GPIO29_W2"; /* RXD */
103
-						ste,config = <&in_wkup_pdis>;
104
-					};
105
-
106
-					sleep_cfg2 {
107
-						pins = "GPIO30_W3"; /* TXD */
108
-						ste,config = <&out_wkup_pdis>;
109
-					};
110
-				};
111
-			};
112
-
113
-			/* Settings for all I2C default and sleep states */
114
-			i2c0 {
115
-				i2c0_default_mode: i2c_default {
116
-					default_mux {
117
-						function = "i2c0";
118
-						groups = "i2c0_a_1";
119
-					};
120
-					default_cfg1 {
121
-						pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */
122
-						ste,config = <&in_pu>;
123
-					};
124
-				};
125
-
126
-				i2c0_sleep_mode: i2c_sleep {
127
-					sleep_cfg1 {
128
-						pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */
129
-						ste,config = <&slpm_in_wkup_pdis>;
130
-					};
131
-				};
132
-			};
133
-
134
-			i2c1 {
135
-				i2c1_default_mode: i2c_default {
136
-					default_mux {
137
-						function = "i2c1";
138
-						groups = "i2c1_b_2";
139
-					};
140
-					default_cfg1 {
141
-						pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */
142
-						ste,config = <&in_pu>;
143
-					};
144
-				};
145
-
146
-				i2c1_sleep_mode: i2c_sleep {
147
-					sleep_cfg1 {
148
-						pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */
149
-						ste,config = <&slpm_in_wkup_pdis>;
150
-					};
151
-				};
152
-			};
153
-
154
-			i2c2 {
155
-				i2c2_default_mode: i2c_default {
156
-					default_mux {
157
-						function = "i2c2";
158
-						groups = "i2c2_b_2";
159
-					};
160
-					default_cfg1 {
161
-						pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */
162
-						ste,config = <&in_pu>;
163
-					};
164
-				};
165
-
166
-				i2c2_sleep_mode: i2c_sleep {
167
-					sleep_cfg1 {
168
-						pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */
169
-						ste,config = <&slpm_in_wkup_pdis>;
170
-					};
171
-				};
172
-			};
173
-
174
-			i2c3 {
175
-				i2c3_default_mode: i2c_default {
176
-					default_mux {
177
-						function = "i2c3";
178
-						groups = "i2c3_c_2";
179
-					};
180
-					default_cfg1 {
181
-						pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */
182
-						ste,config = <&in_pu>;
183
-					};
184
-				};
185
-
186
-				i2c3_sleep_mode: i2c_sleep {
187
-					sleep_cfg1 {
188
-						pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */
189
-						ste,config = <&slpm_in_wkup_pdis>;
190
-					};
191
-				};
192
-			};
193
-
194
-			/*
195
-			 * Activating I2C4 will conflict with UART1 about the same pins so do not
196
-			 * enable I2C4 and UART1 at the same time.
197
-			 */
198
-			i2c4 {
199
-				i2c4_default_mode: i2c_default {
200
-					default_mux {
201
-						function = "i2c4";
202
-						groups = "i2c4_b_1";
203
-					};
204
-					default_cfg1 {
205
-						pins = "GPIO4_AH6", "GPIO5_AG6"; /* SDA/SCL */
206
-						ste,config = <&in_pu>;
207
-					};
208
-				};
209
-
210
-				i2c4_sleep_mode: i2c_sleep {
211
-					sleep_cfg1 {
212
-						pins = "GPIO4_AH6", "GPIO5_AG6"; /* SDA/SCL */
213
-						ste,config = <&slpm_in_wkup_pdis>;
214
-					};
215
-				};
216
-			};
217
-
21811 			/* Settings for all SPI default and sleep states */
21912 			spi2 {
22013 				spi2_default_mode: spi_default {
....@@ -276,335 +69,6 @@
27669 				};
27770 			};
27871 
279
-			/* Settings for all MMC/SD/SDIO default and sleep states */
280
-			sdi0 {
281
-				/* This is the external SD card slot, 4 bits wide */
282
-				sdi0_default_mode: sdi0_default {
283
-					default_mux {
284
-						function = "mc0";
285
-						groups = "mc0_a_1";
286
-					};
287
-					default_cfg1 {
288
-						pins =
289
-						"GPIO18_AC2", /* CMDDIR */
290
-						"GPIO19_AC1", /* DAT0DIR */
291
-						"GPIO20_AB4"; /* DAT2DIR */
292
-						ste,config = <&out_hi>;
293
-					};
294
-					default_cfg2 {
295
-						pins = "GPIO22_AA3"; /* FBCLK */
296
-						ste,config = <&in_nopull>;
297
-					};
298
-					default_cfg3 {
299
-						pins = "GPIO23_AA4"; /* CLK */
300
-						ste,config = <&out_lo>;
301
-					};
302
-					default_cfg4 {
303
-						pins =
304
-						"GPIO24_AB2", /* CMD */
305
-						"GPIO25_Y4", /* DAT0 */
306
-						"GPIO26_Y2", /* DAT1 */
307
-						"GPIO27_AA2", /* DAT2 */
308
-						"GPIO28_AA1"; /* DAT3 */
309
-						ste,config = <&in_pu>;
310
-					};
311
-				};
312
-
313
-				sdi0_sleep_mode: sdi0_sleep {
314
-					sleep_cfg1 {
315
-						pins =
316
-						"GPIO18_AC2", /* CMDDIR */
317
-						"GPIO19_AC1", /* DAT0DIR */
318
-						"GPIO20_AB4"; /* DAT2DIR */
319
-						ste,config = <&slpm_out_hi_wkup_pdis>;
320
-					};
321
-					sleep_cfg2 {
322
-						pins =
323
-						"GPIO22_AA3", /* FBCLK */
324
-						"GPIO24_AB2", /* CMD */
325
-						"GPIO25_Y4", /* DAT0 */
326
-						"GPIO26_Y2", /* DAT1 */
327
-						"GPIO27_AA2", /* DAT2 */
328
-						"GPIO28_AA1"; /* DAT3 */
329
-						ste,config = <&slpm_in_wkup_pdis>;
330
-					};
331
-					sleep_cfg3 {
332
-						pins = "GPIO23_AA4"; /* CLK */
333
-						ste,config = <&slpm_out_lo_wkup_pdis>;
334
-					};
335
-				};
336
-			};
337
-
338
-			sdi1 {
339
-				/* This is the WLAN SDIO 4 bits wide */
340
-				sdi1_default_mode: sdi1_default {
341
-					default_mux {
342
-						function = "mc1";
343
-						groups = "mc1_a_1";
344
-					};
345
-					default_cfg1 {
346
-						pins = "GPIO208_AH16"; /* CLK */
347
-						ste,config = <&out_lo>;
348
-					};
349
-					default_cfg2 {
350
-						pins = "GPIO209_AG15"; /* FBCLK */
351
-						ste,config = <&in_nopull>;
352
-					};
353
-					default_cfg3 {
354
-						pins =
355
-						"GPIO210_AJ15", /* CMD */
356
-						"GPIO211_AG14", /* DAT0 */
357
-						"GPIO212_AF13", /* DAT1 */
358
-						"GPIO213_AG13", /* DAT2 */
359
-						"GPIO214_AH15"; /* DAT3 */
360
-						ste,config = <&in_pu>;
361
-					};
362
-				};
363
-
364
-				sdi1_sleep_mode: sdi1_sleep {
365
-					sleep_cfg1 {
366
-						pins = "GPIO208_AH16"; /* CLK */
367
-						ste,config = <&slpm_out_lo_wkup_pdis>;
368
-					};
369
-					sleep_cfg2 {
370
-						pins =
371
-						"GPIO209_AG15", /* FBCLK */
372
-						"GPIO210_AJ15", /* CMD */
373
-						"GPIO211_AG14", /* DAT0 */
374
-						"GPIO212_AF13", /* DAT1 */
375
-						"GPIO213_AG13", /* DAT2 */
376
-						"GPIO214_AH15"; /* DAT3 */
377
-						ste,config = <&slpm_in_wkup_pdis>;
378
-					};
379
-				};
380
-			};
381
-
382
-			sdi2 {
383
-				/* This is the eMMC 8 bits wide, usually PoP eMMC */
384
-				sdi2_default_mode: sdi2_default {
385
-					default_mux {
386
-						function = "mc2";
387
-						groups = "mc2_a_1";
388
-					};
389
-					default_cfg1 {
390
-						pins = "GPIO128_A5"; /* CLK */
391
-						ste,config = <&out_lo>;
392
-					};
393
-					default_cfg2 {
394
-						pins = "GPIO130_C8"; /* FBCLK */
395
-						ste,config = <&in_nopull>;
396
-					};
397
-					default_cfg3 {
398
-						pins =
399
-						"GPIO129_B4", /* CMD */
400
-						"GPIO131_A12", /* DAT0 */
401
-						"GPIO132_C10", /* DAT1 */
402
-						"GPIO133_B10", /* DAT2 */
403
-						"GPIO134_B9", /* DAT3 */
404
-						"GPIO135_A9", /* DAT4 */
405
-						"GPIO136_C7", /* DAT5 */
406
-						"GPIO137_A7", /* DAT6 */
407
-						"GPIO138_C5"; /* DAT7 */
408
-						ste,config = <&in_pu>;
409
-					};
410
-				};
411
-
412
-				sdi2_sleep_mode: sdi2_sleep {
413
-					sleep_cfg1 {
414
-						pins = "GPIO128_A5"; /* CLK */
415
-						ste,config = <&out_lo_wkup_pdis>;
416
-					};
417
-					sleep_cfg2 {
418
-						pins =
419
-						"GPIO130_C8", /* FBCLK */
420
-						"GPIO129_B4"; /* CMD */
421
-						ste,config = <&in_wkup_pdis_en>;
422
-					};
423
-					sleep_cfg3 {
424
-						pins =
425
-						"GPIO131_A12", /* DAT0 */
426
-						"GPIO132_C10", /* DAT1 */
427
-						"GPIO133_B10", /* DAT2 */
428
-						"GPIO134_B9", /* DAT3 */
429
-						"GPIO135_A9", /* DAT4 */
430
-						"GPIO136_C7", /* DAT5 */
431
-						"GPIO137_A7", /* DAT6 */
432
-						"GPIO138_C5"; /* DAT7 */
433
-						ste,config = <&in_wkup_pdis>;
434
-					};
435
-				};
436
-			};
437
-
438
-			sdi4 {
439
-				/* This is the eMMC 8 bits wide, usually PCB-mounted eMMC */
440
-				sdi4_default_mode: sdi4_default {
441
-					default_mux {
442
-						function = "mc4";
443
-						groups = "mc4_a_1";
444
-					};
445
-					default_cfg1 {
446
-						pins = "GPIO203_AE23"; /* CLK */
447
-						ste,config = <&out_lo>;
448
-					};
449
-					default_cfg2 {
450
-						pins = "GPIO202_AF25"; /* FBCLK */
451
-						ste,config = <&in_nopull>;
452
-					};
453
-					default_cfg3 {
454
-						pins =
455
-						"GPIO201_AF24", /* CMD */
456
-						"GPIO200_AH26", /* DAT0 */
457
-						"GPIO199_AH23", /* DAT1 */
458
-						"GPIO198_AG25", /* DAT2 */
459
-						"GPIO197_AH24", /* DAT3 */
460
-						"GPIO207_AJ23", /* DAT4 */
461
-						"GPIO206_AG24", /* DAT5 */
462
-						"GPIO205_AG23", /* DAT6 */
463
-						"GPIO204_AF23"; /* DAT7 */
464
-						ste,config = <&in_pu>;
465
-					};
466
-				};
467
-
468
-				sdi4_sleep_mode: sdi4_sleep {
469
-					sleep_cfg1 {
470
-						pins = "GPIO203_AE23"; /* CLK */
471
-						ste,config = <&out_lo_wkup_pdis>;
472
-					};
473
-					sleep_cfg2 {
474
-						pins =
475
-						"GPIO202_AF25", /* FBCLK */
476
-						"GPIO201_AF24", /* CMD */
477
-						"GPIO200_AH26", /* DAT0 */
478
-						"GPIO199_AH23", /* DAT1 */
479
-						"GPIO198_AG25", /* DAT2 */
480
-						"GPIO197_AH24", /* DAT3 */
481
-						"GPIO207_AJ23", /* DAT4 */
482
-						"GPIO206_AG24", /* DAT5 */
483
-						"GPIO205_AG23", /* DAT6 */
484
-						"GPIO204_AF23"; /* DAT7 */
485
-						ste,config = <&slpm_in_wkup_pdis>;
486
-					};
487
-				};
488
-			};
489
-
490
-			/*
491
-			 * Multi-rate serial ports (MSPs) - MSP3 output is internal and
492
-			 * cannot be muxed onto any pins.
493
-			 */
494
-			msp0 {
495
-				msp0_default_mode: msp0_default {
496
-					default_msp0_mux {
497
-						function = "msp0";
498
-						groups = "msp0txrx_a_1", "msp0tfstck_a_1";
499
-					};
500
-					default_msp0_cfg {
501
-						pins =
502
-						"GPIO12_AC4", /* TXD */
503
-						"GPIO15_AC3", /* RXD */
504
-						"GPIO13_AF3", /* TFS */
505
-						"GPIO14_AE3"; /* TCK */
506
-						ste,config = <&in_nopull>;
507
-					};
508
-				};
509
-			};
510
-
511
-			msp1 {
512
-				msp1_default_mode: msp1_default {
513
-					default_mux {
514
-						function = "msp1";
515
-						groups = "msp1txrx_a_1", "msp1_a_1";
516
-					};
517
-					default_cfg1 {
518
-						pins = "GPIO33_AF2";
519
-						ste,config = <&out_lo>;
520
-					};
521
-					default_cfg2 {
522
-						pins =
523
-						"GPIO34_AE1",
524
-						"GPIO35_AE2",
525
-						"GPIO36_AG2";
526
-						ste,config = <&in_nopull>;
527
-					};
528
-
529
-				};
530
-			};
531
-
532
-			msp2 {
533
-				msp2_default_mode: msp2_default {
534
-					/* MSP2 usually used for HDMI audio */
535
-					default_mux {
536
-						function = "msp2";
537
-						groups = "msp2_a_1";
538
-					};
539
-					default_cfg1 {
540
-						pins =
541
-						"GPIO193_AH27", /* TXD */
542
-						"GPIO194_AF27", /* TCK */
543
-						"GPIO195_AG28"; /* TFS */
544
-						ste,config = <&in_pd>;
545
-					};
546
-					default_cfg2 {
547
-						pins = "GPIO196_AG26"; /* RXD */
548
-						ste,config = <&out_lo>;
549
-					};
550
-				};
551
-			};
552
-
553
-
554
-			musb {
555
-				musb_default_mode: musb_default {
556
-					default_mux {
557
-						function = "usb";
558
-						groups = "usb_a_1";
559
-					};
560
-					default_cfg1 {
561
-						pins =
562
-						"GPIO256_AF28", /* NXT */
563
-						"GPIO258_AD29", /* XCLK */
564
-						"GPIO259_AC29", /* DIR */
565
-						"GPIO260_AD28", /* DAT7 */
566
-						"GPIO261_AD26", /* DAT6 */
567
-						"GPIO262_AE26", /* DAT5 */
568
-						"GPIO263_AG29", /* DAT4 */
569
-						"GPIO264_AE27", /* DAT3 */
570
-						"GPIO265_AD27", /* DAT2 */
571
-						"GPIO266_AC28", /* DAT1 */
572
-						"GPIO267_AC27"; /* DAT0 */
573
-						ste,config = <&in_nopull>;
574
-					};
575
-					default_cfg2 {
576
-						pins = "GPIO257_AE29"; /* STP */
577
-						ste,config = <&out_hi>;
578
-					};
579
-				};
580
-
581
-				musb_sleep_mode: musb_sleep {
582
-					sleep_cfg1 {
583
-						pins =
584
-						"GPIO256_AF28", /* NXT */
585
-						"GPIO258_AD29", /* XCLK */
586
-						"GPIO259_AC29"; /* DIR */
587
-						ste,config = <&slpm_wkup_pdis_en>;
588
-					};
589
-					sleep_cfg2 {
590
-						pins = "GPIO257_AE29"; /* STP */
591
-						ste,config = <&slpm_out_hi_wkup_pdis>;
592
-					};
593
-					sleep_cfg3 {
594
-						pins =
595
-						"GPIO260_AD28", /* DAT7 */
596
-						"GPIO261_AD26", /* DAT6 */
597
-						"GPIO262_AE26", /* DAT5 */
598
-						"GPIO263_AG29", /* DAT4 */
599
-						"GPIO264_AE27", /* DAT3 */
600
-						"GPIO265_AD27", /* DAT2 */
601
-						"GPIO266_AC28", /* DAT1 */
602
-						"GPIO267_AC27"; /* DAT0 */
603
-						ste,config = <&slpm_in_wkup_pdis_en>;
604
-					};
605
-				};
606
-			};
607
-
60872 			mcde {
60973 				lcd_default_mode: lcd_default {
61074 					default_mux1 {
....@@ -613,7 +77,6 @@
61377 						groups =
61478 						"lcdvsi0_a_1", /* VSI0 for LCD */
61579 						"lcd_d0_d7_a_1", /* Data lines */
616
-						"lcd_d8_d11_a_1", /* TV-out */
61780 						"lcdvsi1_a_1"; /* VSI1 for HDMI */
61881 					};
61982 					default_mux2 {