| .. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-or-later |
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| 1 | 2 | /* |
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| 2 | 3 | * Copyright 2013 Gateworks Corporation |
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| 3 | | - * |
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| 4 | | - * The code contained herein is licensed under the GNU General Public |
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| 5 | | - * License. You may obtain a copy of the GNU General Public License |
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| 6 | | - * Version 2 or later at the following locations: |
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| 7 | | - * |
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| 8 | | - * http://www.opensource.org/licenses/gpl-license.html |
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| 9 | | - * http://www.gnu.org/copyleft/gpl.html |
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| 10 | 4 | */ |
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| 11 | 5 | |
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| 12 | 6 | #include <dt-bindings/gpio/gpio.h> |
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| 7 | +#include <dt-bindings/input/linux-event-codes.h> |
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| 8 | +#include <dt-bindings/interrupt-controller/irq.h> |
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| 9 | +#include <dt-bindings/sound/fsl-imx-audmux.h> |
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| 13 | 10 | |
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| 14 | 11 | / { |
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| 15 | 12 | /* these are used by bootloader for disabling nodes */ |
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| .. | .. |
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| 32 | 29 | pwms = <&pwm4 0 5000000>; |
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| 33 | 30 | brightness-levels = <0 4 8 16 32 64 128 255>; |
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| 34 | 31 | default-brightness-level = <7>; |
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| 32 | + }; |
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| 33 | + |
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| 34 | + gpio-keys { |
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| 35 | + compatible = "gpio-keys"; |
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| 36 | + #address-cells = <1>; |
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| 37 | + #size-cells = <0>; |
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| 38 | + |
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| 39 | + user-pb { |
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| 40 | + label = "user_pb"; |
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| 41 | + gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>; |
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| 42 | + linux,code = <BTN_0>; |
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| 43 | + }; |
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| 44 | + |
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| 45 | + user-pb1x { |
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| 46 | + label = "user_pb1x"; |
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| 47 | + linux,code = <BTN_1>; |
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| 48 | + interrupt-parent = <&gsc>; |
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| 49 | + interrupts = <0>; |
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| 50 | + }; |
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| 51 | + |
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| 52 | + key-erased { |
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| 53 | + label = "key-erased"; |
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| 54 | + linux,code = <BTN_2>; |
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| 55 | + interrupt-parent = <&gsc>; |
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| 56 | + interrupts = <1>; |
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| 57 | + }; |
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| 58 | + |
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| 59 | + eeprom-wp { |
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| 60 | + label = "eeprom_wp"; |
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| 61 | + linux,code = <BTN_3>; |
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| 62 | + interrupt-parent = <&gsc>; |
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| 63 | + interrupts = <2>; |
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| 64 | + }; |
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| 65 | + |
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| 66 | + tamper { |
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| 67 | + label = "tamper"; |
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| 68 | + linux,code = <BTN_4>; |
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| 69 | + interrupt-parent = <&gsc>; |
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| 70 | + interrupts = <5>; |
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| 71 | + }; |
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| 72 | + |
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| 73 | + switch-hold { |
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| 74 | + label = "switch_hold"; |
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| 75 | + linux,code = <BTN_5>; |
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| 76 | + interrupt-parent = <&gsc>; |
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| 77 | + interrupts = <7>; |
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| 78 | + }; |
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| 35 | 79 | }; |
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| 36 | 80 | |
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| 37 | 81 | leds { |
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| .. | .. |
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| 60 | 104 | }; |
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| 61 | 105 | |
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| 62 | 106 | memory@10000000 { |
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| 107 | + device_type = "memory"; |
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| 63 | 108 | reg = <0x10000000 0x40000000>; |
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| 64 | 109 | }; |
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| 65 | 110 | |
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| .. | .. |
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| 114 | 159 | }; |
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| 115 | 160 | }; |
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| 116 | 161 | |
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| 117 | | - sound { |
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| 162 | + sound-analog { |
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| 118 | 163 | compatible = "fsl,imx6q-ventana-sgtl5000", |
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| 119 | 164 | "fsl,imx-audio-sgtl5000"; |
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| 120 | 165 | model = "sgtl5000-audio"; |
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| 121 | 166 | ssi-controller = <&ssi1>; |
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| 122 | | - audio-codec = <&codec>; |
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| 167 | + audio-codec = <&sgtl5000>; |
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| 123 | 168 | audio-routing = |
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| 124 | 169 | "MIC_IN", "Mic Jack", |
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| 125 | 170 | "Mic Jack", "Mic Bias", |
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| .. | .. |
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| 133 | 178 | pinctrl-names = "default"; |
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| 134 | 179 | pinctrl-0 = <&pinctrl_audmux>; /* AUD4<->sgtl5000 */ |
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| 135 | 180 | status = "okay"; |
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| 181 | + |
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| 182 | + ssi2 { |
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| 183 | + fsl,audmux-port = <1>; |
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| 184 | + fsl,port-config = < |
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| 185 | + (IMX_AUDMUX_V2_PTCR_TFSDIR | |
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| 186 | + IMX_AUDMUX_V2_PTCR_TFSEL(4+8) | /* RXFS */ |
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| 187 | + IMX_AUDMUX_V2_PTCR_TCLKDIR | |
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| 188 | + IMX_AUDMUX_V2_PTCR_TCSEL(4+8) | /* RXC */ |
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| 189 | + IMX_AUDMUX_V2_PTCR_SYN) |
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| 190 | + IMX_AUDMUX_V2_PDCR_RXDSEL(4) |
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| 191 | + >; |
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| 192 | + }; |
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| 193 | + |
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| 194 | + aud5 { |
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| 195 | + fsl,audmux-port = <4>; |
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| 196 | + fsl,port-config = < |
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| 197 | + IMX_AUDMUX_V2_PTCR_SYN |
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| 198 | + IMX_AUDMUX_V2_PDCR_RXDSEL(1)>; |
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| 199 | + }; |
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| 136 | 200 | }; |
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| 137 | 201 | |
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| 138 | 202 | &can1 { |
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| .. | .. |
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| 149 | 213 | }; |
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| 150 | 214 | |
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| 151 | 215 | &ecspi2 { |
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| 152 | | - cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>; |
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| 216 | + cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; |
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| 153 | 217 | pinctrl-names = "default"; |
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| 154 | 218 | pinctrl-0 = <&pinctrl_ecspi2>; |
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| 155 | 219 | status = "okay"; |
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| .. | .. |
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| 180 | 244 | pinctrl-0 = <&pinctrl_i2c1>; |
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| 181 | 245 | status = "okay"; |
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| 182 | 246 | |
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| 247 | + gsc: gsc@20 { |
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| 248 | + compatible = "gw,gsc"; |
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| 249 | + reg = <0x20>; |
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| 250 | + interrupt-parent = <&gpio1>; |
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| 251 | + interrupts = <4 IRQ_TYPE_LEVEL_LOW>; |
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| 252 | + interrupt-controller; |
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| 253 | + #interrupt-cells = <1>; |
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| 254 | + #address-cells = <1>; |
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| 255 | + #size-cells = <0>; |
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| 256 | + |
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| 257 | + adc { |
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| 258 | + compatible = "gw,gsc-adc"; |
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| 259 | + #address-cells = <1>; |
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| 260 | + #size-cells = <0>; |
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| 261 | + |
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| 262 | + channel@0 { |
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| 263 | + gw,mode = <0>; |
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| 264 | + reg = <0x00>; |
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| 265 | + label = "temp"; |
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| 266 | + }; |
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| 267 | + |
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| 268 | + channel@2 { |
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| 269 | + gw,mode = <1>; |
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| 270 | + reg = <0x02>; |
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| 271 | + label = "vdd_vin"; |
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| 272 | + }; |
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| 273 | + |
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| 274 | + channel@5 { |
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| 275 | + gw,mode = <1>; |
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| 276 | + reg = <0x05>; |
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| 277 | + label = "vdd_3p3"; |
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| 278 | + }; |
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| 279 | + |
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| 280 | + channel@8 { |
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| 281 | + gw,mode = <1>; |
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| 282 | + reg = <0x08>; |
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| 283 | + label = "vdd_bat"; |
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| 284 | + }; |
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| 285 | + |
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| 286 | + channel@b { |
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| 287 | + gw,mode = <1>; |
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| 288 | + reg = <0x0b>; |
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| 289 | + label = "vdd_5p0"; |
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| 290 | + }; |
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| 291 | + |
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| 292 | + channel@e { |
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| 293 | + gw,mode = <1>; |
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| 294 | + reg = <0xe>; |
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| 295 | + label = "vdd_arm"; |
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| 296 | + }; |
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| 297 | + |
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| 298 | + channel@11 { |
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| 299 | + gw,mode = <1>; |
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| 300 | + reg = <0x11>; |
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| 301 | + label = "vdd_soc"; |
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| 302 | + }; |
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| 303 | + |
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| 304 | + channel@14 { |
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| 305 | + gw,mode = <1>; |
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| 306 | + reg = <0x14>; |
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| 307 | + label = "vdd_3p0"; |
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| 308 | + }; |
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| 309 | + |
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| 310 | + channel@17 { |
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| 311 | + gw,mode = <1>; |
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| 312 | + reg = <0x17>; |
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| 313 | + label = "vdd_1p5"; |
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| 314 | + }; |
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| 315 | + |
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| 316 | + channel@1d { |
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| 317 | + gw,mode = <1>; |
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| 318 | + reg = <0x1d>; |
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| 319 | + label = "vdd_1p8"; |
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| 320 | + }; |
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| 321 | + |
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| 322 | + channel@20 { |
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| 323 | + gw,mode = <1>; |
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| 324 | + reg = <0x20>; |
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| 325 | + label = "vdd_1p0"; |
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| 326 | + }; |
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| 327 | + |
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| 328 | + channel@23 { |
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| 329 | + gw,mode = <1>; |
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| 330 | + reg = <0x23>; |
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| 331 | + label = "vdd_2p5"; |
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| 332 | + }; |
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| 333 | + |
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| 334 | + channel@26 { |
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| 335 | + gw,mode = <1>; |
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| 336 | + reg = <0x26>; |
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| 337 | + label = "vdd_gps"; |
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| 338 | + }; |
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| 339 | + }; |
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| 340 | + |
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| 341 | + fan-controller@2c { |
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| 342 | + compatible = "gw,gsc-fan"; |
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| 343 | + #address-cells = <1>; |
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| 344 | + #size-cells = <0>; |
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| 345 | + reg = <0x2c>; |
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| 346 | + }; |
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| 347 | + }; |
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| 348 | + |
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| 349 | + gsc_gpio: gpio@23 { |
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| 350 | + compatible = "nxp,pca9555"; |
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| 351 | + reg = <0x23>; |
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| 352 | + gpio-controller; |
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| 353 | + #gpio-cells = <2>; |
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| 354 | + interrupt-parent = <&gsc>; |
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| 355 | + interrupts = <4>; |
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| 356 | + }; |
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| 357 | + |
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| 183 | 358 | eeprom1: eeprom@50 { |
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| 184 | 359 | compatible = "atmel,24c02"; |
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| 185 | 360 | reg = <0x50>; |
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| .. | .. |
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| 202 | 377 | compatible = "atmel,24c02"; |
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| 203 | 378 | reg = <0x53>; |
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| 204 | 379 | pagesize = <16>; |
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| 205 | | - }; |
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| 206 | | - |
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| 207 | | - gpio: pca9555@23 { |
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| 208 | | - compatible = "nxp,pca9555"; |
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| 209 | | - reg = <0x23>; |
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| 210 | | - gpio-controller; |
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| 211 | | - #gpio-cells = <2>; |
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| 212 | 380 | }; |
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| 213 | 381 | |
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| 214 | 382 | rtc: ds1672@68 { |
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| .. | .. |
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| 331 | 499 | pinctrl-0 = <&pinctrl_i2c3>; |
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| 332 | 500 | status = "okay"; |
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| 333 | 501 | |
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| 334 | | - codec: sgtl5000@a { |
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| 502 | + sgtl5000: audio-codec@a { |
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| 335 | 503 | compatible = "fsl,sgtl5000"; |
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| 336 | 504 | reg = <0x0a>; |
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| 337 | 505 | clocks = <&clks IMX6QDL_CLK_CKO>; |
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| .. | .. |
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| 345 | 513 | interrupt-parent = <&gpio7>; |
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| 346 | 514 | interrupts = <12 2>; |
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| 347 | 515 | wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>; |
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| 516 | + }; |
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| 517 | + |
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| 518 | + accel@1e { |
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| 519 | + compatible = "nxp,fxos8700"; |
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| 520 | + reg = <0x1e>; |
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| 348 | 521 | }; |
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| 349 | 522 | }; |
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| 350 | 523 | |
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| .. | .. |
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| 399 | 572 | }; |
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| 400 | 573 | |
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| 401 | 574 | &pwm4 { |
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| 575 | + #pwm-cells = <2>; |
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| 402 | 576 | pinctrl-names = "default", "state_dio"; |
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| 403 | 577 | pinctrl-0 = <&pinctrl_pwm4_backlight>; |
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| 404 | 578 | pinctrl-1 = <&pinctrl_pwm4_dio>; |
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| .. | .. |
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| 475 | 649 | MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0 |
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| 476 | 650 | MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0 |
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| 477 | 651 | MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */ |
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| 652 | + MX6QDL_PAD_EIM_D25__AUD5_RXC 0x130b0 |
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| 653 | + MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0 |
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| 654 | + MX6QDL_PAD_EIM_D24__AUD5_RXFS 0x130b0 |
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| 478 | 655 | >; |
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| 479 | 656 | }; |
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| 480 | 657 | |
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| .. | .. |
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| 548 | 725 | fsl,pins = < |
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| 549 | 726 | MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 |
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| 550 | 727 | MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 |
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| 728 | + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0xb0b1 |
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| 551 | 729 | >; |
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| 552 | 730 | }; |
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| 553 | 731 | |
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