| .. | .. |
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| 36 | 36 | #include <drm/drm_rect.h> |
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| 37 | 37 | #include <drm/drm_atomic.h> |
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| 38 | 38 | #include <drm/drm_plane_helper.h> |
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| 39 | +#include <linux/locallock.h> |
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| 39 | 40 | #include "intel_drv.h" |
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| 40 | 41 | #include "intel_frontbuffer.h" |
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| 41 | 42 | #include <drm/i915_drm.h> |
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| .. | .. |
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| 59 | 60 | #else |
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| 60 | 61 | #define VBLANK_EVASION_TIME_US 100 |
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| 61 | 62 | #endif |
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| 63 | + |
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| 64 | +static DEFINE_LOCAL_IRQ_LOCK(pipe_update_lock); |
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| 62 | 65 | |
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| 63 | 66 | /** |
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| 64 | 67 | * intel_pipe_update_start() - start update of a set of display registers |
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| .. | .. |
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| 107 | 110 | if (intel_psr_wait_for_idle(new_crtc_state)) |
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| 108 | 111 | DRM_ERROR("PSR idle timed out, atomic update may fail\n"); |
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| 109 | 112 | |
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| 110 | | - local_irq_disable(); |
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| 113 | + local_lock_irq(pipe_update_lock); |
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| 111 | 114 | |
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| 112 | 115 | crtc->debug.min_vbl = min; |
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| 113 | 116 | crtc->debug.max_vbl = max; |
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| .. | .. |
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| 131 | 134 | break; |
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| 132 | 135 | } |
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| 133 | 136 | |
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| 134 | | - local_irq_enable(); |
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| 137 | + local_unlock_irq(pipe_update_lock); |
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| 135 | 138 | |
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| 136 | 139 | timeout = schedule_timeout(timeout); |
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| 137 | 140 | |
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| 138 | | - local_irq_disable(); |
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| 141 | + local_lock_irq(pipe_update_lock); |
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| 139 | 142 | } |
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| 140 | 143 | |
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| 141 | 144 | finish_wait(wq, &wait); |
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| .. | .. |
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| 168 | 171 | return; |
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| 169 | 172 | |
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| 170 | 173 | irq_disable: |
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| 171 | | - local_irq_disable(); |
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| 174 | + local_lock_irq(pipe_update_lock); |
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| 172 | 175 | } |
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| 173 | 176 | |
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| 174 | 177 | /** |
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| .. | .. |
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| 204 | 207 | new_crtc_state->base.event = NULL; |
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| 205 | 208 | } |
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| 206 | 209 | |
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| 207 | | - local_irq_enable(); |
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| 210 | + local_unlock_irq(pipe_update_lock); |
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| 208 | 211 | |
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| 209 | 212 | if (intel_vgpu_active(dev_priv)) |
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| 210 | 213 | return; |
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