add build kerneldeb

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2023-11-23 7d07b3ae8ddad407913c5301877e694430a3263f

 kernel/drivers/char/hw_random/rockchip-rng.c
..
..
@@ -87,6 +87,27 @@
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 #define TRNG_v1_VERSION_CODE			0x46bc
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 /* end of TRNG_V1 register define */
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89
 
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+/* start of RKRNG register define */
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+#define RKRNG_CTRL				0x0010
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+#define RKRNG_CTRL_INST_REQ			BIT(0)
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+#define RKRNG_CTRL_RESEED_REQ			BIT(1)
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+#define RKRNG_CTRL_TEST_REQ			BIT(2)
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+#define RKRNG_CTRL_SW_DRNG_REQ			BIT(3)
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+#define RKRNG_CTRL_SW_TRNG_REQ			BIT(4)
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+
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+#define RKRNG_STATE				0x0014
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+#define RKRNG_STATE_INST_ACK			BIT(0)
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+#define RKRNG_STATE_RESEED_ACK			BIT(1)
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+#define RKRNG_STATE_TEST_ACK			BIT(2)
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+#define RKRNG_STATE_SW_DRNG_ACK			BIT(3)
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+#define RKRNG_STATE_SW_TRNG_ACK			BIT(4)
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+
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+/* DRNG_DATA_0 ~ DNG_DATA_7 */
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+#define RKRNG_DRNG_DATA_0			0x0070
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+#define RKRNG_DRNG_DATA_7			0x008C
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+
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+/* end of RKRNG register define */
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+
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 struct rk_rng_soc_data {
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 	u32 default_offset;
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113
 
..
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@@ -178,7 +199,7 @@
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 		*(u32 *)(buf + i) = be32_to_cpu(rk_rng_readl(rng, offset + i));
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 }
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-static int rk_crypto_v1_read(struct hwrng *rng, void *buf, size_t max, bool wait)
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+static int crypto_v1_read(struct hwrng *rng, void *buf, size_t max, bool wait)
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 {
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 	int ret = 0;
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 	u32 reg_ctrl = 0;
..
..
@@ -211,7 +232,7 @@
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 	return ret;
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 }
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234
 
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-static int rk_crypto_v2_read(struct hwrng *rng, void *buf, size_t max, bool wait)
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+static int crypto_v2_read(struct hwrng *rng, void *buf, size_t max, bool wait)
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 {
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 	int ret = 0;
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 	u32 reg_ctrl = 0;
..
..
@@ -246,18 +267,12 @@
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 	return ret;
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 }
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269
 
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-static int rk_trng_v1_init(struct hwrng *rng)
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+static int trng_v1_init(struct hwrng *rng)
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 {
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 	int ret;
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 	uint32_t auto_reseed_cnt = 1000;
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 	uint32_t reg_ctrl, status, version;
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 	struct rk_rng *rk_rng = container_of(rng, struct rk_rng, rng);
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-
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-	ret = pm_runtime_get_sync(rk_rng->dev);
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-	if (ret < 0) {
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-		pm_runtime_put_noidle(rk_rng->dev);
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-		return ret;
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-	}
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276
 
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 	version = rk_rng_readl(rk_rng, TRNG_V1_VERSION);
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 	if (version != TRNG_v1_VERSION_CODE) {
..
..
@@ -296,13 +311,11 @@
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311
 
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 	ret = 0;
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 exit:
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-	pm_runtime_mark_last_busy(rk_rng->dev);
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-	pm_runtime_put_sync_autosuspend(rk_rng->dev);
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314
 
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 	return ret;
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 }
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-static int rk_trng_v1_read(struct hwrng *rng, void *buf, size_t max, bool wait)
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+static int trng_v1_read(struct hwrng *rng, void *buf, size_t max, bool wait)
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 {
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 	int ret = 0;
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 	u32 reg_ctrl = 0;
..
..
@@ -345,37 +358,92 @@
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 	return ret;
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 }
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360
 
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-static const struct rk_rng_soc_data rk_crypto_v1_soc_data = {
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+static int rkrng_init(struct hwrng *rng)
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+{
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+	struct rk_rng *rk_rng = container_of(rng, struct rk_rng, rng);
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+	u32 reg = 0;
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+
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+	rk_rng_writel(rk_rng, HIWORD_UPDATE(0, 0xffff, 0), RKRNG_CTRL);
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+
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+	reg = rk_rng_readl(rk_rng, RKRNG_STATE);
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+	rk_rng_writel(rk_rng, reg, RKRNG_STATE);
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+
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+	return 0;
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+}
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+
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+static int rkrng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
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+{
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+	struct rk_rng *rk_rng = container_of(rng, struct rk_rng, rng);
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+	u32 reg_ctrl = 0;
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+	int ret;
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+
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+	reg_ctrl = RKRNG_CTRL_SW_DRNG_REQ;
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+
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+	rk_rng_writel(rk_rng, HIWORD_UPDATE(reg_ctrl, 0xffff, 0), RKRNG_CTRL);
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+
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+	ret = readl_poll_timeout(rk_rng->mem + RKRNG_STATE, reg_ctrl,
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+				 (reg_ctrl & RKRNG_STATE_SW_DRNG_ACK),
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+				 ROCKCHIP_POLL_PERIOD_US,
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+				 ROCKCHIP_POLL_TIMEOUT_US);
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+
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+	if (ret)
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+		goto exit;
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+
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+	rk_rng_writel(rk_rng, reg_ctrl, RKRNG_STATE);
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+
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+	ret = min_t(size_t, max, RK_MAX_RNG_BYTE);
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+
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+	rk_rng_read_regs(rk_rng, RKRNG_DRNG_DATA_0, buf, ret);
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+
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+exit:
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+	/* close TRNG */
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+	rk_rng_writel(rk_rng, HIWORD_UPDATE(0, 0xffff, 0), RKRNG_CTRL);
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+
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+	return ret;
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+}
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+
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+static const struct rk_rng_soc_data crypto_v1_soc_data = {
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 	.default_offset = 0,
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407
 
351
-	.rk_rng_read = rk_crypto_v1_read,
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+	.rk_rng_read = crypto_v1_read,
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409
 };
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410
 
354
-static const struct rk_rng_soc_data rk_crypto_v2_soc_data = {
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+static const struct rk_rng_soc_data crypto_v2_soc_data = {
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 	.default_offset = CRYPTO_V2_RNG_DEFAULT_OFFSET,
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413
 
357
-	.rk_rng_read = rk_crypto_v2_read,
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+	.rk_rng_read = crypto_v2_read,
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415
 };
359
416
 
360
-static const struct rk_rng_soc_data rk_trng_v1_soc_data = {
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+static const struct rk_rng_soc_data trng_v1_soc_data = {
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 	.default_offset = 0,
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419
 
363
-	.rk_rng_init = rk_trng_v1_init,
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-	.rk_rng_read = rk_trng_v1_read,
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+	.rk_rng_init = trng_v1_init,
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+	.rk_rng_read = trng_v1_read,
422
+};
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+
424
+static const struct rk_rng_soc_data rkrng_soc_data = {
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+	.default_offset = 0,
426
+
427
+	.rk_rng_init = rkrng_init,
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+	.rk_rng_read = rkrng_read,
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 };
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430
 
367
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 static const struct of_device_id rk_rng_dt_match[] = {
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 	{
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 		.compatible = "rockchip,cryptov1-rng",
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-		.data = (void *)&rk_crypto_v1_soc_data,
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+		.data = (void *)&crypto_v1_soc_data,
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 	},
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 	{
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 		.compatible = "rockchip,cryptov2-rng",
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-		.data = (void *)&rk_crypto_v2_soc_data,
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+		.data = (void *)&crypto_v2_soc_data,
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 	},
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 	{
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 		.compatible = "rockchip,trngv1",
378
-		.data = (void *)&rk_trng_v1_soc_data,
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+		.data = (void *)&trng_v1_soc_data,
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+	},
444
+		{
445
+		.compatible = "rockchip,rkrng",
446
+		.data = (void *)&rkrng_soc_data,
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 	},
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448
 	{ },
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449
 };
..
..
@@ -445,9 +513,15 @@
445
513
 	}
446
514
 
447
515
 	/* for some platform need hardware operation when probe */
448
-	if (rk_rng->soc_data->rk_rng_init)
516
+	if (rk_rng->soc_data->rk_rng_init) {
517
+		pm_runtime_get_sync(rk_rng->dev);
518
+
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519
 		ret = rk_rng->soc_data->rk_rng_init(&rk_rng->rng);
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520
 
521
+		pm_runtime_mark_last_busy(rk_rng->dev);
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+		pm_runtime_put_sync_autosuspend(rk_rng->dev);
523
+	}
524
+
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 	return ret;
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 }
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