hc
2024-05-10 748e4f3d702def1a4bff191e0cf93b6a05340f01
kernel/drivers/net/phy/dp83867.c
....@@ -41,6 +41,7 @@
4141 #define DP83867_STRAP_STS1 0x006E
4242 #define DP83867_STRAP_STS2 0x006f
4343 #define DP83867_RGMIIDCTL 0x0086
44
+#define DP83867_DSP_FFE_CFG 0x012c
4445 #define DP83867_RXFCFG 0x0134
4546 #define DP83867_RXFPMD1 0x0136
4647 #define DP83867_RXFPMD2 0x0137
....@@ -801,14 +802,33 @@
801802 {
802803 int err;
803804
805
+ err = phy_write(phydev, DP83867_CTRL, DP83867_SW_RESET);
806
+ if (err < 0)
807
+ return err;
808
+
809
+ usleep_range(10, 20);
810
+
811
+ err = phy_modify(phydev, MII_DP83867_PHYCTRL,
812
+ DP83867_PHYCR_FORCE_LINK_GOOD, 0);
813
+ if (err < 0)
814
+ return err;
815
+
816
+ /* Configure the DSP Feedforward Equalizer Configuration register to
817
+ * improve short cable (< 1 meter) performance. This will not affect
818
+ * long cable performance.
819
+ */
820
+ err = phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_DSP_FFE_CFG,
821
+ 0x0e81);
822
+ if (err < 0)
823
+ return err;
824
+
804825 err = phy_write(phydev, DP83867_CTRL, DP83867_SW_RESTART);
805826 if (err < 0)
806827 return err;
807828
808829 usleep_range(10, 20);
809830
810
- return phy_modify(phydev, MII_DP83867_PHYCTRL,
811
- DP83867_PHYCR_FORCE_LINK_GOOD, 0);
831
+ return 0;
812832 }
813833
814834 static void dp83867_link_change_notify(struct phy_device *phydev)