add gpio led uart

hc

2024-05-10 748e4f3d702def1a4bff191e0cf93b6a05340f01

 kernel/arch/sparc/include/asm/pgtsrmmu.h
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..
@@ -17,39 +17,9 @@
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 /* Number of contexts is implementation-dependent; 64k is the most we support */
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 #define SRMMU_MAX_CONTEXTS	65536
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-/* PMD_SHIFT determines the size of the area a second-level page table entry can map */
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-#define SRMMU_REAL_PMD_SHIFT		18
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-#define SRMMU_REAL_PMD_SIZE		(1UL << SRMMU_REAL_PMD_SHIFT)
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-#define SRMMU_REAL_PMD_MASK		(~(SRMMU_REAL_PMD_SIZE-1))
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-#define SRMMU_REAL_PMD_ALIGN(__addr)	(((__addr)+SRMMU_REAL_PMD_SIZE-1)&SRMMU_REAL_PMD_MASK)
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-
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-/* PGDIR_SHIFT determines what a third-level page table entry can map */
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-#define SRMMU_PGDIR_SHIFT       24
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-#define SRMMU_PGDIR_SIZE        (1UL << SRMMU_PGDIR_SHIFT)
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-#define SRMMU_PGDIR_MASK        (~(SRMMU_PGDIR_SIZE-1))
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-#define SRMMU_PGDIR_ALIGN(addr) (((addr)+SRMMU_PGDIR_SIZE-1)&SRMMU_PGDIR_MASK)
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-
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-#define SRMMU_REAL_PTRS_PER_PTE	64
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-#define SRMMU_REAL_PTRS_PER_PMD	64
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-#define SRMMU_PTRS_PER_PGD	256
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-
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-#define SRMMU_REAL_PTE_TABLE_SIZE	(SRMMU_REAL_PTRS_PER_PTE*4)
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-#define SRMMU_PMD_TABLE_SIZE		(SRMMU_REAL_PTRS_PER_PMD*4)
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-#define SRMMU_PGD_TABLE_SIZE		(SRMMU_PTRS_PER_PGD*4)
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-
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-/*
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- * To support pagetables in highmem, Linux introduces APIs which
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- * return struct page* and generally manipulate page tables when
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- * they are not mapped into kernel space. Our hardware page tables
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- * are smaller than pages. We lump hardware tabes into big, page sized
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- * software tables.
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- *
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- * PMD_SHIFT determines the size of the area a second-level page table entry
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- * can map, and our pmd_t is 16 times larger than normal.  The values which
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- * were once defined here are now generic for 4c and srmmu, so they're
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- * found in pgtable.h.
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- */
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-#define SRMMU_PTRS_PER_PMD	4
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+#define SRMMU_PTE_TABLE_SIZE		(PTRS_PER_PTE*4)
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+#define SRMMU_PMD_TABLE_SIZE		(PTRS_PER_PMD*4)
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+#define SRMMU_PGD_TABLE_SIZE		(PTRS_PER_PGD*4)
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 /* Definition of the values in the ET field of PTD's and PTE's */
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 #define SRMMU_ET_MASK         0x3