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2024-05-10 748e4f3d702def1a4bff191e0cf93b6a05340f01

 kernel/arch/parisc/kernel/pci.c
..
..
@@ -34,25 +34,14 @@
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 #define DBG_RES(x...)
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 #endif
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-/* To be used as: mdelay(pci_post_reset_delay);
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- *
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- * post_reset is the time the kernel should stall to prevent anyone from
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- * accessing the PCI bus once #RESET is de-asserted. 
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- * PCI spec somewhere says 1 second but with multi-PCI bus systems,
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- * this makes the boot time much longer than necessary.
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- * 20ms seems to work for all the HP PCI implementations to date.
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- *
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- * #define pci_post_reset_delay 50
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- */
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+struct pci_port_ops *pci_port __ro_after_init;
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+struct pci_bios_ops *pci_bios __ro_after_init;
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-struct pci_port_ops *pci_port __read_mostly;
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-struct pci_bios_ops *pci_bios __read_mostly;
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-
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-static int pci_hba_count __read_mostly;
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+static int pci_hba_count __ro_after_init;
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 /* parisc_pci_hba used by pci_port->in/out() ops to lookup bus data.  */
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 #define PCI_HBA_MAX 32
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-static struct pci_hba_data *parisc_pci_hba[PCI_HBA_MAX] __read_mostly;
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+static struct pci_hba_data *parisc_pci_hba[PCI_HBA_MAX] __ro_after_init;
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 /********************************************************************