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2024-05-10 748e4f3d702def1a4bff191e0cf93b6a05340f01

 kernel/arch/ia64/mm/tlb.c
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@@ -1,3 +1,4 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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  * TLB support routines.
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  *
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@@ -21,12 +22,11 @@
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 #include <linux/sched.h>
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 #include <linux/smp.h>
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 #include <linux/mm.h>
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-#include <linux/bootmem.h>
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+#include <linux/memblock.h>
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 #include <linux/slab.h>
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 #include <asm/delay.h>
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 #include <asm/mmu_context.h>
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-#include <asm/pgalloc.h>
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 #include <asm/pal.h>
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 #include <asm/tlbflush.h>
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 #include <asm/dma.h>
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@@ -59,8 +59,16 @@
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 void __init
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 mmu_context_init (void)
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 {
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-	ia64_ctx.bitmap = alloc_bootmem((ia64_ctx.max_ctx+1)>>3);
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-	ia64_ctx.flushmap = alloc_bootmem((ia64_ctx.max_ctx+1)>>3);
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+	ia64_ctx.bitmap = memblock_alloc((ia64_ctx.max_ctx + 1) >> 3,
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+					 SMP_CACHE_BYTES);
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+	if (!ia64_ctx.bitmap)
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+		panic("%s: Failed to allocate %u bytes\n", __func__,
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+		      (ia64_ctx.max_ctx + 1) >> 3);
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+	ia64_ctx.flushmap = memblock_alloc((ia64_ctx.max_ctx + 1) >> 3,
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+					   SMP_CACHE_BYTES);
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+	if (!ia64_ctx.flushmap)
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+		panic("%s: Failed to allocate %u bytes\n", __func__,
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+		      (ia64_ctx.max_ctx + 1) >> 3);
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 }
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 /*
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@@ -236,7 +244,8 @@
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 	spinaphore_init(&ptcg_sem, max_purges);
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 }
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-void
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+#ifdef CONFIG_SMP
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+static void
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 ia64_global_tlb_purge (struct mm_struct *mm, unsigned long start,
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 		       unsigned long end, unsigned long nbits)
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 {
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@@ -273,6 +282,7 @@
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                 activate_context(active_mm);
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         }
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 }
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+#endif /* CONFIG_SMP */
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 void
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 local_flush_tlb_all (void)
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@@ -297,8 +307,8 @@
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 	ia64_srlz_i();			/* srlz.i implies srlz.d */
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 }
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-void
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-flush_tlb_range (struct vm_area_struct *vma, unsigned long start,
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+static void
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+__flush_tlb_range (struct vm_area_struct *vma, unsigned long start,
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 		 unsigned long end)
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 {
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 	struct mm_struct *mm = vma->vm_mm;
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@@ -323,7 +333,7 @@
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 	preempt_disable();
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 #ifdef CONFIG_SMP
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 	if (mm != current->active_mm || cpumask_weight(mm_cpumask(mm)) != 1) {
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-		platform_global_tlb_purge(mm, start, end, nbits);
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+		ia64_global_tlb_purge(mm, start, end, nbits);
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 		preempt_enable();
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 		return;
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 	}
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@@ -335,11 +345,30 @@
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 	preempt_enable();
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 	ia64_srlz_i();			/* srlz.i implies srlz.d */
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 }
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+
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+void flush_tlb_range(struct vm_area_struct *vma,
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+		unsigned long start, unsigned long end)
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+{
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+	if (unlikely(end - start >= 1024*1024*1024*1024UL
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+			|| REGION_NUMBER(start) != REGION_NUMBER(end - 1))) {
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+		/*
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+		 * If we flush more than a tera-byte or across regions, we're
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+		 * probably better off just flushing the entire TLB(s).  This
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+		 * should be very rare and is not worth optimizing for.
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+		 */
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+		flush_tlb_all();
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+	} else {
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+		/* flush the address range from the tlb */
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+		__flush_tlb_range(vma, start, end);
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+		/* flush the virt. page-table area mapping the addr range */
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+		__flush_tlb_range(vma, ia64_thash(start), ia64_thash(end));
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+	}
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+}
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 EXPORT_SYMBOL(flush_tlb_range);
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 void ia64_tlb_init(void)
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 {
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-	ia64_ptce_info_t uninitialized_var(ptce_info); /* GCC be quiet */
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+	ia64_ptce_info_t ptce_info;
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 	u64 tr_pgbits;
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 	long status;
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 	pal_vm_info_1_u_t vm_info_1;