add gpio led uart

hc

2024-05-10 748e4f3d702def1a4bff191e0cf93b6a05340f01

 kernel/arch/arm/boot/dts/r7s72100.dtsi
..
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@@ -313,9 +313,9 @@
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 		mmcif: mmc@e804c800 {
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 			compatible = "renesas,mmcif-r7s72100", "renesas,sh-mmcif";
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 			reg = <0xe804c800 0x80>;
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-			interrupts = <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH
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-				      GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH
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-				      GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
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+			interrupts = <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
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+				     <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
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+				     <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
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 			clocks = <&mstp8_clks R7S72100_CLK_MMCIF>;
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 			power-domains = <&cpg_clocks>;
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 			reg-io-width = <4>;
..
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@@ -323,12 +323,12 @@
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 			status = "disabled";
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 		};
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-		sdhi0: sd@e804e000 {
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+		sdhi0: mmc@e804e000 {
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 			compatible = "renesas,sdhi-r7s72100";
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 			reg = <0xe804e000 0x100>;
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-			interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH
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-				      GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH
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-				      GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
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+			interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>,
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+				     <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
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+				     <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
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 			clocks = <&mstp12_clks R7S72100_CLK_SDHI00>,
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 				 <&mstp12_clks R7S72100_CLK_SDHI01>;
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@@ -339,12 +339,12 @@
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 			status = "disabled";
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 		};
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-		sdhi1: sd@e804e800 {
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+		sdhi1: mmc@e804e800 {
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 			compatible = "renesas,sdhi-r7s72100";
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 			reg = <0xe804e800 0x100>;
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-			interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH
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-				      GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH
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-				      GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>;
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+			interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
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+				     <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
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+				     <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>;
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 			clocks = <&mstp12_clks R7S72100_CLK_SDHI10>,
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 				 <&mstp12_clks R7S72100_CLK_SDHI11>;
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@@ -467,11 +467,12 @@
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 			#clock-cells = <1>;
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 			compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
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 			reg = <0xfcfe0438 4>;
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-			clocks = <&p0_clk>, <&p0_clk>, <&p0_clk>, <&p0_clk>;
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+			clocks = <&p0_clk>, <&p0_clk>, <&p0_clk>, <&p0_clk>, <&b_clk>, <&b_clk>;
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 			clock-indices = <
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 				R7S72100_CLK_I2C0 R7S72100_CLK_I2C1 R7S72100_CLK_I2C2 R7S72100_CLK_I2C3
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+				R7S72100_CLK_SPIBSC0 R7S72100_CLK_SPIBSC1
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 			>;
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-			clock-output-names = "i2c0", "i2c1", "i2c2", "i2c3";
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+			clock-output-names = "i2c0", "i2c1", "i2c2", "i2c3", "spibsc0", "spibsc1";
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 		};
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 		mstp10_clks: mstp10_clks@fcfe043c {
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@@ -498,7 +499,7 @@
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 			clock-output-names = "sdhi00", "sdhi01", "sdhi10", "sdhi11";
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 		};
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-		pinctrl: pin-controller@fcfe3000 {
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+		pinctrl: pinctrl@fcfe3000 {
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 			compatible = "renesas,r7s72100-ports";
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 			reg = <0xfcfe3000 0x4230>;
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@@ -670,6 +671,25 @@
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 			status = "disabled";
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 		};
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+		irqc: interrupt-controller@fcfef800 {
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+			compatible = "renesas,r7s72100-irqc",
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+				     "renesas,rza1-irqc";
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+			#interrupt-cells = <2>;
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+			#address-cells = <0>;
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+			interrupt-controller;
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+			reg = <0xfcfef800 0x6>;
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+			interrupt-map =
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+				<0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
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+				<1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
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+				<2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
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+				<3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
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+				<4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
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+				<5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
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+				<6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
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+				<7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
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+			interrupt-map-mask = <7 0>;
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+		};
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+
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 		mtu2: timer@fcff0000 {
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 			compatible = "renesas,mtu2-r7s72100", "renesas,mtu2";
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 			reg = <0xfcff0000 0x400>;