.. | .. |
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28 | 28 | See ../reset/reset.txt for details. |
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29 | 29 | - reset-names : Must include the following entries: |
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30 | 30 | - soctherm |
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31 | | -- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description |
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32 | | - of this property. See <dt-bindings/thermal/tegra124-soctherm.h> for a |
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33 | | - list of valid values when referring to thermal sensors. |
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| 31 | +- #thermal-sensor-cells : Should be 1. For a description of this property, see |
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| 32 | + Documentation/devicetree/bindings/thermal/thermal-sensor.yaml. |
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| 33 | + See <dt-bindings/thermal/tegra124-soctherm.h> for a list of valid values |
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| 34 | + when referring to thermal sensors. |
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34 | 35 | - throttle-cfgs: A sub-node which is a container of configuration for each |
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35 | 36 | hardware throttle events. These events can be set as cooling devices. |
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36 | 37 | * throttle events: Sub-nodes must be named as "light" or "heavy". |
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.. | .. |
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52 | 53 | Must set as following values: |
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53 | 54 | TEGRA_SOCTHERM_THROT_LEVEL_LOW, TEGRA_SOCTHERM_THROT_LEVEL_MED |
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54 | 55 | TEGRA_SOCTHERM_THROT_LEVEL_HIGH, TEGRA_SOCTHERM_THROT_LEVEL_NONE |
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| 56 | + - nvidia,gpu-throt-level: This property is for Tegra124 and Tegra210. |
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| 57 | + It is the level of pulse skippers, which used to throttle clock |
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| 58 | + frequencies. It indicates gpu clock throttling depth and can be |
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| 59 | + programmed to any of the following values which represent a throttling |
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| 60 | + percentage: |
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| 61 | + TEGRA_SOCTHERM_THROT_LEVEL_NONE (0%) |
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| 62 | + TEGRA_SOCTHERM_THROT_LEVEL_LOW (50%), |
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| 63 | + TEGRA_SOCTHERM_THROT_LEVEL_MED (75%), |
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| 64 | + TEGRA_SOCTHERM_THROT_LEVEL_HIGH (85%). |
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55 | 65 | - #cooling-cells: Should be 1. This cooling device only support on/off state. |
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56 | | - See ./thermal.txt for a description of this property. |
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| 66 | + For a description of this property see: |
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| 67 | + Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml |
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| 68 | + |
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| 69 | + Optional properties: The following properties are T210 specific and |
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| 70 | + valid only for OCx throttle events. |
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| 71 | + - nvidia,count-threshold: Specifies the number of OC events that are |
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| 72 | + required for triggering an interrupt. Interrupts are not triggered if |
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| 73 | + the property is missing. A value of 0 will interrupt on every OC alarm. |
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| 74 | + - nvidia,polarity-active-low: Configures the polarity of the OC alaram |
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| 75 | + signal. If present, this means assert low, otherwise assert high. |
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| 76 | + - nvidia,alarm-filter: Number of clocks to filter event. When the filter |
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| 77 | + expires (which means the OC event has not occurred for a long time), |
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| 78 | + the counter is cleared and filter is rearmed. Default value is 0. |
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| 79 | + - nvidia,throttle-period-us: Specifies the number of uSec for which |
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| 80 | + throttling is engaged after the OC event is deasserted. Default value |
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| 81 | + is 0. |
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| 82 | + |
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| 83 | +Optional properties: |
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| 84 | +- nvidia,thermtrips : When present, this property specifies the temperature at |
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| 85 | + which the soctherm hardware will assert the thermal trigger signal to the |
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| 86 | + Power Management IC, which can be configured to reset or shutdown the device. |
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| 87 | + It is an array of pairs where each pair represents a tsensor id followed by a |
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| 88 | + temperature in milli Celcius. In the absence of this property the critical |
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| 89 | + trip point will be used for thermtrip temperature. |
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57 | 90 | |
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58 | 91 | Note: |
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59 | | -- the "critical" type trip points will be set to SOC_THERM hardware as the |
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60 | | -shut down temperature. Once the temperature of this thermal zone is higher |
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61 | | -than it, the system will be shutdown or reset by hardware. |
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| 92 | +- the "critical" type trip points will be used to set the temperature at which |
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| 93 | +the SOC_THERM hardware will assert a thermal trigger if the "nvidia,thermtrips" |
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| 94 | +property is missing. When the thermtrips property is present, the breach of a |
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| 95 | +critical trip point is reported back to the thermal framework to implement |
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| 96 | +software shutdown. |
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| 97 | + |
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62 | 98 | - the "hot" type trip points will be set to SOC_THERM hardware as the throttle |
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63 | 99 | temperature. Once the the temperature of this thermal zone is higher |
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64 | 100 | than it, it will trigger the HW throttle event. |
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.. | .. |
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79 | 115 | |
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80 | 116 | #thermal-sensor-cells = <1>; |
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81 | 117 | |
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| 118 | + nvidia,thermtrips = <TEGRA124_SOCTHERM_SENSOR_CPU 102500 |
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| 119 | + TEGRA124_SOCTHERM_SENSOR_GPU 103000>; |
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| 120 | + |
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82 | 121 | throttle-cfgs { |
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83 | 122 | /* |
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84 | 123 | * When the "heavy" cooling device triggered, |
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85 | | - * the HW will skip cpu clock's pulse in 85% depth |
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| 124 | + * the HW will skip cpu clock's pulse in 85% depth, |
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| 125 | + * skip gpu clock's pulse in 85% level |
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86 | 126 | */ |
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87 | 127 | throttle_heavy: heavy { |
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88 | 128 | nvidia,priority = <100>; |
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89 | 129 | nvidia,cpu-throt-percent = <85>; |
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| 130 | + nvidia,gpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_HIGH>; |
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90 | 131 | |
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91 | 132 | #cooling-cells = <1>; |
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92 | 133 | }; |
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93 | 134 | |
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94 | 135 | /* |
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95 | 136 | * When the "light" cooling device triggered, |
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96 | | - * the HW will skip cpu clock's pulse in 50% depth |
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| 137 | + * the HW will skip cpu clock's pulse in 50% depth, |
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| 138 | + * skip gpu clock's pulse in 50% level |
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97 | 139 | */ |
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98 | 140 | throttle_light: light { |
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99 | 141 | nvidia,priority = <80>; |
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100 | 142 | nvidia,cpu-throt-percent = <50>; |
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| 143 | + nvidia,gpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_LOW>; |
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101 | 144 | |
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102 | 145 | #cooling-cells = <1>; |
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103 | 146 | }; |
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.. | .. |
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107 | 150 | * arbiter will select the highest priority as the final throttle |
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108 | 151 | * settings to skip cpu pulse. |
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109 | 152 | */ |
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| 153 | + |
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| 154 | + throttle_oc1: oc1 { |
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| 155 | + nvidia,priority = <50>; |
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| 156 | + nvidia,polarity-active-low; |
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| 157 | + nvidia,count-threshold = <100>; |
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| 158 | + nvidia,alarm-filter = <5100000>; |
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| 159 | + nvidia,throttle-period-us = <0>; |
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| 160 | + nvidia,cpu-throt-percent = <75>; |
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| 161 | + nvidia,gpu-throt-level = |
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| 162 | + <TEGRA_SOCTHERM_THROT_LEVEL_MED>; |
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| 163 | + }; |
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110 | 164 | }; |
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111 | 165 | }; |
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112 | 166 | |
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