add r8169 read mac form eeprom

hc

2023-11-20 69d6da3c1c63675524a25e7dc92a4f43c4164cef

 kernel/arch/arm64/boot/dts/rockchip/rk3568-evb.dtsi
..
..
@@ -103,7 +103,7 @@
103
103
 
104
104
 	backlight1: backlight1 {
105
105
 		compatible = "pwm-backlight";
106
-		pwms = <&pwm5 0 25000 0>;
106
+		pwms = <&pwm6 0 25000 0>;
107
107
 		brightness-levels = <
108
108
 			  0  20  20  21  21  22  22  23
109
109
 			 23  24  24  25  25  26  26  27
..
..
@@ -139,6 +139,27 @@
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139
 			248 249 250 251 252 253 254 255
140
140
 		>;
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141
 		default-brightness-level = <200>;
142
+	};
143
+
144
+	bt_sco: bt-sco {
145
+		status = "disabled";
146
+		compatible = "delta,dfbmcs320";
147
+		#sound-dai-cells = <1>;
148
+	};
149
+
150
+	bt_sound: bt-sound {
151
+		status = "disabled";
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+		compatible = "simple-audio-card";
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+		simple-audio-card,format = "dsp_a";
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+		simple-audio-card,bitclock-inversion = <0>;
155
+		simple-audio-card,mclk-fs = <256>;
156
+		simple-audio-card,name = "rockchip,bt";
157
+		simple-audio-card,cpu {
158
+			sound-dai = <&i2s3_2ch>;
159
+		};
160
+		simple-audio-card,codec {
161
+			sound-dai = <&bt_sco 1>;
162
+		};
142
163
 	};
143
164
 
144
165
 	dc_12v: dc-12v {
..
..
@@ -187,17 +208,15 @@
187
208
 
188
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 	rk809_sound: rk809-sound {
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210
 		status = "okay";
190
-		compatible = "simple-audio-card";
191
-		simple-audio-card,format = "i2s";
192
-		simple-audio-card,name = "rockchip,rk809-codec";
193
-		simple-audio-card,mclk-fs = <256>;
194
-
195
-		simple-audio-card,cpu {
196
-			sound-dai = <&i2s1_8ch>;
197
-		};
198
-		simple-audio-card,codec {
199
-			sound-dai = <&rk809_codec>;
200
-		};
211
+		compatible = "rockchip,multicodecs-card";
212
+		rockchip,card-name = "rockchip-rk809";
213
+		hp-det-gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>;
214
+		rockchip,format = "i2s";
215
+		rockchip,mclk-fs = <256>;
216
+		rockchip,cpu = <&i2s1_8ch>;
217
+		rockchip,codec = <&rk809_codec>;
218
+		pinctrl-names = "default";
219
+		pinctrl-0 = <&hp_det>;
201
220
 	};
202
221
 
203
222
 	spdif-sound {
..
..
@@ -273,8 +292,6 @@
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292
 	vcc5v0_otg: vcc5v0-otg-regulator {
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 		compatible = "regulator-fixed";
275
294
 		regulator-name = "vcc5v0_otg";
276
-		egulator-boot-on;
277
-		regulator-always-on;
278
295
 		regulator-min-microvolt = <5000000>;
279
296
 		regulator-max-microvolt = <5000000>;
280
297
 		enable-active-high;
..
..
@@ -1070,7 +1087,28 @@
1070
1087
 	status = "okay";
1071
1088
 };
1072
1089
 
1090
+&hdmi {
1091
+	status = "okay";
1092
+	rockchip,phy-table =
1093
+		<92812500  0x8009 0x0000 0x0270>,
1094
+		<165000000 0x800b 0x0000 0x026d>,
1095
+		<185625000 0x800b 0x0000 0x01ed>,
1096
+		<297000000 0x800b 0x0000 0x01ad>,
1097
+		<594000000 0x8029 0x0000 0x0088>,
1098
+		<000000000 0x0000 0x0000 0x0000>;
1099
+};
1073
1100
 
1101
+&hdmi_in_vp0 {
1102
+	status = "okay";
1103
+};
1104
+
1105
+&hdmi_in_vp1 {
1106
+	status = "disabled";
1107
+};
1108
+
1109
+&hdmi_sound {
1110
+	status = "okay";
1111
+};
1074
1112
 
1075
1113
 &i2c0 {
1076
1114
 	status = "okay";
..
..
@@ -1084,7 +1122,6 @@
1084
1122
 		regulator-min-microvolt = <712500>;
1085
1123
 		regulator-max-microvolt = <1390000>;
1086
1124
 		regulator-init-microvolt = <900000>;
1087
-		regulator-initial-mode = <1>;
1088
1125
 		regulator-ramp-delay = <2300>;
1089
1126
 		fcs,suspend-voltage-selector = <1>;
1090
1127
 		regulator-boot-on;
..
..
@@ -1246,8 +1283,8 @@
1246
1283
 			vccio_acodec: LDO_REG4 {
1247
1284
 				regulator-always-on;
1248
1285
 				regulator-boot-on;
1249
-				regulator-min-microvolt = <3300000>;
1250
-				regulator-max-microvolt = <3300000>;
1286
+				regulator-min-microvolt = <3000000>;
1287
+				regulator-max-microvolt = <3000000>;
1251
1288
 				regulator-name = "vccio_acodec";
1252
1289
 				regulator-state-mem {
1253
1290
 					regulator-off-in-suspend;
..
..
@@ -1361,15 +1398,6 @@
1361
1398
 
1362
1399
 &i2c1 {
1363
1400
 	status = "okay";
1364
-
1365
-	gt1x: gt1x@14 {
1366
-		compatible = "goodix,gt1x";
1367
-		reg = <0x14>;
1368
-		pinctrl-names = "default";
1369
-		pinctrl-0 = <&touch_gpio>;
1370
-		goodix,rst-gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
1371
-		goodix,irq-gpio = <&gpio0 RK_PB5 IRQ_TYPE_LEVEL_LOW>;
1372
-	};
1373
1401
 };
1374
1402
 
1375
1403
 &i2c5 {
..
..
@@ -1402,6 +1430,12 @@
1402
1430
 		     &i2s1m0_lrcktx
1403
1431
 		     &i2s1m0_sdi0
1404
1432
 		     &i2s1m0_sdo0>;
1433
+};
1434
+
1435
+&i2s3_2ch {
1436
+	pinctrl-0 = <&i2s3m0_sclk &i2s3m0_lrck &i2s3m0_sdi &i2s3m0_sdo>;
1437
+	rockchip,bclk-fs = <32>;
1438
+	status = "disabled";
1405
1439
 };
1406
1440
 
1407
1441
 &iep {
..
..
@@ -1439,6 +1473,12 @@
1439
1473
 };
1440
1474
 
1441
1475
 &pinctrl {
1476
+
1477
+	headphone {
1478
+		hp_det: hp-det {
1479
+			rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_down>;
1480
+		};
1481
+	};
1442
1482
 
1443
1483
 	mxc6655xa {
1444
1484
 		mxc6655xa_irq_gpio: mxc6655xa_irq_gpio {
..
..
@@ -1479,7 +1519,6 @@
1479
1519
 	sdio-pwrseq {
1480
1520
 		wifi_enable_h: wifi-enable-h {
1481
1521
 			rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
1482
-			//WIFI_REG_ON_H_GPIO2_B1
1483
1522
 		};
1484
1523
 	};
1485
1524
 
..
..
@@ -1528,6 +1567,10 @@
1528
1567
 };
1529
1568
 
1530
1569
 &pwm4 {
1570
+	status = "okay";
1571
+};
1572
+
1573
+&pwm6 {
1531
1574
 	status = "okay";
1532
1575
 };
1533
1576
 
..
..
@@ -1670,7 +1713,10 @@
1670
1713
 	status = "okay";
1671
1714
 };
1672
1715
 
1673
-
1716
+&route_hdmi {
1717
+	status = "okay";
1718
+	connect = <&vp0_out_hdmi>;
1719
+};
1674
1720
 
1675
1721
 &saradc {
1676
1722
 	status = "okay";
..
..
@@ -1767,15 +1813,6 @@
1767
1813
 };
1768
1814
 
1769
1815
 &usbhost_dwc3 {
1770
-//	phys = <&u2phy0_host>;
1771
-//	phy-names = "usb2-phy";
1772
-//	maximum-speed = "high-speed";
1773
-//	snps,dis_u2_susphy_quirk;
1774
-	status = "okay";
1775
-};
1776
-
1777
-&combphy1_usq {
1778
-//	rockchip,dis-u3otg1-port;
1779
1816
 	status = "okay";
1780
1817
 };
1781
1818
 
..
..
@@ -1808,8 +1845,8 @@
1808
1845
 
1809
1846
 &vop {
1810
1847
 	status = "okay";
1811
-	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
1812
-	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
1848
+	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>, <&cru DCLK_VOP2>;
1849
+	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>, <&cru PLL_GPLL>;
1813
1850
 };
1814
1851
 
1815
1852
 &vop_mmu {