add r8169 read mac form eeprom

hc

2023-11-20 69d6da3c1c63675524a25e7dc92a4f43c4164cef

 kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
..
..
@@ -16,14 +16,6 @@
16
16
 	model = "Rockchip RK3568 EVB1 DDR4 V10 Board";
17
17
 	compatible = "rockchip,rk3568-evb1-ddr4-v10", "rockchip,rk3568";
18
18
 
19
-	rk_headset: rk-headset {
20
-		compatible = "rockchip_headset";
21
-		headset_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>;
22
-		spk_ctl_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;//AMP_SD_GPIO4_C2_3V3
23
-		pinctrl-names = "default";
24
-		pinctrl-0 = <&hp_det>;
25
-	};
26
-
27
19
 	vcc2v5_sys: vcc2v5-ddr {
28
20
 		compatible = "regulator-fixed";
29
21
 		regulator-name = "vcc2v5-sys";
..
..
@@ -34,6 +26,15 @@
34
26
 		vin-supply = <&vcc3v3_sys>;
35
27
 	};
36
28
 
29
+	vcc3v3_vga: vcc3v3-vga {
30
+		compatible = "regulator-fixed";
31
+		regulator-name = "vcc3v3_vga";
32
+		regulator-always-on;
33
+		regulator-boot-on;
34
+		gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
35
+		enable-active-high;
36
+		vin-supply = <&vcc3v3_sys>;
37
+	};
37
38
 
38
39
 	pcie30_avdd0v9: pcie30-avdd0v9 {
39
40
 		compatible = "regulator-fixed";
..
..
@@ -60,9 +61,7 @@
60
61
 		regulator-name = "vcc3v3_pcie";
61
62
 		regulator-min-microvolt = <3300000>;
62
63
 		regulator-max-microvolt = <3300000>;
63
-		regulator-always-on;
64
64
 		enable-active-high;
65
-		regulator-boot-on;
66
65
 		gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
67
66
 		startup-delay-us = <5000>;
68
67
 		vin-supply = <&dc_12v>;
..
..
@@ -87,29 +86,109 @@
87
86
 		enable-active-high;
88
87
 		regulator-always-on;
89
88
 		regulator-boot-on;
90
-    	};
89
+	};
91
90
 #endif
92
91
 
93
-	    nk_io_init {
94
-                compatible = "nk_io_control";
95
-				vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
96
-                hub_host2_5V_rest_gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
97
-                hub_host3_5v_gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
98
-                vcc_5v_io = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;   //VCC5_IO_EN_GPIO1_A4_3V3
99
-                vcc_12v_io = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
100
-                en_4g_gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
101
-                reset_4g_gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; //4G_RST_GPIO01_B2_3V3
102
-                air_mode_4g_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; //4G_AIR_MODE_GPIO01_B0_3V3
103
-                wake_4g_gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; //4G_WAKEUP_GPIO01_B1_3V3
104
-				hp_en_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
105
-//              spk_out_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;//AMP_SD_GPIO4_C2_3V3			
106
-				wifi_power_en_gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
107
-//				pcie_power_en_gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;//PCIE_PWREN_H_GPIO0_D4				
108
-				pinctrl-names = "default";
109
-				pinctrl-0 = <&nk_io_gpio>;				
110
-        };
111
-		
112
-		panel: panel {
92
+	ndj_io_init {
93
+         	compatible = "nk_io_control";	
94
+			pinctrl-names = "default";
95
+        	pinctrl-0 = <&nk_io_gpio>;
96
+			
97
+			//gpio_op0 = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
98
+			
99
+			vcc_5v {
100
+				gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
101
+				gpio_function = <0>;	
102
+			};
103
+			
104
+			vcc_12v {
105
+				gpio_num = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;  //VCC12_IO_EN_GPIO0_C7_3V3
106
+				gpio_function = <0>;
107
+			};
108
+			
109
+			hub_host2_rst {
110
+				gpio_num = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;  //HUB_RST_GPIO4_D2_3V3
111
+				gpio_function = <3>;
112
+			};
113
+			
114
+			hub_host3 {
115
+				gpio_num = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
116
+				gpio_function = <0>;
117
+			};
118
+			
119
+			wake_4g {
120
+				gpio_num = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>; //4G_WAKEUP_GPIO01_B1_3V3
121
+				gpio_function = <0>;
122
+			};
123
+			
124
+			air_mode_4g {
125
+				gpio_num = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; //4G_AIR_MODE_GPIO01_B0_3V3
126
+				gpio_function = <0>;
127
+			};
128
+			
129
+			reset_4g {
130
+				gpio_num = <&gpio1 RK_PB2 GPIO_ACTIVE_LOW>; //4G_RST_GPIO01_B2_3V3
131
+				gpio_function = <3>;
132
+			};
133
+			
134
+			en_4g {
135
+				gpio_num = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
136
+				gpio_function = <0>;
137
+			};
138
+			
139
+			hp_en {
140
+				gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
141
+				gpio_function = <0>;
142
+			};
143
+			
144
+			wifi_power_en {
145
+				gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
146
+				gpio_function = <0>;
147
+			};
148
+	#if 0		
149
+			do1 {
150
+				gpio_num = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>; 
151
+				gpio_function = <0>;
152
+			};
153
+			
154
+			do2 {
155
+				gpio_num = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
156
+				gpio_function = <0>;
157
+			};
158
+			
159
+			do3 {
160
+				gpio_num = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
161
+				gpio_function = <0>;
162
+			};
163
+			
164
+			do4 {
165
+				gpio_num = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
166
+				gpio_function = <0>;
167
+			};
168
+			
169
+			do5 {
170
+				gpio_num = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>; 
171
+				gpio_function = <0>;
172
+			};
173
+			
174
+			do6 {
175
+				gpio_num = <&gpio2 RK_PD7 GPIO_ACTIVE_LOW>; 
176
+				gpio_function = <0>;
177
+			};
178
+			
179
+			do7 {
180
+				gpio_num = <&gpio3 RK_PA0 GPIO_ACTIVE_LOW>; 
181
+				gpio_function = <0>;
182
+			};
183
+			
184
+			di1 {
185
+				gpio_num = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>;
186
+				gpio_function = <1>;
187
+			};
188
+	#endif
189
+	};
190
+	
191
+			panel: panel {
113
192
 				compatible = "simple-panel";
114
193
 				backlight = <&backlight>;
115
194
 				power-supply = <&vcc3v3_lcd0_n>;
..
..
@@ -213,10 +292,6 @@
213
292
  * video_phy0 needs to be enabled
214
293
  * when dsi0 is enabled
215
294
  */
216
-&video_phy0 {
217
-	status = "disabled";
218
-};
219
-
220
295
 &dsi0 {
221
296
 	status = "disabled";
222
297
 };
..
..
@@ -237,10 +312,6 @@
237
312
  * video_phy1 needs to be enabled
238
313
  * when dsi1 is enabled
239
314
  */
240
- 
241
-&video_phy1 {
242
-	status = "okay";
243
-}; 
244
315
 &dsi1 {
245
316
 	status = "disabled";
246
317
 };
..
..
@@ -250,29 +321,15 @@
250
321
 };
251
322
 
252
323
 &dsi1_in_vp1 {
253
-	status = "okay";
324
+	status = "disabled";
254
325
 };
255
326
 
256
327
 &dsi1_panel {
257
-	power-supply = <&vcc3v3_lcd1_n>;   //MIPI_3V3EN_GPIO3_A3_d_3V3
258
-    vddio-mipi = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; //MIPI_EN_1V8_GPIO3_A4_d_3V3
259
-    reset-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_LOW>; //MIPI_RST_L_GPIO3_C7
260
-    vcc-5v-gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
261
-    pinctrl-names = "default";
262
-    pinctrl-0 = <&lcd1_rst_gpio>;
328
+	power-supply = <&vcc3v3_lcd1_n>;
263
329
 };
264
-
265
-&route_dsi1 {
266
-	status = "disabled";
267
-	connect = <&vp1_out_dsi1>;
268
-};
269
-
270
-
271
-/*
272
-*  edp_start
273
-*/
274
330
 
275
331
 &edp {
332
+	//hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;	
276
333
     force-hpd;
277
334
     status = "okay";
278
335
     ports {
..
..
@@ -282,70 +339,21 @@
282
339
                 remote-endpoint = <&panel_in>;
283
340
             };
284
341
         };
285
-    };
342
+   
343
+	};
286
344
 };
287
345
 
288
346
 &edp_phy {
289
-  status = "okay";
290
-
347
+	status = "okay";
291
348
 };
292
349
 
293
350
 &edp_in_vp0 {
294
-    status = "disabled";
295
-};
296
-
297
-&edp_in_vp1 {
298
-    status = "okay";
299
-
300
-};
301
-
302
-&route_edp {
303
-    status = "okay";
304
-    connect = <&vp1_out_edp>;
305
-};
306
-
307
-&route_edp {
308
-	status = "okay";
309
-};
310
-/*
311
-*  edp_end
312
-*/
313
-
314
-/*
315
-*  Hdmi_start
316
-*/
317
-
318
-&hdmi {
319
-	status = "okay";
320
-	rockchip,phy-table =
321
-		<92812500  0x8009 0x0000 0x0270>,
322
-		<165000000 0x800b 0x0000 0x026d>,
323
-		<185625000 0x800b 0x0000 0x01ed>,
324
-		<297000000 0x800b 0x0000 0x01ad>,
325
-		<594000000 0x8029 0x0000 0x0088>,
326
-		<000000000 0x0000 0x0000 0x0000>;
327
-};
328
-
329
-&route_hdmi {
330
-	status = "okay";
331
-	connect = <&vp0_out_hdmi>;
332
-};
333
-
334
-&hdmi_in_vp0 {
335
-	status = "okay";
336
-};
337
-
338
-&hdmi_in_vp1 {
339
351
 	status = "disabled";
340
352
 };
341
353
 
342
-&hdmi_sound {
354
+&edp_in_vp1 {
343
355
 	status = "okay";
344
356
 };
345
-
346
-/*
347
- *  Hdmi_END
348
-*/
349
357
 
350
358
 &gmac0 {
351
359
 	phy-mode = "rgmii";
..
..
@@ -405,9 +413,7 @@
405
413
  * power-supply should switche to vcc3v3_lcd1_n
406
414
  * when mipi panel is connected to dsi1.
407
415
  */
408
-&gt1x {
409
-	power-supply = <&vcc3v3_lcd0_n>;
410
-};
416
+
411
417
 
412
418
 &i2c3 {
413
419
 	status = "okay";
..
..
@@ -426,7 +432,7 @@
426
432
 };
427
433
 
428
434
 &i2c4 {
429
-	status = "okay";
435
+	status = "disabled";
430
436
 	gc8034: gc8034@37 {
431
437
 		compatible = "galaxycore,gc8034";
432
438
 		status = "okay";
..
..
@@ -472,7 +478,7 @@
472
478
 		};
473
479
 	};
474
480
 	ov5695: ov5695@36 {
475
-		status = "okay";
481
+		status = "disabled";
476
482
 		compatible = "ovti,ov5695";
477
483
 		reg = <0x36>;
478
484
 		clocks = <&cru CLK_CIF_OUT>;
..
..
@@ -495,19 +501,6 @@
495
501
 	};
496
502
 };
497
503
 
498
-&i2c5 {
499
-	status = "okay";
500
-
501
-	hym8563: hym8563@51 {
502
-		compatible = "haoyu,hym8563";
503
-		reg = <0x51>;
504
-		#clock-cells = <0>;
505
-		clock-frequency = <32768>;
506
-		clock-output-names = "xin32k";
507
-		/* rtc_int is not connected */
508
-	};
509
-};
510
-
511
504
 &mdio0 {
512
505
 	rgmii_phy0: phy@0 {
513
506
 		compatible = "ethernet-phy-ieee802.3-c22";
..
..
@@ -522,10 +515,16 @@
522
515
 	};
523
516
 };
524
517
 
518
+&video_phy0 {
519
+	status = "disabled";
520
+};
525
521
 
522
+&video_phy1 {
523
+	status = "disabled";
524
+};
526
525
 
527
526
 &pcie30phy {
528
-	status = "okay";
527
+	status = "disabled";
529
528
 };
530
529
 
531
530
 &pcie2x1 {
..
..
@@ -534,24 +533,23 @@
534
533
 	status = "okay";
535
534
 };
536
535
 
536
+&pcie3x2 {
537
+	reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
538
+	vpcie3v3-supply = <&vcc3v3_pcie>;
539
+	status = "okay";
540
+};
541
+
537
542
 &pinctrl {
538
-//	cam {
539
-//		camera_pwr: camera-pwr {
540
-//			rockchip,pins =
541
-//				/* camera power en */
542
-//				<0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
543
-//		};
544
-//	};
543
+
545
544
 	headphone {
546
545
 		hp_det: hp-det {
547
-			rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>,
548
-							<4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
546
+			rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
549
547
 		};
550
548
 	};
551
549
 
552
550
 	wireless-wlan {
553
551
 		wifi_host_wake_irq: wifi-host-wake-irq {
554
-			rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
552
+			rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
555
553
 		};
556
554
 	};
557
555
 
..
..
@@ -561,12 +559,6 @@
561
559
 		};
562
560
 	};
563
561
 	
564
-	lcd1 {
565
-        lcd1_rst_gpio: lcd1-rst-gpio {
566
-            rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
567
-        };
568
-    };
569
-		
570
562
 	nk_io_init{
571
563
 		nk_io_gpio: nk-io-gpio{
572
564
 			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
..
..
@@ -576,7 +568,7 @@
576
568
 							<4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
577
569
 							<1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>,
578
570
 							<0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
579
-							<1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
571
+							<1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, 
580
572
 							<1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
581
573
 							<1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>,
582
574
 							<3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
..
..
@@ -585,9 +577,17 @@
585
577
 							<3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>,
586
578
 							<3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,
587
579
 							<3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>,
580
+							<2 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,//93 SPI2_CS0_M1_3V3
581
+							<2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>,//94 SPI2_MOSI_M1_3V3
582
+							<2 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>,//95 SPI2_MISO_M1_3V3
583
+							<3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>,//96 SPI2_CLK_M1_3V3
588
584
 							<0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
589
585
 		};
590
586
 	};
587
+};
588
+
589
+&rk809_sound {
590
+	hp-det-gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
591
591
 };
592
592
 
593
593
 &rkisp {
..
..
@@ -612,32 +612,36 @@
612
612
 	};
613
613
 };
614
614
 
615
+&route_dsi0 {
616
+	status = "disabled";
617
+	connect = <&vp1_out_dsi0>;
618
+};
615
619
 
616
620
 
617
621
 
622
+&route_edp {
623
+	status = "okay";
624
+	connect = <&vp1_out_edp>;
625
+};
618
626
 
619
627
 &sata2 {
620
628
 	status = "okay";
621
629
 };
622
630
 
623
631
 &sdmmc2 {
624
-        status = "disabled";
625
-};
626
-
627
-&sdmmc1 {
628
-        max-frequency = <150000000>;
629
-        supports-sdio;
630
-        bus-width = <4>;
631
-        disable-wp;
632
-        cap-sd-highspeed;
633
-        cap-sdio-irq;
634
-        keep-power-in-suspend;
635
-        mmc-pwrseq = <&sdio_pwrseq>;
636
-        non-removable;
637
-        pinctrl-names = "default";
638
-        pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
639
-        sd-uhs-sdr104;
640
-        status = "okay";
632
+	max-frequency = <150000000>;
633
+	supports-sdio;
634
+	bus-width = <4>;
635
+	disable-wp;
636
+	cap-sd-highspeed;
637
+	cap-sdio-irq;
638
+	keep-power-in-suspend;
639
+	mmc-pwrseq = <&sdio_pwrseq>;
640
+	non-removable;
641
+	pinctrl-names = "default";
642
+	pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
643
+	sd-uhs-sdr104;
644
+	status = "okay";
641
645
 };
642
646
 
643
647
 &spdif_8ch {
..
..
@@ -678,8 +682,8 @@
678
682
 	pinctrl-0 = <&uart1m0_rtsn>;
679
683
 	pinctrl-1 = <&uart1_gpios>;
680
684
 	BT,reset_gpio    = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
681
-    BT,wake_gpio     = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
682
-    BT,wake_host_irq = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
685
+	BT,wake_gpio     = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
686
+	BT,wake_host_irq = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
683
687
 	status = "okay";
684
688
 };
685
689
 
..
..
@@ -716,4 +720,4 @@
716
720
 &uart9 {
717
721
 	status = "okay";
718
722
 	pinctrl-0 = <&uart9m1_xfer>;
719
-};
723
+};