add r8169 read mac form eeprom

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2023-11-20 69d6da3c1c63675524a25e7dc92a4f43c4164cef

 kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
..
..
@@ -8,19 +8,13 @@
8
8
 
9
9
 #include <dt-bindings/gpio/gpio.h>
10
10
 #include <dt-bindings/pinctrl/rockchip.h>
11
+#include <dt-bindings/display/media-bus-format.h>
11
12
 #include "rk3568.dtsi"
12
13
 #include "rk3568-evb.dtsi"
13
14
 
14
15
 / {
15
16
 	model = "Rockchip RK3568 EVB1 DDR4 V10 Board";
16
17
 	compatible = "rockchip,rk3568-evb1-ddr4-v10", "rockchip,rk3568";
17
-
18
-	rk_headset: rk-headset {
19
-		compatible = "rockchip_headset";
20
-		headset_gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
21
-		pinctrl-names = "default";
22
-		pinctrl-0 = <&hp_det>;
23
-	};
24
18
 
25
19
 	vcc2v5_sys: vcc2v5-ddr {
26
20
 		compatible = "regulator-fixed";
..
..
@@ -92,40 +86,150 @@
92
86
 		enable-active-high;
93
87
 		regulator-always-on;
94
88
 		regulator-boot-on;
95
-    	};
89
+	};
96
90
 #endif
97
91
 
98
-	    nk_io_init {
99
-                compatible = "nk_io_control";
100
-				usb_en_oc_gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;  //USB_EN_OC_GPIO0_A5
101
-				lcd_bk_en_gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
102
-				lcd_pwblk_gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;  //LCD0_BKLT_EN_3V3
103
-				vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
104
-                hub_host2_5V_rest_gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
105
-                hub_host3_5v_gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
106
-//              hub_host3_5V_rest_gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>; 
107
-                vcc_5v_io = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;   //VCC5_IO_EN_GPIO1_A4_3V3
108
-                vcc_12v_io = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
109
-                en_4g_gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
110
-                reset_4g_gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; //4G_RST_GPIO01_B2_3V3
111
-                air_mode_4g_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; //4G_AIR_MODE_GPIO01_B0_3V3
112
-                wake_4g_gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; //4G_WAKEUP_GPIO01_B1_3V3
113
-                
114
-				edp_enable_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
115
-                edp_gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_LOW>; //7511_GPIO0-GPIO3_D2
116
-				edp_gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_LOW>; //7511_GPIO1-GPIO3_D3
117
-				edp_gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>; //7511_GPIO2-GPIO3_D4
118
-				edp_gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>; //7511_GPIO3-GPIO3_D5
119
-                edp_reset = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1
120
-//              tp_reset = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
121
-//              vddio_mipi = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
122
-		
123
-				wifi_power_en_gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
92
+	ndj_io_init {
93
+         	compatible = "nk_io_control";	
94
+			pinctrl-names = "default";
95
+        	pinctrl-0 = <&nk_io_gpio>;
96
+			
97
+			//gpio_op0 = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
98
+			
99
+			vcc_5v {
100
+				gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
101
+				gpio_function = <0>;	
102
+			};
103
+			
104
+			vcc_12v {
105
+				gpio_num = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;  //VCC12_IO_EN_GPIO0_C7_3V3
106
+				gpio_function = <0>;
107
+			};
108
+			
109
+			hub_host2_rst {
110
+				gpio_num = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;  //HUB_RST_GPIO4_D2_3V3
111
+				gpio_function = <3>;
112
+			};
113
+			
114
+			hub_host3 {
115
+				gpio_num = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
116
+				gpio_function = <0>;
117
+			};
118
+			
119
+			wake_4g {
120
+				gpio_num = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>; //4G_WAKEUP_GPIO01_B1_3V3
121
+				gpio_function = <0>;
122
+			};
123
+			
124
+			air_mode_4g {
125
+				gpio_num = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; //4G_AIR_MODE_GPIO01_B0_3V3
126
+				gpio_function = <0>;
127
+			};
128
+			
129
+			reset_4g {
130
+				gpio_num = <&gpio1 RK_PB2 GPIO_ACTIVE_LOW>; //4G_RST_GPIO01_B2_3V3
131
+				gpio_function = <3>;
132
+			};
133
+			
134
+			en_4g {
135
+				gpio_num = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
136
+				gpio_function = <0>;
137
+			};
138
+			
139
+			hp_en {
140
+				gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
141
+				gpio_function = <0>;
142
+			};
143
+			
144
+			wifi_power_en {
145
+				gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
146
+				gpio_function = <0>;
147
+			};
148
+	#if 0		
149
+			do1 {
150
+				gpio_num = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>; 
151
+				gpio_function = <0>;
152
+			};
153
+			
154
+			do2 {
155
+				gpio_num = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
156
+				gpio_function = <0>;
157
+			};
158
+			
159
+			do3 {
160
+				gpio_num = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
161
+				gpio_function = <0>;
162
+			};
163
+			
164
+			do4 {
165
+				gpio_num = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
166
+				gpio_function = <0>;
167
+			};
168
+			
169
+			do5 {
170
+				gpio_num = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>; 
171
+				gpio_function = <0>;
172
+			};
173
+			
174
+			do6 {
175
+				gpio_num = <&gpio2 RK_PD7 GPIO_ACTIVE_LOW>; 
176
+				gpio_function = <0>;
177
+			};
178
+			
179
+			do7 {
180
+				gpio_num = <&gpio3 RK_PA0 GPIO_ACTIVE_LOW>; 
181
+				gpio_function = <0>;
182
+			};
183
+			
184
+			di1 {
185
+				gpio_num = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>;
186
+				gpio_function = <1>;
187
+			};
188
+	#endif
189
+	};
190
+	
191
+			panel: panel {
192
+				compatible = "simple-panel";
193
+				backlight = <&backlight>;
194
+				power-supply = <&vcc3v3_lcd0_n>;
195
+				enable-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; //LCD0_VDD_H_GPIO2_D4
196
+				reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1
197
+				edp-bl-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;  //LCD0_BKLT_EN_3V3
198
+				edp-bl-en = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
199
+				bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
200
+				bpc = <8>;
201
+				prepare-delay-ms = <200>;
202
+				enable-delay-ms = <20>;
203
+				lvds-gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //7511_GPIO0-GPIO3_D2 
204
+				lvds-gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>; //7511_GPIO1-GPIO3_D3 
205
+				lvds-gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; //7511_GPIO2-GPIO3_D4 
206
+				lvds-gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; //7511_GPIO3-GPIO3_D5
207
+				nodka-lvds = <15>;
124
208
 
125
-				pinctrl-names = "default";
126
-				pinctrl-0 = <&nk_io_gpio>;
127
-				nodka_lvds = <9>;
128
-        };
209
+				display-timings {
210
+                native-mode = <&timing0>;
211
+                timing0: timing0 {
212
+					clock-frequency = <72500000>;
213
+					hactive = <1280>;
214
+					vactive = <800>;
215
+					hfront-porch = <70>;
216
+					hsync-len = <2>;
217
+					hback-porch = <88>;
218
+					vfront-porch = <7>;
219
+					vsync-len = <4>;
220
+					vback-porch = <17>;
221
+					hsync-active = <21>;
222
+					vsync-active = <0>;
223
+					de-active = <0>;
224
+					pixelclk-active = <0>;			
225
+					};
226
+				};
227
+				ports {
228
+					panel_in: endpoint {
229
+					remote-endpoint = <&edp_out>;
230
+						};
231
+					};   
232
+				};
129
233
 };
130
234
 
131
235
 &combphy0_us {
..
..
@@ -141,11 +245,11 @@
141
245
 };
142
246
 
143
247
 &csi2_dphy_hw {
144
-	status = "okay";
248
+	status = "disabled";
145
249
 };
146
250
 
147
251
 &csi2_dphy0 {
148
-	status = "okay";
252
+	status = "disabled";
149
253
 
150
254
 	ports {
151
255
 		#address-cells = <1>;
..
..
@@ -189,7 +293,7 @@
189
293
  * when dsi0 is enabled
190
294
  */
191
295
 &dsi0 {
192
-	status = "okay";
296
+	status = "disabled";
193
297
 };
194
298
 
195
299
 &dsi0_in_vp0 {
..
..
@@ -197,7 +301,7 @@
197
301
 };
198
302
 
199
303
 &dsi0_in_vp1 {
200
-	status = "okay";
304
+	status = "disabled";
201
305
 };
202
306
 
203
307
 &dsi0_panel {
..
..
@@ -225,8 +329,18 @@
225
329
 };
226
330
 
227
331
 &edp {
228
-	hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
229
-	status = "okay";
332
+	//hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;	
333
+    force-hpd;
334
+    status = "okay";
335
+    ports {
336
+        port@1 {
337
+            reg = <1>;
338
+            edp_out: endpoint {
339
+                remote-endpoint = <&panel_in>;
340
+            };
341
+        };
342
+   
343
+	};
230
344
 };
231
345
 
232
346
 &edp_phy {
..
..
@@ -234,11 +348,11 @@
234
348
 };
235
349
 
236
350
 &edp_in_vp0 {
237
-	status = "okay";
351
+	status = "disabled";
238
352
 };
239
353
 
240
354
 &edp_in_vp1 {
241
-	status = "disabled";
355
+	status = "okay";
242
356
 };
243
357
 
244
358
 &gmac0 {
..
..
@@ -299,9 +413,7 @@
299
413
  * power-supply should switche to vcc3v3_lcd1_n
300
414
  * when mipi panel is connected to dsi1.
301
415
  */
302
-&gt1x {
303
-	power-supply = <&vcc3v3_lcd0_n>;
304
-};
416
+
305
417
 
306
418
 &i2c3 {
307
419
 	status = "okay";
..
..
@@ -317,13 +429,10 @@
317
429
                 compatible = "nk_mcu";
318
430
                 reg = <0x15>;
319
431
         };
320
-
321
-
322
-
323
432
 };
324
433
 
325
434
 &i2c4 {
326
-	status = "okay";
435
+	status = "disabled";
327
436
 	gc8034: gc8034@37 {
328
437
 		compatible = "galaxycore,gc8034";
329
438
 		status = "okay";
..
..
@@ -369,7 +478,7 @@
369
478
 		};
370
479
 	};
371
480
 	ov5695: ov5695@36 {
372
-		status = "okay";
481
+		status = "disabled";
373
482
 		compatible = "ovti,ov5695";
374
483
 		reg = <0x36>;
375
484
 		clocks = <&cru CLK_CIF_OUT>;
..
..
@@ -407,7 +516,7 @@
407
516
 };
408
517
 
409
518
 &video_phy0 {
410
-	status = "okay";
519
+	status = "disabled";
411
520
 };
412
521
 
413
522
 &video_phy1 {
..
..
@@ -415,6 +524,12 @@
415
524
 };
416
525
 
417
526
 &pcie30phy {
527
+	status = "disabled";
528
+};
529
+
530
+&pcie2x1 {
531
+	reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
532
+	vpcie3v3-supply = <&vcc3v3_pcie>;
418
533
 	status = "okay";
419
534
 };
420
535
 
..
..
@@ -425,13 +540,7 @@
425
540
 };
426
541
 
427
542
 &pinctrl {
428
-//	cam {
429
-//		camera_pwr: camera-pwr {
430
-//			rockchip,pins =
431
-//				/* camera power en */
432
-//				<0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
433
-//		};
434
-//	};
543
+
435
544
 	headphone {
436
545
 		hp_det: hp-det {
437
546
 			rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
..
..
@@ -440,7 +549,7 @@
440
549
 
441
550
 	wireless-wlan {
442
551
 		wifi_host_wake_irq: wifi-host-wake-irq {
443
-			rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
552
+			rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
444
553
 		};
445
554
 	};
446
555
 
..
..
@@ -449,23 +558,48 @@
449
558
 			rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
450
559
 		};
451
560
 	};
561
+	
452
562
 	nk_io_init{
453
563
 		nk_io_gpio: nk-io-gpio{
454
-            rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
564
+			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
565
+							<0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>,
566
+							<0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>,
567
+							<4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
568
+							<4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
569
+							<1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>,
570
+							<0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
571
+							<1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, 
572
+							<1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
573
+							<1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>,
574
+							<3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
575
+							<3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
576
+							<3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>,
577
+							<3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>,
578
+							<3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,
579
+							<3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>,
580
+							<2 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,//93 SPI2_CS0_M1_3V3
581
+							<2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>,//94 SPI2_MOSI_M1_3V3
582
+							<2 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>,//95 SPI2_MISO_M1_3V3
583
+							<3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>,//96 SPI2_CLK_M1_3V3
584
+							<0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
455
585
 		};
456
586
 	};
457
587
 };
458
588
 
589
+&rk809_sound {
590
+	hp-det-gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
591
+};
592
+
459
593
 &rkisp {
460
-	status = "okay";
594
+	status = "disabled";
461
595
 };
462
596
 
463
597
 &rkisp_mmu {
464
-	status = "okay";
598
+	status = "disabled";
465
599
 };
466
600
 
467
601
 &rkisp_vir0 {
468
-	status = "okay";
602
+	status = "disabled";
469
603
 
470
604
 	port {
471
605
 		#address-cells = <1>;
..
..
@@ -479,13 +613,15 @@
479
613
 };
480
614
 
481
615
 &route_dsi0 {
482
-	status = "okay";
616
+	status = "disabled";
483
617
 	connect = <&vp1_out_dsi0>;
484
618
 };
485
619
 
620
+
621
+
486
622
 &route_edp {
487
623
 	status = "okay";
488
-	connect = <&vp0_out_edp>;
624
+	connect = <&vp1_out_edp>;
489
625
 };
490
626
 
491
627
 &sata2 {
..
..
@@ -493,23 +629,19 @@
493
629
 };
494
630
 
495
631
 &sdmmc2 {
496
-        status = "disabled";
497
-};
498
-
499
-&sdmmc1 {
500
-        max-frequency = <150000000>;
501
-        supports-sdio;
502
-        bus-width = <4>;
503
-        disable-wp;
504
-        cap-sd-highspeed;
505
-        cap-sdio-irq;
506
-        keep-power-in-suspend;
507
-        mmc-pwrseq = <&sdio_pwrseq>;
508
-        non-removable;
509
-        pinctrl-names = "default";
510
-        pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
511
-        sd-uhs-sdr104;
512
-        status = "okay";
632
+	max-frequency = <150000000>;
633
+	supports-sdio;
634
+	bus-width = <4>;
635
+	disable-wp;
636
+	cap-sd-highspeed;
637
+	cap-sdio-irq;
638
+	keep-power-in-suspend;
639
+	mmc-pwrseq = <&sdio_pwrseq>;
640
+	non-removable;
641
+	pinctrl-names = "default";
642
+	pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
643
+	sd-uhs-sdr104;
644
+	status = "okay";
513
645
 };
514
646
 
515
647
 &spdif_8ch {
..
..
@@ -525,12 +657,12 @@
525
657
 };
526
658
 
527
659
 &vcc3v3_lcd0_n {
528
-	gpio = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
660
+	gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; 
529
661
 	enable-active-high;
530
662
 };
531
663
 
532
664
 &vcc3v3_lcd1_n {
533
-	gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
665
+	gpio = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>; //MIPI_3V3EN_GPIO3_A3_d_3V3
534
666
 	enable-active-high;
535
667
 };
536
668
 
..
..
@@ -546,18 +678,23 @@
546
678
 	clock-names = "ext_clock";
547
679
 	//wifi-bt-power-toggle;
548
680
 	uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
549
-	BT,power_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
550
681
 	pinctrl-names = "default", "rts_gpio";
551
682
 	pinctrl-0 = <&uart1m0_rtsn>;
552
683
 	pinctrl-1 = <&uart1_gpios>;
553
-	BT,reset_gpio    = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
554
-	BT,wake_gpio     = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
555
-	BT,wake_host_irq = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
556
-	status = "disabled";
684
+	BT,reset_gpio    = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
685
+	BT,wake_gpio     = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
686
+	BT,wake_host_irq = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
687
+	status = "okay";
557
688
 };
558
689
 
559
690
 &uart0 {
560
691
 	status = "okay";
692
+};
693
+
694
+&uart1 {	
695
+	pinctrl-names = "default";	
696
+	pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;	
697
+	status = "okay";		
561
698
 };
562
699
 
563
700
 &uart3 {
..
..
@@ -583,4 +720,4 @@
583
720
 &uart9 {
584
721
 	status = "okay";
585
722
 	pinctrl-0 = <&uart9m1_xfer>;
586
-};
723
+};