kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/tools/perf/arch/x86/util/perf_regs.c
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@@ -2,11 +2,13 @@
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 #include <errno.h>
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 #include <string.h>
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 #include <regex.h>
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+#include <linux/kernel.h>
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+#include <linux/zalloc.h>
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-#include "../../perf.h"
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-#include "../../util/util.h"
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-#include "../../util/perf_regs.h"
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-#include "../../util/debug.h"
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+#include "../../../perf-sys.h"
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+#include "../../../util/perf_regs.h"
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+#include "../../../util/debug.h"
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+#include "../../../util/event.h"
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 const struct sample_reg sample_reg_masks[] = {
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 	SMPL_REG(AX, PERF_REG_X86_AX),
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@@ -31,6 +33,22 @@
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 	SMPL_REG(R14, PERF_REG_X86_R14),
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 	SMPL_REG(R15, PERF_REG_X86_R15),
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 #endif
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+	SMPL_REG2(XMM0, PERF_REG_X86_XMM0),
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+	SMPL_REG2(XMM1, PERF_REG_X86_XMM1),
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+	SMPL_REG2(XMM2, PERF_REG_X86_XMM2),
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+	SMPL_REG2(XMM3, PERF_REG_X86_XMM3),
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+	SMPL_REG2(XMM4, PERF_REG_X86_XMM4),
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+	SMPL_REG2(XMM5, PERF_REG_X86_XMM5),
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+	SMPL_REG2(XMM6, PERF_REG_X86_XMM6),
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+	SMPL_REG2(XMM7, PERF_REG_X86_XMM7),
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+	SMPL_REG2(XMM8, PERF_REG_X86_XMM8),
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+	SMPL_REG2(XMM9, PERF_REG_X86_XMM9),
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+	SMPL_REG2(XMM10, PERF_REG_X86_XMM10),
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+	SMPL_REG2(XMM11, PERF_REG_X86_XMM11),
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+	SMPL_REG2(XMM12, PERF_REG_X86_XMM12),
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+	SMPL_REG2(XMM13, PERF_REG_X86_XMM13),
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+	SMPL_REG2(XMM14, PERF_REG_X86_XMM14),
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+	SMPL_REG2(XMM15, PERF_REG_X86_XMM15),
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 	SMPL_REG_END
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 };
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@@ -254,3 +272,31 @@
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 	return SDT_ARG_VALID;
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 }
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+
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+uint64_t arch__intr_reg_mask(void)
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+{
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+	struct perf_event_attr attr = {
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+		.type			= PERF_TYPE_HARDWARE,
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+		.config			= PERF_COUNT_HW_CPU_CYCLES,
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+		.sample_type		= PERF_SAMPLE_REGS_INTR,
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+		.sample_regs_intr	= PERF_REG_EXTENDED_MASK,
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+		.precise_ip		= 1,
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+		.disabled 		= 1,
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+		.exclude_kernel		= 1,
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+	};
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+	int fd;
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+	/*
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+	 * In an unnamed union, init it here to build on older gcc versions
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+	 */
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+	attr.sample_period = 1;
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+
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+	event_attr_init(&attr);
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+
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+	fd = sys_perf_event_open(&attr, 0, -1, -1, 0);
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+	if (fd != -1) {
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+		close(fd);
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+		return (PERF_REG_EXTENDED_MASK | PERF_REGS_MASK);
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+	}
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+
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+	return PERF_REGS_MASK;
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+}