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2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f 
 kernel/sound/soc/stm/stm32_sai.c
....@@ -1,19 +1,9 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23  * STM32 ALSA SoC Digital Audio Interface (SAI) driver.
34  *
45  * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
56  * Author(s): Olivier Moysan <olivier.moysan@st.com> for STMicroelectronics.
6
- *
7
- * License terms: GPL V2.0.
8
- *
9
- * This program is free software; you can redistribute it and/or modify it
10
- * under the terms of the GNU General Public License version 2 as published by
11
- * the Free Software Foundation.
12
- *
13
- * This program is distributed in the hope that it will be useful, but
14
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
16
- * details.
177  */
188 
199 #include <linux/bitfield.h>
....@@ -21,6 +11,7 @@
2111 #include <linux/delay.h>
2212 #include <linux/module.h>
2313 #include <linux/of_platform.h>
14
+#include <linux/pinctrl/consumer.h>
2415 #include <linux/reset.h>
2516 
2617 #include <sound/dmaengine_pcm.h>
....@@ -29,13 +20,20 @@
2920 #include "stm32_sai.h"
3021 
3122 static const struct stm32_sai_conf stm32_sai_conf_f4 = {
32
-	.version = SAI_STM32F4,
33
-	.has_spdif = false,
23
+	.version = STM_SAI_STM32F4,
24
+	.fifo_size = 8,
25
+	.has_spdif_pdm = false,
3426 };
3527 
28
+/*
29
+ * Default settings for stm32 H7 socs and next.
30
+ * These default settings will be overridden if the soc provides
31
+ * support of hardware configuration registers.
32
+ */
3633 static const struct stm32_sai_conf stm32_sai_conf_h7 = {
37
-	.version = SAI_STM32H7,
38
-	.has_spdif = true,
34
+	.version = STM_SAI_STM32H7,
35
+	.fifo_size = 8,
36
+	.has_spdif_pdm = true,
3937 };
4038 
4139 static const struct of_device_id stm32_sai_ids[] = {
....@@ -44,20 +42,41 @@
4442 	{}
4543 };
4644 
47
-static int stm32_sai_sync_conf_client(struct stm32_sai_data *sai, int synci)
45
+static int stm32_sai_pclk_disable(struct device *dev)
4846 {
47
+	struct stm32_sai_data *sai = dev_get_drvdata(dev);
48
+
49
+	clk_disable_unprepare(sai->pclk);
50
+
51
+	return 0;
52
+}
53
+
54
+static int stm32_sai_pclk_enable(struct device *dev)
55
+{
56
+	struct stm32_sai_data *sai = dev_get_drvdata(dev);
4957 	int ret;
5058 
51
-	/* Enable peripheral clock to allow GCR register access */
5259 	ret = clk_prepare_enable(sai->pclk);
5360 	if (ret) {
5461 		dev_err(&sai->pdev->dev, "failed to enable clock: %d\n", ret);
5562 		return ret;
5663 	}
5764 
65
+	return 0;
66
+}
67
+
68
+static int stm32_sai_sync_conf_client(struct stm32_sai_data *sai, int synci)
69
+{
70
+	int ret;
71
+
72
+	/* Enable peripheral clock to allow GCR register access */
73
+	ret = stm32_sai_pclk_enable(&sai->pdev->dev);
74
+	if (ret)
75
+		return ret;
76
+
5877 	writel_relaxed(FIELD_PREP(SAI_GCR_SYNCIN_MASK, (synci - 1)), sai->base);
5978 
60
-	clk_disable_unprepare(sai->pclk);
79
+	stm32_sai_pclk_disable(&sai->pdev->dev);
6180 
6281 	return 0;
6382 }
....@@ -68,28 +87,26 @@
6887 	int ret;
6988 
7089 	/* Enable peripheral clock to allow GCR register access */
71
-	ret = clk_prepare_enable(sai->pclk);
72
-	if (ret) {
73
-		dev_err(&sai->pdev->dev, "failed to enable clock: %d\n", ret);
90
+	ret = stm32_sai_pclk_enable(&sai->pdev->dev);
91
+	if (ret)
7492 		return ret;
75
-	}
7693 
77
-	dev_dbg(&sai->pdev->dev, "Set %s%s as synchro provider\n",
78
-		sai->pdev->dev.of_node->name,
94
+	dev_dbg(&sai->pdev->dev, "Set %pOFn%s as synchro provider\n",
95
+		sai->pdev->dev.of_node,
7996 		synco == STM_SAI_SYNC_OUT_A ? "A" : "B");
8097 
8198 	prev_synco = FIELD_GET(SAI_GCR_SYNCOUT_MASK, readl_relaxed(sai->base));
8299 	if (prev_synco != STM_SAI_SYNC_OUT_NONE && synco != prev_synco) {
83
-		dev_err(&sai->pdev->dev, "%s%s already set as sync provider\n",
84
-			sai->pdev->dev.of_node->name,
100
+		dev_err(&sai->pdev->dev, "%pOFn%s already set as sync provider\n",
101
+			sai->pdev->dev.of_node,
85102 			prev_synco == STM_SAI_SYNC_OUT_A ? "A" : "B");
86
-		clk_disable_unprepare(sai->pclk);
103
+		stm32_sai_pclk_disable(&sai->pdev->dev);
87104 		return -EINVAL;
88105 	}
89106 
90107 	writel_relaxed(FIELD_PREP(SAI_GCR_SYNCOUT_MASK, synco), sai->base);
91108 
92
-	clk_disable_unprepare(sai->pclk);
109
+	stm32_sai_pclk_disable(&sai->pdev->dev);
93110 
94111 	return 0;
95112 }
....@@ -104,7 +121,8 @@
104121 
105122 	if (!pdev) {
106123 		dev_err(&sai_client->pdev->dev,
107
-			"Device not found for node %s\n", np_provider->name);
124
+			"Device not found for node %pOFn\n", np_provider);
125
+		of_node_put(np_provider);
108126 		return -ENODEV;
109127 	}
110128 
....@@ -113,19 +131,20 @@
113131 		dev_err(&sai_client->pdev->dev,
114132 			"SAI sync provider data not found\n");
115133 		ret = -EINVAL;
116
-		goto out_put_dev;
134
+		goto error;
117135 	}
118136 
119137 	/* Configure sync client */
120138 	ret = stm32_sai_sync_conf_client(sai_client, synci);
121139 	if (ret < 0)
122
-		goto out_put_dev;
140
+		goto error;
123141 
124142 	/* Configure sync provider */
125143 	ret = stm32_sai_sync_conf_provider(sai_provider, synco);
126144 
127
-out_put_dev:
145
+error:
128146 	put_device(&pdev->dev);
147
+	of_node_put(np_provider);
129148 	return ret;
130149 }
131150 
....@@ -133,58 +152,91 @@
133152 {
134153 	struct stm32_sai_data *sai;
135154 	struct reset_control *rst;
136
-	struct resource *res;
137155 	const struct of_device_id *of_id;
156
+	u32 val;
157
+	int ret;
138158 
139159 	sai = devm_kzalloc(&pdev->dev, sizeof(*sai), GFP_KERNEL);
140160 	if (!sai)
141161 		return -ENOMEM;
142162 
143
-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
144
-	sai->base = devm_ioremap_resource(&pdev->dev, res);
163
+	sai->base = devm_platform_ioremap_resource(pdev, 0);
145164 	if (IS_ERR(sai->base))
146165 		return PTR_ERR(sai->base);
147166 
148167 	of_id = of_match_device(stm32_sai_ids, &pdev->dev);
149168 	if (of_id)
150
-		sai->conf = (struct stm32_sai_conf *)of_id->data;
169
+		memcpy(&sai->conf, (const struct stm32_sai_conf *)of_id->data,
170
+		       sizeof(struct stm32_sai_conf));
151171 	else
152172 		return -EINVAL;
153173 
154174 	if (!STM_SAI_IS_F4(sai)) {
155175 		sai->pclk = devm_clk_get(&pdev->dev, "pclk");
156176 		if (IS_ERR(sai->pclk)) {
157
-			dev_err(&pdev->dev, "missing bus clock pclk\n");
177
+			if (PTR_ERR(sai->pclk) != -EPROBE_DEFER)
178
+				dev_err(&pdev->dev, "missing bus clock pclk: %ld\n",
179
+					PTR_ERR(sai->pclk));
158180 			return PTR_ERR(sai->pclk);
159181 		}
160182 	}
161183 
162184 	sai->clk_x8k = devm_clk_get(&pdev->dev, "x8k");
163185 	if (IS_ERR(sai->clk_x8k)) {
164
-		dev_err(&pdev->dev, "missing x8k parent clock\n");
186
+		if (PTR_ERR(sai->clk_x8k) != -EPROBE_DEFER)
187
+			dev_err(&pdev->dev, "missing x8k parent clock: %ld\n",
188
+				PTR_ERR(sai->clk_x8k));
165189 		return PTR_ERR(sai->clk_x8k);
166190 	}
167191 
168192 	sai->clk_x11k = devm_clk_get(&pdev->dev, "x11k");
169193 	if (IS_ERR(sai->clk_x11k)) {
170
-		dev_err(&pdev->dev, "missing x11k parent clock\n");
194
+		if (PTR_ERR(sai->clk_x11k) != -EPROBE_DEFER)
195
+			dev_err(&pdev->dev, "missing x11k parent clock: %ld\n",
196
+				PTR_ERR(sai->clk_x11k));
171197 		return PTR_ERR(sai->clk_x11k);
172198 	}
173199 
174200 	/* init irqs */
175201 	sai->irq = platform_get_irq(pdev, 0);
176
-	if (sai->irq < 0) {
177
-		dev_err(&pdev->dev, "no irq for node %s\n", pdev->name);
202
+	if (sai->irq < 0)
178203 		return sai->irq;
179
-	}
180204 
181205 	/* reset */
182
-	rst = devm_reset_control_get_exclusive(&pdev->dev, NULL);
183
-	if (!IS_ERR(rst)) {
184
-		reset_control_assert(rst);
185
-		udelay(2);
186
-		reset_control_deassert(rst);
206
+	rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
207
+	if (IS_ERR(rst)) {
208
+		if (PTR_ERR(rst) != -EPROBE_DEFER)
209
+			dev_err(&pdev->dev, "Reset controller error %ld\n",
210
+				PTR_ERR(rst));
211
+		return PTR_ERR(rst);
187212 	}
213
+	reset_control_assert(rst);
214
+	udelay(2);
215
+	reset_control_deassert(rst);
216
+
217
+	/* Enable peripheral clock to allow register access */
218
+	ret = clk_prepare_enable(sai->pclk);
219
+	if (ret) {
220
+		dev_err(&pdev->dev, "failed to enable clock: %d\n", ret);
221
+		return ret;
222
+	}
223
+
224
+	val = FIELD_GET(SAI_IDR_ID_MASK,
225
+			readl_relaxed(sai->base + STM_SAI_IDR));
226
+	if (val == SAI_IPIDR_NUMBER) {
227
+		val = readl_relaxed(sai->base + STM_SAI_HWCFGR);
228
+		sai->conf.fifo_size = FIELD_GET(SAI_HWCFGR_FIFO_SIZE, val);
229
+		sai->conf.has_spdif_pdm = !!FIELD_GET(SAI_HWCFGR_SPDIF_PDM,
230
+						      val);
231
+
232
+		val = readl_relaxed(sai->base + STM_SAI_VERR);
233
+		sai->conf.version = val;
234
+
235
+		dev_dbg(&pdev->dev, "SAI version: %lu.%lu registered\n",
236
+			FIELD_GET(SAI_VERR_MAJ_MASK, val),
237
+			FIELD_GET(SAI_VERR_MIN_MASK, val));
238
+	}
239
+	clk_disable_unprepare(sai->pclk);
188240 
189241 	sai->pdev = pdev;
190242 	sai->set_sync = &stm32_sai_set_sync;
....@@ -193,12 +245,54 @@
193245 	return devm_of_platform_populate(&pdev->dev);
194246 }
195247 
248
+#ifdef CONFIG_PM_SLEEP
249
+/*
250
+ * When pins are shared by two sai sub instances, pins have to be defined
251
+ * in sai parent node. In this case, pins state is not managed by alsa fw.
252
+ * These pins are managed in suspend/resume callbacks.
253
+ */
254
+static int stm32_sai_suspend(struct device *dev)
255
+{
256
+	struct stm32_sai_data *sai = dev_get_drvdata(dev);
257
+	int ret;
258
+
259
+	ret = stm32_sai_pclk_enable(dev);
260
+	if (ret)
261
+		return ret;
262
+
263
+	sai->gcr = readl_relaxed(sai->base);
264
+	stm32_sai_pclk_disable(dev);
265
+
266
+	return pinctrl_pm_select_sleep_state(dev);
267
+}
268
+
269
+static int stm32_sai_resume(struct device *dev)
270
+{
271
+	struct stm32_sai_data *sai = dev_get_drvdata(dev);
272
+	int ret;
273
+
274
+	ret = stm32_sai_pclk_enable(dev);
275
+	if (ret)
276
+		return ret;
277
+
278
+	writel_relaxed(sai->gcr, sai->base);
279
+	stm32_sai_pclk_disable(dev);
280
+
281
+	return pinctrl_pm_select_default_state(dev);
282
+}
283
+#endif /* CONFIG_PM_SLEEP */
284
+
285
+static const struct dev_pm_ops stm32_sai_pm_ops = {
286
+	SET_SYSTEM_SLEEP_PM_OPS(stm32_sai_suspend, stm32_sai_resume)
287
+};
288
+
196289 MODULE_DEVICE_TABLE(of, stm32_sai_ids);
197290 
198291 static struct platform_driver stm32_sai_driver = {
199292 	.driver = {
200293 		.name = "st,stm32-sai",
201294 		.of_match_table = stm32_sai_ids,
295
+		.pm = &stm32_sai_pm_ops,
202296 	},
203297 	.probe = stm32_sai_probe,
204298 };