| .. | .. |
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| 6 | 6 | * Copyright 1994, Drew Eckhardt |
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| 7 | 7 | * Copyright 1997--1999 Martin Mares <mj@ucw.cz> |
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| 8 | 8 | * |
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| 9 | + * PCI Express ASPM defines and function prototypes |
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| 10 | + * Copyright (c) 2007 Intel Corp. |
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| 11 | + * Zhang Yanmin (yanmin.zhang@intel.com) |
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| 12 | + * Shaohua Li (shaohua.li@intel.com) |
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| 13 | + * |
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| 9 | 14 | * For more information, please consult the following manuals (look at |
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| 10 | 15 | * http://www.pcisig.com/ for how to get them): |
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| 11 | 16 | * |
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| 12 | 17 | * PCI BIOS Specification |
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| 13 | 18 | * PCI Local Bus Specification |
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| 14 | 19 | * PCI to PCI Bridge Specification |
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| 20 | + * PCI Express Specification |
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| 15 | 21 | * PCI System Design Guide |
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| 16 | 22 | */ |
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| 17 | 23 | #ifndef LINUX_PCI_H |
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| .. | .. |
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| 36 | 42 | |
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| 37 | 43 | #include <linux/pci_ids.h> |
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| 38 | 44 | #include <linux/android_kabi.h> |
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| 45 | + |
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| 46 | +#define PCI_STATUS_ERROR_BITS (PCI_STATUS_DETECTED_PARITY | \ |
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| 47 | + PCI_STATUS_SIG_SYSTEM_ERROR | \ |
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| 48 | + PCI_STATUS_REC_MASTER_ABORT | \ |
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| 49 | + PCI_STATUS_REC_TARGET_ABORT | \ |
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| 50 | + PCI_STATUS_SIG_TARGET_ABORT | \ |
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| 51 | + PCI_STATUS_PARITY) |
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| 39 | 52 | |
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| 40 | 53 | /* |
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| 41 | 54 | * The PCI interface treats multi-function devices as independent |
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| .. | .. |
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| 77 | 90 | enum { |
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| 78 | 91 | /* #0-5: standard PCI resources */ |
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| 79 | 92 | PCI_STD_RESOURCES, |
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| 80 | | - PCI_STD_RESOURCE_END = 5, |
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| 93 | + PCI_STD_RESOURCE_END = PCI_STD_RESOURCES + PCI_STD_NUM_BARS - 1, |
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| 81 | 94 | |
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| 82 | 95 | /* #6: expansion ROM resource */ |
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| 83 | 96 | PCI_ROM_RESOURCE, |
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| .. | .. |
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| 88 | 101 | PCI_IOV_RESOURCE_END = PCI_IOV_RESOURCES + PCI_SRIOV_NUM_BARS - 1, |
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| 89 | 102 | #endif |
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| 90 | 103 | |
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| 91 | | - /* Resources assigned to buses behind the bridge */ |
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| 104 | +/* PCI-to-PCI (P2P) bridge windows */ |
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| 105 | +#define PCI_BRIDGE_IO_WINDOW (PCI_BRIDGE_RESOURCES + 0) |
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| 106 | +#define PCI_BRIDGE_MEM_WINDOW (PCI_BRIDGE_RESOURCES + 1) |
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| 107 | +#define PCI_BRIDGE_PREF_MEM_WINDOW (PCI_BRIDGE_RESOURCES + 2) |
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| 108 | + |
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| 109 | +/* CardBus bridge windows */ |
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| 110 | +#define PCI_CB_BRIDGE_IO_0_WINDOW (PCI_BRIDGE_RESOURCES + 0) |
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| 111 | +#define PCI_CB_BRIDGE_IO_1_WINDOW (PCI_BRIDGE_RESOURCES + 1) |
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| 112 | +#define PCI_CB_BRIDGE_MEM_0_WINDOW (PCI_BRIDGE_RESOURCES + 2) |
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| 113 | +#define PCI_CB_BRIDGE_MEM_1_WINDOW (PCI_BRIDGE_RESOURCES + 3) |
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| 114 | + |
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| 115 | +/* Total number of bridge resources for P2P and CardBus */ |
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| 92 | 116 | #define PCI_BRIDGE_RESOURCE_NUM 4 |
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| 93 | 117 | |
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| 118 | + /* Resources assigned to buses behind the bridge */ |
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| 94 | 119 | PCI_BRIDGE_RESOURCES, |
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| 95 | 120 | PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES + |
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| 96 | 121 | PCI_BRIDGE_RESOURCE_NUM - 1, |
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| .. | .. |
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| 146 | 171 | return pci_power_names[1 + (__force int) state]; |
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| 147 | 172 | } |
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| 148 | 173 | |
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| 149 | | -#define PCI_PM_D2_DELAY 200 |
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| 150 | | -#define PCI_PM_D3_WAIT 10 |
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| 151 | | -#define PCI_PM_D3COLD_WAIT 100 |
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| 152 | | -#define PCI_PM_BUS_WAIT 50 |
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| 153 | | - |
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| 154 | 174 | /** |
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| 175 | + * typedef pci_channel_state_t |
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| 176 | + * |
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| 155 | 177 | * The pci_channel state describes connectivity between the CPU and |
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| 156 | 178 | * the PCI device. If some PCI bus between here and the PCI device |
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| 157 | 179 | * has crashed or locked up, this info is reflected here. |
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| 158 | 180 | */ |
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| 159 | 181 | typedef unsigned int __bitwise pci_channel_state_t; |
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| 160 | 182 | |
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| 161 | | -enum pci_channel_state { |
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| 183 | +enum { |
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| 162 | 184 | /* I/O channel is in normal state */ |
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| 163 | 185 | pci_channel_io_normal = (__force pci_channel_state_t) 1, |
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| 164 | 186 | |
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| .. | .. |
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| 236 | 258 | PCIE_LNK_WIDTH_UNKNOWN = 0xff, |
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| 237 | 259 | }; |
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| 238 | 260 | |
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| 239 | | -/* Based on the PCI Hotplug Spec, but some values are made up by us */ |
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| 261 | +/* See matching string table in pci_speed_string() */ |
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| 240 | 262 | enum pci_bus_speed { |
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| 241 | 263 | PCI_SPEED_33MHz = 0x00, |
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| 242 | 264 | PCI_SPEED_66MHz = 0x01, |
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| .. | .. |
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| 261 | 283 | PCIE_SPEED_5_0GT = 0x15, |
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| 262 | 284 | PCIE_SPEED_8_0GT = 0x16, |
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| 263 | 285 | PCIE_SPEED_16_0GT = 0x17, |
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| 286 | + PCIE_SPEED_32_0GT = 0x18, |
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| 264 | 287 | PCI_SPEED_UNKNOWN = 0xff, |
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| 265 | 288 | }; |
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| 266 | 289 | |
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| .. | .. |
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| 271 | 294 | u16 cap_nr; |
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| 272 | 295 | bool cap_extended; |
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| 273 | 296 | unsigned int size; |
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| 274 | | - u32 data[0]; |
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| 297 | + u32 data[]; |
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| 275 | 298 | }; |
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| 276 | 299 | |
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| 277 | 300 | struct pci_cap_saved_state { |
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| .. | .. |
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| 283 | 306 | struct pcie_link_state; |
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| 284 | 307 | struct pci_vpd; |
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| 285 | 308 | struct pci_sriov; |
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| 286 | | -struct pci_ats; |
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| 309 | +struct pci_p2pdma; |
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| 287 | 310 | |
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| 288 | 311 | /* The pci_dev structure describes PCI devices */ |
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| 289 | 312 | struct pci_dev { |
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| .. | .. |
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| 328 | 351 | pci_power_t current_state; /* Current operating state. In ACPI, |
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| 329 | 352 | this is D0-D3, D0 being fully |
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| 330 | 353 | functional, and D3 being off. */ |
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| 354 | + unsigned int imm_ready:1; /* Supports Immediate Readiness */ |
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| 331 | 355 | u8 pm_cap; /* PM capability offset */ |
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| 332 | 356 | unsigned int pme_support:5; /* Bitmask of states from which PME# |
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| 333 | 357 | can be generated */ |
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| .. | .. |
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| 336 | 360 | unsigned int d2_support:1; /* Low power state D2 is supported */ |
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| 337 | 361 | unsigned int no_d1d2:1; /* D1 and D2 are forbidden */ |
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| 338 | 362 | unsigned int no_d3cold:1; /* D3cold is forbidden */ |
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| 339 | | - unsigned int no_d3hot:1; /* D3hot is forbidden */ |
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| 340 | 363 | unsigned int bridge_d3:1; /* Allow D3 for bridge */ |
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| 341 | 364 | unsigned int d3cold_allowed:1; /* D3cold is allowed by user */ |
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| 342 | 365 | unsigned int mmio_always_on:1; /* Disallow turning off io/mem |
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| .. | .. |
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| 346 | 369 | D3cold, not set for devices |
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| 347 | 370 | powered on/off by the |
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| 348 | 371 | corresponding bridge */ |
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| 372 | + unsigned int skip_bus_pm:1; /* Internal: Skip bus-level PM */ |
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| 349 | 373 | unsigned int ignore_hotplug:1; /* Ignore hotplug events */ |
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| 350 | 374 | unsigned int hotplug_user_indicators:1; /* SlotCtl indicators |
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| 351 | 375 | controlled exclusively by |
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| 352 | 376 | user sysfs */ |
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| 353 | 377 | unsigned int clear_retrain_link:1; /* Need to clear Retrain Link |
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| 354 | 378 | bit manually */ |
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| 355 | | - unsigned int d3_delay; /* D3->D0 transition time in ms */ |
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| 379 | + unsigned int d3hot_delay; /* D3hot->D0 transition time in ms */ |
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| 356 | 380 | unsigned int d3cold_delay; /* D3cold->D0 transition time in ms */ |
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| 357 | 381 | |
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| 358 | 382 | #ifdef CONFIG_PCIEASPM |
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| 359 | 383 | struct pcie_link_state *link_state; /* ASPM link state */ |
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| 360 | 384 | unsigned int ltr_path:1; /* Latency Tolerance Reporting |
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| 361 | 385 | supported from root to here */ |
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| 386 | + int l1ss; /* L1SS Capability pointer */ |
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| 362 | 387 | #endif |
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| 363 | 388 | unsigned int eetlp_prefix_path:1; /* End-to-End TLP Prefix */ |
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| 364 | 389 | |
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| .. | .. |
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| 377 | 402 | bool match_driver; /* Skip attaching driver */ |
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| 378 | 403 | |
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| 379 | 404 | unsigned int transparent:1; /* Subtractive decode bridge */ |
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| 405 | + unsigned int io_window:1; /* Bridge has I/O window */ |
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| 406 | + unsigned int pref_window:1; /* Bridge has pref mem window */ |
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| 407 | + unsigned int pref_64_window:1; /* Pref mem window is 64-bit */ |
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| 380 | 408 | unsigned int multifunction:1; /* Multi-function device */ |
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| 381 | 409 | |
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| 382 | 410 | unsigned int is_busmaster:1; /* Is busmaster */ |
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| 383 | 411 | unsigned int no_msi:1; /* May not use MSI */ |
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| 384 | | - unsigned int no_64bit_msi:1; /* May only use 32-bit MSIs */ |
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| 412 | + unsigned int no_64bit_msi:1; /* May only use 32-bit MSIs */ |
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| 385 | 413 | unsigned int block_cfg_access:1; /* Config space access blocked */ |
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| 386 | 414 | unsigned int broken_parity_status:1; /* Generates false positive parity */ |
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| 387 | 415 | unsigned int irq_reroute_variant:2; /* Needs IRQ rerouting variant */ |
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| .. | .. |
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| 400 | 428 | unsigned int is_hotplug_bridge:1; |
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| 401 | 429 | unsigned int shpc_managed:1; /* SHPC owned by shpchp */ |
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| 402 | 430 | unsigned int is_thunderbolt:1; /* Thunderbolt controller */ |
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| 403 | | - unsigned int __aer_firmware_first_valid:1; |
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| 404 | | - unsigned int __aer_firmware_first:1; |
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| 431 | + /* |
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| 432 | + * Devices marked being untrusted are the ones that can potentially |
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| 433 | + * execute DMA attacks and similar. They are typically connected |
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| 434 | + * through external ports such as Thunderbolt but not limited to |
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| 435 | + * that. When an IOMMU is enabled they should be getting full |
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| 436 | + * mappings to make sure they cannot access arbitrary memory. |
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| 437 | + */ |
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| 438 | + unsigned int untrusted:1; |
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| 439 | + /* |
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| 440 | + * Info from the platform, e.g., ACPI or device tree, may mark a |
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| 441 | + * device as "external-facing". An external-facing device is |
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| 442 | + * itself internal but devices downstream from it are external. |
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| 443 | + */ |
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| 444 | + unsigned int external_facing:1; |
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| 405 | 445 | unsigned int broken_intx_masking:1; /* INTx masking can't be used */ |
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| 406 | 446 | unsigned int io_window_1k:1; /* Intel bridge 1K I/O windows */ |
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| 407 | 447 | unsigned int irq_managed:1; |
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| 408 | | - unsigned int has_secondary_link:1; |
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| 409 | 448 | unsigned int non_compliant_bars:1; /* Broken BARs; ignore them */ |
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| 410 | 449 | unsigned int is_probed:1; /* Device probing in progress */ |
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| 450 | + unsigned int link_active_reporting:1;/* Device capable of reporting link active */ |
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| 451 | + unsigned int no_vf_scan:1; /* Don't scan for VFs after IOV enablement */ |
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| 452 | + unsigned int no_command_memory:1; /* No PCI_COMMAND_MEMORY */ |
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| 411 | 453 | pci_dev_flags_t dev_flags; |
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| 412 | 454 | atomic_t enable_cnt; /* pci_enable_device has been called */ |
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| 413 | 455 | |
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| 456 | +#ifdef CONFIG_NO_GKI |
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| 457 | + atomic_t sysfs_init_cnt; /* pci_create_sysfs_dev_files has been called */ |
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| 458 | +#endif |
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| 414 | 459 | u32 saved_config_space[16]; /* Config space saved at suspend time */ |
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| 415 | 460 | struct hlist_head saved_cap_space; |
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| 416 | 461 | struct bin_attribute *rom_attr; /* Attribute descriptor for sysfs ROM entry */ |
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| .. | .. |
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| 430 | 475 | const struct attribute_group **msi_irq_groups; |
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| 431 | 476 | #endif |
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| 432 | 477 | struct pci_vpd *vpd; |
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| 478 | +#ifdef CONFIG_PCIE_DPC |
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| 479 | + u16 dpc_cap; |
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| 480 | + unsigned int dpc_rp_extensions:1; |
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| 481 | + u8 dpc_rp_log_size; |
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| 482 | +#endif |
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| 433 | 483 | #ifdef CONFIG_PCI_ATS |
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| 434 | 484 | union { |
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| 435 | 485 | struct pci_sriov *sriov; /* PF: SR-IOV info */ |
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| .. | .. |
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| 437 | 487 | }; |
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| 438 | 488 | u16 ats_cap; /* ATS Capability offset */ |
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| 439 | 489 | u8 ats_stu; /* ATS Smallest Translation Unit */ |
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| 440 | | - atomic_t ats_ref_cnt; /* Number of VFs with ATS enabled */ |
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| 441 | 490 | #endif |
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| 442 | 491 | #ifdef CONFIG_PCI_PRI |
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| 492 | + u16 pri_cap; /* PRI Capability offset */ |
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| 443 | 493 | u32 pri_reqs_alloc; /* Number of PRI requests allocated */ |
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| 494 | + unsigned int pasid_required:1; /* PRG Response PASID Required */ |
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| 444 | 495 | #endif |
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| 445 | 496 | #ifdef CONFIG_PCI_PASID |
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| 497 | + u16 pasid_cap; /* PASID Capability offset */ |
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| 446 | 498 | u16 pasid_features; |
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| 447 | 499 | #endif |
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| 500 | +#ifdef CONFIG_PCI_P2PDMA |
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| 501 | + struct pci_p2pdma *p2pdma; |
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| 502 | +#endif |
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| 503 | + u16 acs_cap; /* ACS Capability offset */ |
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| 448 | 504 | phys_addr_t rom; /* Physical address if not from BAR */ |
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| 449 | 505 | size_t romlen; /* Length if not from BAR */ |
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| 450 | 506 | char *driver_override; /* Driver name to force a match */ |
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| .. | .. |
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| 480 | 536 | struct device dev; |
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| 481 | 537 | struct pci_bus *bus; /* Root bus */ |
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| 482 | 538 | struct pci_ops *ops; |
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| 539 | + struct pci_ops *child_ops; |
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| 483 | 540 | void *sysdata; |
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| 484 | 541 | int busnr; |
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| 485 | 542 | struct list_head windows; /* resource_entry */ |
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| 543 | + struct list_head dma_ranges; /* dma ranges resource list */ |
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| 486 | 544 | u8 (*swizzle_irq)(struct pci_dev *, u8 *); /* Platform IRQ swizzler */ |
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| 487 | 545 | int (*map_irq)(const struct pci_dev *, u8, u8); |
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| 488 | 546 | void (*release_fn)(struct pci_host_bridge *); |
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| .. | .. |
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| 495 | 553 | unsigned int native_shpc_hotplug:1; /* OS may use SHPC hotplug */ |
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| 496 | 554 | unsigned int native_pme:1; /* OS may use PCIe PME */ |
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| 497 | 555 | unsigned int native_ltr:1; /* OS may use PCIe LTR */ |
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| 556 | + unsigned int native_dpc:1; /* OS may use PCIe DPC */ |
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| 557 | + unsigned int preserve_config:1; /* Preserve FW resource setup */ |
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| 558 | + unsigned int size_windows:1; /* Enable root bus sizing */ |
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| 559 | + |
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| 498 | 560 | /* Resource alignment requirements */ |
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| 499 | 561 | resource_size_t (*align_resource)(struct pci_dev *dev, |
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| 500 | 562 | const struct resource *res, |
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| 501 | 563 | resource_size_t start, |
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| 502 | 564 | resource_size_t size, |
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| 503 | 565 | resource_size_t align); |
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| 504 | | - unsigned long private[0] ____cacheline_aligned; |
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| 566 | + |
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| 567 | + ANDROID_KABI_RESERVE(1); |
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| 568 | + ANDROID_KABI_RESERVE(2); |
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| 569 | + |
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| 570 | + unsigned long private[] ____cacheline_aligned; |
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| 505 | 571 | }; |
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| 506 | 572 | |
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| 507 | 573 | #define to_pci_host_bridge(n) container_of(n, struct pci_host_bridge, dev) |
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| .. | .. |
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| 594 | 660 | |
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| 595 | 661 | #define to_pci_bus(n) container_of(n, struct pci_bus, dev) |
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| 596 | 662 | |
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| 663 | +static inline u16 pci_dev_id(struct pci_dev *dev) |
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| 664 | +{ |
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| 665 | + return PCI_DEVID(dev->bus->number, dev->devfn); |
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| 666 | +} |
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| 667 | + |
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| 597 | 668 | /* |
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| 598 | 669 | * Returns true if the PCI bus is root (behind host-PCI bridge), |
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| 599 | 670 | * false otherwise |
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| .. | .. |
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| 632 | 703 | |
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| 633 | 704 | return dev->bus->self; |
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| 634 | 705 | } |
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| 635 | | - |
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| 636 | | -struct device *pci_get_host_bridge_device(struct pci_dev *dev); |
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| 637 | | -void pci_put_host_bridge_device(struct device *dev); |
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| 638 | 706 | |
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| 639 | 707 | #ifdef CONFIG_PCI_MSI |
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| 640 | 708 | static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) |
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| .. | .. |
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| 686 | 754 | void __iomem *(*map_bus)(struct pci_bus *bus, unsigned int devfn, int where); |
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| 687 | 755 | int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val); |
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| 688 | 756 | int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val); |
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| 757 | + |
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| 758 | + ANDROID_KABI_RESERVE(1); |
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| 689 | 759 | }; |
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| 690 | 760 | |
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| 691 | 761 | /* |
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| .. | .. |
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| 747 | 817 | struct pci_error_handlers { |
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| 748 | 818 | /* PCI bus error detected on this device */ |
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| 749 | 819 | pci_ers_result_t (*error_detected)(struct pci_dev *dev, |
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| 750 | | - enum pci_channel_state error); |
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| 820 | + pci_channel_state_t error); |
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| 751 | 821 | |
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| 752 | 822 | /* MMIO has been re-enabled, but not DMA */ |
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| 753 | 823 | pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev); |
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| .. | .. |
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| 761 | 831 | |
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| 762 | 832 | /* Device driver may resume normal operations */ |
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| 763 | 833 | void (*resume)(struct pci_dev *dev); |
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| 834 | + |
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| 835 | + ANDROID_KABI_RESERVE(1); |
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| 764 | 836 | }; |
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| 765 | 837 | |
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| 766 | 838 | |
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| 767 | 839 | struct module; |
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| 840 | + |
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| 841 | +/** |
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| 842 | + * struct pci_driver - PCI driver structure |
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| 843 | + * @node: List of driver structures. |
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| 844 | + * @name: Driver name. |
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| 845 | + * @id_table: Pointer to table of device IDs the driver is |
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| 846 | + * interested in. Most drivers should export this |
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| 847 | + * table using MODULE_DEVICE_TABLE(pci,...). |
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| 848 | + * @probe: This probing function gets called (during execution |
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| 849 | + * of pci_register_driver() for already existing |
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| 850 | + * devices or later if a new device gets inserted) for |
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| 851 | + * all PCI devices which match the ID table and are not |
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| 852 | + * "owned" by the other drivers yet. This function gets |
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| 853 | + * passed a "struct pci_dev \*" for each device whose |
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| 854 | + * entry in the ID table matches the device. The probe |
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| 855 | + * function returns zero when the driver chooses to |
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| 856 | + * take "ownership" of the device or an error code |
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| 857 | + * (negative number) otherwise. |
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| 858 | + * The probe function always gets called from process |
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| 859 | + * context, so it can sleep. |
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| 860 | + * @remove: The remove() function gets called whenever a device |
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| 861 | + * being handled by this driver is removed (either during |
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| 862 | + * deregistration of the driver or when it's manually |
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| 863 | + * pulled out of a hot-pluggable slot). |
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| 864 | + * The remove function always gets called from process |
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| 865 | + * context, so it can sleep. |
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| 866 | + * @suspend: Put device into low power state. |
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| 867 | + * @resume: Wake device from low power state. |
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| 868 | + * (Please see Documentation/power/pci.rst for descriptions |
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| 869 | + * of PCI Power Management and the related functions.) |
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| 870 | + * @shutdown: Hook into reboot_notifier_list (kernel/sys.c). |
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| 871 | + * Intended to stop any idling DMA operations. |
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| 872 | + * Useful for enabling wake-on-lan (NIC) or changing |
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| 873 | + * the power state of a device before reboot. |
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| 874 | + * e.g. drivers/net/e100.c. |
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| 875 | + * @sriov_configure: Optional driver callback to allow configuration of |
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| 876 | + * number of VFs to enable via sysfs "sriov_numvfs" file. |
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| 877 | + * @err_handler: See Documentation/PCI/pci-error-recovery.rst |
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| 878 | + * @groups: Sysfs attribute groups. |
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| 879 | + * @driver: Driver model structure. |
|---|
| 880 | + * @dynids: List of dynamically added device IDs. |
|---|
| 881 | + */ |
|---|
| 768 | 882 | struct pci_driver { |
|---|
| 769 | 883 | struct list_head node; |
|---|
| 770 | 884 | const char *name; |
|---|
| .. | .. |
|---|
| 772 | 886 | int (*probe)(struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */ |
|---|
| 773 | 887 | void (*remove)(struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */ |
|---|
| 774 | 888 | int (*suspend)(struct pci_dev *dev, pm_message_t state); /* Device suspended */ |
|---|
| 775 | | - int (*suspend_late)(struct pci_dev *dev, pm_message_t state); |
|---|
| 776 | | - int (*resume_early)(struct pci_dev *dev); |
|---|
| 777 | | - int (*resume) (struct pci_dev *dev); /* Device woken up */ |
|---|
| 778 | | - void (*shutdown) (struct pci_dev *dev); |
|---|
| 779 | | - int (*sriov_configure) (struct pci_dev *dev, int num_vfs); /* On PF */ |
|---|
| 889 | + int (*resume)(struct pci_dev *dev); /* Device woken up */ |
|---|
| 890 | + void (*shutdown)(struct pci_dev *dev); |
|---|
| 891 | + int (*sriov_configure)(struct pci_dev *dev, int num_vfs); /* On PF */ |
|---|
| 780 | 892 | const struct pci_error_handlers *err_handler; |
|---|
| 781 | 893 | const struct attribute_group **groups; |
|---|
| 782 | 894 | struct device_driver driver; |
|---|
| .. | .. |
|---|
| 870 | 982 | PCI_SCAN_ALL_PCIE_DEVS = 0x00000040, /* Scan all, not just dev 0 */ |
|---|
| 871 | 983 | }; |
|---|
| 872 | 984 | |
|---|
| 985 | +#define PCI_IRQ_LEGACY (1 << 0) /* Allow legacy interrupts */ |
|---|
| 986 | +#define PCI_IRQ_MSI (1 << 1) /* Allow MSI interrupts */ |
|---|
| 987 | +#define PCI_IRQ_MSIX (1 << 2) /* Allow MSI-X interrupts */ |
|---|
| 988 | +#define PCI_IRQ_AFFINITY (1 << 3) /* Auto-assign affinity */ |
|---|
| 989 | + |
|---|
| 873 | 990 | /* These external functions are only available when PCI support is enabled */ |
|---|
| 874 | 991 | #ifdef CONFIG_PCI |
|---|
| 875 | 992 | |
|---|
| .. | .. |
|---|
| 914 | 1031 | resource_size_t, |
|---|
| 915 | 1032 | resource_size_t); |
|---|
| 916 | 1033 | |
|---|
| 917 | | -/* Weak but can be overriden by arch */ |
|---|
| 1034 | +/* Weak but can be overridden by arch */ |
|---|
| 918 | 1035 | void pci_fixup_cardbus(struct pci_bus *); |
|---|
| 919 | 1036 | |
|---|
| 920 | 1037 | /* Generic PCI functions used internally */ |
|---|
| .. | .. |
|---|
| 940 | 1057 | int pci_scan_root_bus_bridge(struct pci_host_bridge *bridge); |
|---|
| 941 | 1058 | struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, |
|---|
| 942 | 1059 | int busnr); |
|---|
| 943 | | -void pcie_update_link_speed(struct pci_bus *bus, u16 link_status); |
|---|
| 944 | 1060 | struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr, |
|---|
| 945 | 1061 | const char *name, |
|---|
| 946 | 1062 | struct hotplug_slot *hotplug); |
|---|
| .. | .. |
|---|
| 958 | 1074 | void pci_read_bridge_bases(struct pci_bus *child); |
|---|
| 959 | 1075 | struct resource *pci_find_parent_resource(const struct pci_dev *dev, |
|---|
| 960 | 1076 | struct resource *res); |
|---|
| 961 | | -struct pci_dev *pci_find_pcie_root_port(struct pci_dev *dev); |
|---|
| 962 | 1077 | u8 pci_swizzle_interrupt_pin(const struct pci_dev *dev, u8 pin); |
|---|
| 963 | 1078 | int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge); |
|---|
| 964 | 1079 | u8 pci_common_swizzle(struct pci_dev *dev, u8 *pinp); |
|---|
| .. | .. |
|---|
| 977 | 1092 | |
|---|
| 978 | 1093 | /* Generic PCI functions exported to card drivers */ |
|---|
| 979 | 1094 | |
|---|
| 980 | | -enum pci_lost_interrupt_reason { |
|---|
| 981 | | - PCI_LOST_IRQ_NO_INFORMATION = 0, |
|---|
| 982 | | - PCI_LOST_IRQ_DISABLE_MSI, |
|---|
| 983 | | - PCI_LOST_IRQ_DISABLE_MSIX, |
|---|
| 984 | | - PCI_LOST_IRQ_DISABLE_ACPI, |
|---|
| 985 | | -}; |
|---|
| 986 | | -enum pci_lost_interrupt_reason pci_lost_interrupt(struct pci_dev *dev); |
|---|
| 987 | 1095 | int pci_find_capability(struct pci_dev *dev, int cap); |
|---|
| 988 | 1096 | int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap); |
|---|
| 989 | 1097 | int pci_find_ext_capability(struct pci_dev *dev, int cap); |
|---|
| .. | .. |
|---|
| 991 | 1099 | int pci_find_ht_capability(struct pci_dev *dev, int ht_cap); |
|---|
| 992 | 1100 | int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap); |
|---|
| 993 | 1101 | struct pci_bus *pci_find_next_bus(const struct pci_bus *from); |
|---|
| 1102 | + |
|---|
| 1103 | +u64 pci_get_dsn(struct pci_dev *dev); |
|---|
| 994 | 1104 | |
|---|
| 995 | 1105 | struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device, |
|---|
| 996 | 1106 | struct pci_dev *from); |
|---|
| .. | .. |
|---|
| 1149 | 1259 | int pci_select_bars(struct pci_dev *dev, unsigned long flags); |
|---|
| 1150 | 1260 | bool pci_device_is_present(struct pci_dev *pdev); |
|---|
| 1151 | 1261 | void pci_ignore_hotplug(struct pci_dev *dev); |
|---|
| 1262 | +struct pci_dev *pci_real_dma_dev(struct pci_dev *dev); |
|---|
| 1263 | +int pci_status_get_and_clear_errors(struct pci_dev *pdev); |
|---|
| 1152 | 1264 | |
|---|
| 1153 | 1265 | int __printf(6, 7) pci_request_irq(struct pci_dev *dev, unsigned int nr, |
|---|
| 1154 | 1266 | irq_handler_t handler, irq_handler_t thread_fn, void *dev_id, |
|---|
| .. | .. |
|---|
| 1175 | 1287 | int pci_add_cap_save_buffer(struct pci_dev *dev, char cap, unsigned int size); |
|---|
| 1176 | 1288 | int pci_add_ext_cap_save_buffer(struct pci_dev *dev, |
|---|
| 1177 | 1289 | u16 cap, unsigned int size); |
|---|
| 1178 | | -int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state); |
|---|
| 1290 | +int pci_platform_power_transition(struct pci_dev *dev, pci_power_t state); |
|---|
| 1179 | 1291 | int pci_set_power_state(struct pci_dev *dev, pci_power_t state); |
|---|
| 1180 | 1292 | pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state); |
|---|
| 1181 | 1293 | bool pci_pme_capable(struct pci_dev *dev, pci_power_t state); |
|---|
| .. | .. |
|---|
| 1185 | 1297 | int pci_prepare_to_sleep(struct pci_dev *dev); |
|---|
| 1186 | 1298 | int pci_back_from_sleep(struct pci_dev *dev); |
|---|
| 1187 | 1299 | bool pci_dev_run_wake(struct pci_dev *dev); |
|---|
| 1188 | | -bool pci_check_pme_status(struct pci_dev *dev); |
|---|
| 1189 | | -void pci_pme_wakeup_bus(struct pci_bus *bus); |
|---|
| 1190 | 1300 | void pci_d3cold_enable(struct pci_dev *dev); |
|---|
| 1191 | 1301 | void pci_d3cold_disable(struct pci_dev *dev); |
|---|
| 1192 | 1302 | bool pcie_relaxed_ordering_enabled(struct pci_dev *dev); |
|---|
| 1193 | 1303 | void pci_wakeup_bus(struct pci_bus *bus); |
|---|
| 1194 | 1304 | void pci_bus_set_current_state(struct pci_bus *bus, pci_power_t state); |
|---|
| 1195 | | - |
|---|
| 1196 | | -/* PCI Virtual Channel */ |
|---|
| 1197 | | -int pci_save_vc_state(struct pci_dev *dev); |
|---|
| 1198 | | -void pci_restore_vc_state(struct pci_dev *dev); |
|---|
| 1199 | | -void pci_allocate_vc_save_buffers(struct pci_dev *dev); |
|---|
| 1200 | 1305 | |
|---|
| 1201 | 1306 | /* For use by arch with custom probe code */ |
|---|
| 1202 | 1307 | void set_pcie_port_type(struct pci_dev *pdev); |
|---|
| .. | .. |
|---|
| 1235 | 1340 | int __must_check pci_request_regions_exclusive(struct pci_dev *, const char *); |
|---|
| 1236 | 1341 | void pci_release_regions(struct pci_dev *); |
|---|
| 1237 | 1342 | int __must_check pci_request_region(struct pci_dev *, int, const char *); |
|---|
| 1238 | | -int __must_check pci_request_region_exclusive(struct pci_dev *, int, const char *); |
|---|
| 1239 | 1343 | void pci_release_region(struct pci_dev *, int); |
|---|
| 1240 | 1344 | int pci_request_selected_regions(struct pci_dev *, int, const char *); |
|---|
| 1241 | 1345 | int pci_request_selected_regions_exclusive(struct pci_dev *, int, const char *); |
|---|
| 1242 | 1346 | void pci_release_selected_regions(struct pci_dev *, int); |
|---|
| 1243 | 1347 | |
|---|
| 1244 | 1348 | /* drivers/pci/bus.c */ |
|---|
| 1245 | | -struct pci_bus *pci_bus_get(struct pci_bus *bus); |
|---|
| 1246 | | -void pci_bus_put(struct pci_bus *bus); |
|---|
| 1247 | 1349 | void pci_add_resource(struct list_head *resources, struct resource *res); |
|---|
| 1248 | 1350 | void pci_add_resource_offset(struct list_head *resources, struct resource *res, |
|---|
| 1249 | 1351 | resource_size_t offset); |
|---|
| .. | .. |
|---|
| 1353 | 1455 | int pci_set_vga_state(struct pci_dev *pdev, bool decode, |
|---|
| 1354 | 1456 | unsigned int command_bits, u32 flags); |
|---|
| 1355 | 1457 | |
|---|
| 1356 | | -#define PCI_IRQ_LEGACY (1 << 0) /* Allow legacy interrupts */ |
|---|
| 1357 | | -#define PCI_IRQ_MSI (1 << 1) /* Allow MSI interrupts */ |
|---|
| 1358 | | -#define PCI_IRQ_MSIX (1 << 2) /* Allow MSI-X interrupts */ |
|---|
| 1359 | | -#define PCI_IRQ_AFFINITY (1 << 3) /* Auto-assign affinity */ |
|---|
| 1458 | +/* |
|---|
| 1459 | + * Virtual interrupts allow for more interrupts to be allocated |
|---|
| 1460 | + * than the device has interrupts for. These are not programmed |
|---|
| 1461 | + * into the device's MSI-X table and must be handled by some |
|---|
| 1462 | + * other driver means. |
|---|
| 1463 | + */ |
|---|
| 1464 | +#define PCI_IRQ_VIRTUAL (1 << 4) |
|---|
| 1465 | + |
|---|
| 1360 | 1466 | #define PCI_IRQ_ALL_TYPES \ |
|---|
| 1361 | 1467 | (PCI_IRQ_LEGACY | PCI_IRQ_MSI | PCI_IRQ_MSIX) |
|---|
| 1362 | 1468 | |
|---|
| 1363 | 1469 | /* kmem_cache style wrapper around pci_alloc_consistent() */ |
|---|
| 1364 | 1470 | |
|---|
| 1365 | | -#include <linux/pci-dma.h> |
|---|
| 1366 | 1471 | #include <linux/dmapool.h> |
|---|
| 1367 | 1472 | |
|---|
| 1368 | 1473 | #define pci_pool dma_pool |
|---|
| .. | .. |
|---|
| 1399 | 1504 | } |
|---|
| 1400 | 1505 | int pci_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs, |
|---|
| 1401 | 1506 | unsigned int max_vecs, unsigned int flags, |
|---|
| 1402 | | - const struct irq_affinity *affd); |
|---|
| 1507 | + struct irq_affinity *affd); |
|---|
| 1403 | 1508 | |
|---|
| 1404 | 1509 | void pci_free_irq_vectors(struct pci_dev *dev); |
|---|
| 1405 | 1510 | int pci_irq_vector(struct pci_dev *dev, unsigned int nr); |
|---|
| 1406 | 1511 | const struct cpumask *pci_irq_get_affinity(struct pci_dev *pdev, int vec); |
|---|
| 1407 | | -int pci_irq_get_node(struct pci_dev *pdev, int vec); |
|---|
| 1408 | 1512 | |
|---|
| 1409 | 1513 | #else |
|---|
| 1410 | 1514 | static inline int pci_msi_vec_count(struct pci_dev *dev) { return -ENOSYS; } |
|---|
| .. | .. |
|---|
| 1425 | 1529 | static inline int |
|---|
| 1426 | 1530 | pci_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs, |
|---|
| 1427 | 1531 | unsigned int max_vecs, unsigned int flags, |
|---|
| 1428 | | - const struct irq_affinity *aff_desc) |
|---|
| 1532 | + struct irq_affinity *aff_desc) |
|---|
| 1429 | 1533 | { |
|---|
| 1430 | 1534 | if ((flags & PCI_IRQ_LEGACY) && min_vecs == 1 && dev->irq) |
|---|
| 1431 | 1535 | return 1; |
|---|
| .. | .. |
|---|
| 1447 | 1551 | { |
|---|
| 1448 | 1552 | return cpu_possible_mask; |
|---|
| 1449 | 1553 | } |
|---|
| 1450 | | - |
|---|
| 1451 | | -static inline int pci_irq_get_node(struct pci_dev *pdev, int vec) |
|---|
| 1452 | | -{ |
|---|
| 1453 | | - return first_online_node; |
|---|
| 1454 | | -} |
|---|
| 1455 | 1554 | #endif |
|---|
| 1456 | | - |
|---|
| 1457 | | -static inline int |
|---|
| 1458 | | -pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs, |
|---|
| 1459 | | - unsigned int max_vecs, unsigned int flags) |
|---|
| 1460 | | -{ |
|---|
| 1461 | | - return pci_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs, flags, |
|---|
| 1462 | | - NULL); |
|---|
| 1463 | | -} |
|---|
| 1464 | 1555 | |
|---|
| 1465 | 1556 | /** |
|---|
| 1466 | 1557 | * pci_irqd_intx_xlate() - Translate PCI INTx value to an IRQ domain hwirq |
|---|
| .. | .. |
|---|
| 1502 | 1593 | #define pcie_ports_native false |
|---|
| 1503 | 1594 | #endif |
|---|
| 1504 | 1595 | |
|---|
| 1596 | +#define PCIE_LINK_STATE_L0S BIT(0) |
|---|
| 1597 | +#define PCIE_LINK_STATE_L1 BIT(1) |
|---|
| 1598 | +#define PCIE_LINK_STATE_CLKPM BIT(2) |
|---|
| 1599 | +#define PCIE_LINK_STATE_L1_1 BIT(3) |
|---|
| 1600 | +#define PCIE_LINK_STATE_L1_2 BIT(4) |
|---|
| 1601 | +#define PCIE_LINK_STATE_L1_1_PCIPM BIT(5) |
|---|
| 1602 | +#define PCIE_LINK_STATE_L1_2_PCIPM BIT(6) |
|---|
| 1603 | + |
|---|
| 1505 | 1604 | #ifdef CONFIG_PCIEASPM |
|---|
| 1605 | +int pci_disable_link_state(struct pci_dev *pdev, int state); |
|---|
| 1606 | +int pci_disable_link_state_locked(struct pci_dev *pdev, int state); |
|---|
| 1607 | +void pcie_no_aspm(void); |
|---|
| 1506 | 1608 | bool pcie_aspm_support_enabled(void); |
|---|
| 1609 | +bool pcie_aspm_enabled(struct pci_dev *pdev); |
|---|
| 1507 | 1610 | #else |
|---|
| 1611 | +static inline int pci_disable_link_state(struct pci_dev *pdev, int state) |
|---|
| 1612 | +{ return 0; } |
|---|
| 1613 | +static inline int pci_disable_link_state_locked(struct pci_dev *pdev, int state) |
|---|
| 1614 | +{ return 0; } |
|---|
| 1615 | +static inline void pcie_no_aspm(void) { } |
|---|
| 1508 | 1616 | static inline bool pcie_aspm_support_enabled(void) { return false; } |
|---|
| 1617 | +static inline bool pcie_aspm_enabled(struct pci_dev *pdev) { return false; } |
|---|
| 1509 | 1618 | #endif |
|---|
| 1510 | 1619 | |
|---|
| 1511 | 1620 | #ifdef CONFIG_PCIEAER |
|---|
| .. | .. |
|---|
| 1514 | 1623 | static inline bool pci_aer_available(void) { return false; } |
|---|
| 1515 | 1624 | #endif |
|---|
| 1516 | 1625 | |
|---|
| 1517 | | -#ifdef CONFIG_PCIE_ECRC |
|---|
| 1518 | | -void pcie_set_ecrc_checking(struct pci_dev *dev); |
|---|
| 1519 | | -void pcie_ecrc_get_policy(char *str); |
|---|
| 1520 | | -#else |
|---|
| 1521 | | -static inline void pcie_set_ecrc_checking(struct pci_dev *dev) { } |
|---|
| 1522 | | -static inline void pcie_ecrc_get_policy(char *str) { } |
|---|
| 1523 | | -#endif |
|---|
| 1524 | | - |
|---|
| 1525 | 1626 | bool pci_ats_disabled(void); |
|---|
| 1526 | | - |
|---|
| 1527 | | -#ifdef CONFIG_PCI_ATS |
|---|
| 1528 | | -/* Address Translation Service */ |
|---|
| 1529 | | -void pci_ats_init(struct pci_dev *dev); |
|---|
| 1530 | | -int pci_enable_ats(struct pci_dev *dev, int ps); |
|---|
| 1531 | | -void pci_disable_ats(struct pci_dev *dev); |
|---|
| 1532 | | -int pci_ats_queue_depth(struct pci_dev *dev); |
|---|
| 1533 | | -#else |
|---|
| 1534 | | -static inline void pci_ats_init(struct pci_dev *d) { } |
|---|
| 1535 | | -static inline int pci_enable_ats(struct pci_dev *d, int ps) { return -ENODEV; } |
|---|
| 1536 | | -static inline void pci_disable_ats(struct pci_dev *d) { } |
|---|
| 1537 | | -static inline int pci_ats_queue_depth(struct pci_dev *d) { return -ENODEV; } |
|---|
| 1538 | | -#endif |
|---|
| 1539 | 1627 | |
|---|
| 1540 | 1628 | #ifdef CONFIG_PCIE_PTM |
|---|
| 1541 | 1629 | int pci_enable_ptm(struct pci_dev *dev, u8 *granularity); |
|---|
| .. | .. |
|---|
| 1658 | 1746 | static inline void pci_set_master(struct pci_dev *dev) { } |
|---|
| 1659 | 1747 | static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; } |
|---|
| 1660 | 1748 | static inline void pci_disable_device(struct pci_dev *dev) { } |
|---|
| 1749 | +static inline int pcim_enable_device(struct pci_dev *pdev) { return -EIO; } |
|---|
| 1661 | 1750 | static inline int pci_assign_resource(struct pci_dev *dev, int i) |
|---|
| 1662 | 1751 | { return -EBUSY; } |
|---|
| 1663 | 1752 | static inline int __must_check __pci_register_driver(struct pci_driver *drv, |
|---|
| .. | .. |
|---|
| 1673 | 1762 | int cap) |
|---|
| 1674 | 1763 | { return 0; } |
|---|
| 1675 | 1764 | static inline int pci_find_ext_capability(struct pci_dev *dev, int cap) |
|---|
| 1765 | +{ return 0; } |
|---|
| 1766 | + |
|---|
| 1767 | +static inline u64 pci_get_dsn(struct pci_dev *dev) |
|---|
| 1676 | 1768 | { return 0; } |
|---|
| 1677 | 1769 | |
|---|
| 1678 | 1770 | /* Power management related routines */ |
|---|
| .. | .. |
|---|
| 1698 | 1790 | |
|---|
| 1699 | 1791 | static inline unsigned long pci_address_to_pio(phys_addr_t addr) { return -1; } |
|---|
| 1700 | 1792 | |
|---|
| 1701 | | -static inline void pci_block_cfg_access(struct pci_dev *dev) { } |
|---|
| 1702 | | -static inline int pci_block_cfg_access_in_atomic(struct pci_dev *dev) |
|---|
| 1703 | | -{ return 0; } |
|---|
| 1704 | | -static inline void pci_unblock_cfg_access(struct pci_dev *dev) { } |
|---|
| 1705 | | - |
|---|
| 1706 | 1793 | static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from) |
|---|
| 1707 | 1794 | { return NULL; } |
|---|
| 1708 | 1795 | static inline struct pci_dev *pci_get_slot(struct pci_bus *bus, |
|---|
| .. | .. |
|---|
| 1726 | 1813 | unsigned long *out_hwirq, |
|---|
| 1727 | 1814 | unsigned int *out_type) |
|---|
| 1728 | 1815 | { return -EINVAL; } |
|---|
| 1816 | + |
|---|
| 1817 | +static inline const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, |
|---|
| 1818 | + struct pci_dev *dev) |
|---|
| 1819 | +{ return NULL; } |
|---|
| 1820 | +static inline bool pci_ats_disabled(void) { return true; } |
|---|
| 1821 | + |
|---|
| 1822 | +static inline int pci_irq_vector(struct pci_dev *dev, unsigned int nr) |
|---|
| 1823 | +{ |
|---|
| 1824 | + return -EINVAL; |
|---|
| 1825 | +} |
|---|
| 1826 | + |
|---|
| 1827 | +static inline int |
|---|
| 1828 | +pci_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs, |
|---|
| 1829 | + unsigned int max_vecs, unsigned int flags, |
|---|
| 1830 | + struct irq_affinity *aff_desc) |
|---|
| 1831 | +{ |
|---|
| 1832 | + return -ENOSPC; |
|---|
| 1833 | +} |
|---|
| 1729 | 1834 | #endif /* CONFIG_PCI */ |
|---|
| 1835 | + |
|---|
| 1836 | +static inline int |
|---|
| 1837 | +pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs, |
|---|
| 1838 | + unsigned int max_vecs, unsigned int flags) |
|---|
| 1839 | +{ |
|---|
| 1840 | + return pci_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs, flags, |
|---|
| 1841 | + NULL); |
|---|
| 1842 | +} |
|---|
| 1730 | 1843 | |
|---|
| 1731 | 1844 | /* Include architecture-dependent settings and functions */ |
|---|
| 1732 | 1845 | |
|---|
| 1733 | 1846 | #include <asm/pci.h> |
|---|
| 1734 | 1847 | |
|---|
| 1735 | | -/* These two functions provide almost identical functionality. Depennding |
|---|
| 1848 | +/* These two functions provide almost identical functionality. Depending |
|---|
| 1736 | 1849 | * on the architecture, one will be implemented as a wrapper around the |
|---|
| 1737 | 1850 | * other (in drivers/pci/mmap.c). |
|---|
| 1738 | 1851 | * |
|---|
| .. | .. |
|---|
| 1801 | 1914 | return dev_name(&pdev->dev); |
|---|
| 1802 | 1915 | } |
|---|
| 1803 | 1916 | |
|---|
| 1804 | | - |
|---|
| 1805 | | -/* |
|---|
| 1806 | | - * Some archs don't want to expose struct resource to userland as-is |
|---|
| 1807 | | - * in sysfs and /proc |
|---|
| 1808 | | - */ |
|---|
| 1809 | | -#ifdef HAVE_ARCH_PCI_RESOURCE_TO_USER |
|---|
| 1810 | 1917 | void pci_resource_to_user(const struct pci_dev *dev, int bar, |
|---|
| 1811 | 1918 | const struct resource *rsrc, |
|---|
| 1812 | 1919 | resource_size_t *start, resource_size_t *end); |
|---|
| 1813 | | -#else |
|---|
| 1814 | | -static inline void pci_resource_to_user(const struct pci_dev *dev, int bar, |
|---|
| 1815 | | - const struct resource *rsrc, resource_size_t *start, |
|---|
| 1816 | | - resource_size_t *end) |
|---|
| 1817 | | -{ |
|---|
| 1818 | | - *start = rsrc->start; |
|---|
| 1819 | | - *end = rsrc->end; |
|---|
| 1820 | | -} |
|---|
| 1821 | | -#endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */ |
|---|
| 1822 | | - |
|---|
| 1823 | 1920 | |
|---|
| 1824 | 1921 | /* |
|---|
| 1825 | 1922 | * The world is not perfect and supplies us with broken PCI devices. |
|---|
| .. | .. |
|---|
| 1852 | 1949 | }; |
|---|
| 1853 | 1950 | |
|---|
| 1854 | 1951 | #ifdef CONFIG_HAVE_ARCH_PREL32_RELOCATIONS |
|---|
| 1855 | | -#define __DECLARE_PCI_FIXUP_SECTION(sec, name, vendor, device, class, \ |
|---|
| 1856 | | - class_shift, hook) \ |
|---|
| 1857 | | - __ADDRESSABLE(hook) \ |
|---|
| 1952 | +#define ___DECLARE_PCI_FIXUP_SECTION(sec, name, vendor, device, class, \ |
|---|
| 1953 | + class_shift, hook, stub) \ |
|---|
| 1954 | + void __cficanonical stub(struct pci_dev *dev); \ |
|---|
| 1955 | + void __cficanonical stub(struct pci_dev *dev) \ |
|---|
| 1956 | + { \ |
|---|
| 1957 | + hook(dev); \ |
|---|
| 1958 | + } \ |
|---|
| 1858 | 1959 | asm(".section " #sec ", \"a\" \n" \ |
|---|
| 1859 | 1960 | ".balign 16 \n" \ |
|---|
| 1860 | 1961 | ".short " #vendor ", " #device " \n" \ |
|---|
| 1861 | 1962 | ".long " #class ", " #class_shift " \n" \ |
|---|
| 1862 | | - ".long " #hook " - . \n" \ |
|---|
| 1963 | + ".long " #stub " - . \n" \ |
|---|
| 1863 | 1964 | ".previous \n"); |
|---|
| 1965 | + |
|---|
| 1966 | +#define __DECLARE_PCI_FIXUP_SECTION(sec, name, vendor, device, class, \ |
|---|
| 1967 | + class_shift, hook, stub) \ |
|---|
| 1968 | + ___DECLARE_PCI_FIXUP_SECTION(sec, name, vendor, device, class, \ |
|---|
| 1969 | + class_shift, hook, stub) |
|---|
| 1864 | 1970 | #define DECLARE_PCI_FIXUP_SECTION(sec, name, vendor, device, class, \ |
|---|
| 1865 | 1971 | class_shift, hook) \ |
|---|
| 1866 | 1972 | __DECLARE_PCI_FIXUP_SECTION(sec, name, vendor, device, class, \ |
|---|
| 1867 | | - class_shift, hook) |
|---|
| 1973 | + class_shift, hook, __UNIQUE_ID(hook)) |
|---|
| 1868 | 1974 | #else |
|---|
| 1869 | 1975 | /* Anonymous variables would be nice... */ |
|---|
| 1870 | 1976 | #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, class, \ |
|---|
| .. | .. |
|---|
| 1961 | 2067 | extern u8 pci_dfl_cache_line_size; |
|---|
| 1962 | 2068 | extern u8 pci_cache_line_size; |
|---|
| 1963 | 2069 | |
|---|
| 1964 | | -extern unsigned long pci_hotplug_io_size; |
|---|
| 1965 | | -extern unsigned long pci_hotplug_mem_size; |
|---|
| 1966 | | -extern unsigned long pci_hotplug_bus_size; |
|---|
| 1967 | | - |
|---|
| 1968 | 2070 | /* Architecture-specific versions may override these (weak) */ |
|---|
| 1969 | 2071 | void pcibios_disable_device(struct pci_dev *dev); |
|---|
| 1970 | 2072 | void pcibios_set_master(struct pci_dev *dev); |
|---|
| .. | .. |
|---|
| 1972 | 2074 | enum pcie_reset_state state); |
|---|
| 1973 | 2075 | int pcibios_add_device(struct pci_dev *dev); |
|---|
| 1974 | 2076 | void pcibios_release_device(struct pci_dev *dev); |
|---|
| 2077 | +#ifdef CONFIG_PCI |
|---|
| 1975 | 2078 | void pcibios_penalize_isa_irq(int irq, int active); |
|---|
| 2079 | +#else |
|---|
| 2080 | +static inline void pcibios_penalize_isa_irq(int irq, int active) {} |
|---|
| 2081 | +#endif |
|---|
| 1976 | 2082 | int pcibios_alloc_irq(struct pci_dev *dev); |
|---|
| 1977 | 2083 | void pcibios_free_irq(struct pci_dev *dev); |
|---|
| 1978 | 2084 | resource_size_t pcibios_default_alignment(void); |
|---|
| 1979 | | - |
|---|
| 1980 | | -#ifdef CONFIG_HIBERNATE_CALLBACKS |
|---|
| 1981 | | -extern struct dev_pm_ops pcibios_pm_ops; |
|---|
| 1982 | | -#endif |
|---|
| 1983 | 2085 | |
|---|
| 1984 | 2086 | #if defined(CONFIG_PCI_MMCONFIG) || defined(CONFIG_ACPI_MCFG) |
|---|
| 1985 | 2087 | void __init pci_mmcfg_early_init(void); |
|---|
| .. | .. |
|---|
| 2000 | 2102 | |
|---|
| 2001 | 2103 | int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn); |
|---|
| 2002 | 2104 | void pci_disable_sriov(struct pci_dev *dev); |
|---|
| 2105 | + |
|---|
| 2106 | +int pci_iov_sysfs_link(struct pci_dev *dev, struct pci_dev *virtfn, int id); |
|---|
| 2003 | 2107 | int pci_iov_add_virtfn(struct pci_dev *dev, int id); |
|---|
| 2004 | 2108 | void pci_iov_remove_virtfn(struct pci_dev *dev, int id); |
|---|
| 2005 | 2109 | int pci_num_vf(struct pci_dev *dev); |
|---|
| .. | .. |
|---|
| 2025 | 2129 | } |
|---|
| 2026 | 2130 | static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn) |
|---|
| 2027 | 2131 | { return -ENODEV; } |
|---|
| 2132 | + |
|---|
| 2133 | +static inline int pci_iov_sysfs_link(struct pci_dev *dev, |
|---|
| 2134 | + struct pci_dev *virtfn, int id) |
|---|
| 2135 | +{ |
|---|
| 2136 | + return -ENODEV; |
|---|
| 2137 | +} |
|---|
| 2028 | 2138 | static inline int pci_iov_add_virtfn(struct pci_dev *dev, int id) |
|---|
| 2029 | 2139 | { |
|---|
| 2030 | 2140 | return -ENOSYS; |
|---|
| .. | .. |
|---|
| 2095 | 2205 | return (pcie_caps_reg(dev) & PCI_EXP_FLAGS_TYPE) >> 4; |
|---|
| 2096 | 2206 | } |
|---|
| 2097 | 2207 | |
|---|
| 2208 | +/** |
|---|
| 2209 | + * pcie_find_root_port - Get the PCIe root port device |
|---|
| 2210 | + * @dev: PCI device |
|---|
| 2211 | + * |
|---|
| 2212 | + * Traverse up the parent chain and return the PCIe Root Port PCI Device |
|---|
| 2213 | + * for a given PCI/PCIe Device. |
|---|
| 2214 | + */ |
|---|
| 2098 | 2215 | static inline struct pci_dev *pcie_find_root_port(struct pci_dev *dev) |
|---|
| 2099 | 2216 | { |
|---|
| 2100 | | - while (1) { |
|---|
| 2101 | | - if (!pci_is_pcie(dev)) |
|---|
| 2102 | | - break; |
|---|
| 2103 | | - if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT) |
|---|
| 2217 | + while (dev) { |
|---|
| 2218 | + if (pci_is_pcie(dev) && |
|---|
| 2219 | + pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT) |
|---|
| 2104 | 2220 | return dev; |
|---|
| 2105 | | - if (!dev->bus->self) |
|---|
| 2106 | | - break; |
|---|
| 2107 | | - dev = dev->bus->self; |
|---|
| 2221 | + dev = pci_upstream_bridge(dev); |
|---|
| 2108 | 2222 | } |
|---|
| 2223 | + |
|---|
| 2109 | 2224 | return NULL; |
|---|
| 2110 | 2225 | } |
|---|
| 2111 | 2226 | |
|---|
| .. | .. |
|---|
| 2142 | 2257 | #define PCI_VPD_INFO_FLD_HDR_SIZE 3 |
|---|
| 2143 | 2258 | |
|---|
| 2144 | 2259 | #define PCI_VPD_RO_KEYWORD_PARTNO "PN" |
|---|
| 2260 | +#define PCI_VPD_RO_KEYWORD_SERIALNO "SN" |
|---|
| 2145 | 2261 | #define PCI_VPD_RO_KEYWORD_MFR_ID "MN" |
|---|
| 2146 | 2262 | #define PCI_VPD_RO_KEYWORD_VENDOR0 "V0" |
|---|
| 2147 | 2263 | #define PCI_VPD_RO_KEYWORD_CHKSUM "RV" |
|---|
| .. | .. |
|---|
| 2192 | 2308 | |
|---|
| 2193 | 2309 | /** |
|---|
| 2194 | 2310 | * pci_vpd_info_field_size - Extracts the information field length |
|---|
| 2195 | | - * @lrdt: Pointer to the beginning of an information field header |
|---|
| 2311 | + * @info_field: Pointer to the beginning of an information field header |
|---|
| 2196 | 2312 | * |
|---|
| 2197 | 2313 | * Returns the extracted information field length. |
|---|
| 2198 | 2314 | */ |
|---|
| .. | .. |
|---|
| 2230 | 2346 | #ifdef CONFIG_OF |
|---|
| 2231 | 2347 | struct device_node; |
|---|
| 2232 | 2348 | struct irq_domain; |
|---|
| 2233 | | -void pci_set_of_node(struct pci_dev *dev); |
|---|
| 2234 | | -void pci_release_of_node(struct pci_dev *dev); |
|---|
| 2235 | | -void pci_set_bus_of_node(struct pci_bus *bus); |
|---|
| 2236 | | -void pci_release_bus_of_node(struct pci_bus *bus); |
|---|
| 2237 | 2349 | struct irq_domain *pci_host_bridge_of_msi_domain(struct pci_bus *bus); |
|---|
| 2238 | | -int pci_parse_request_of_pci_ranges(struct device *dev, |
|---|
| 2239 | | - struct list_head *resources, |
|---|
| 2240 | | - struct resource **bus_range); |
|---|
| 2241 | 2350 | |
|---|
| 2242 | 2351 | /* Arch may override this (weak) */ |
|---|
| 2243 | 2352 | struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus); |
|---|
| 2244 | 2353 | |
|---|
| 2245 | 2354 | #else /* CONFIG_OF */ |
|---|
| 2246 | | -static inline void pci_set_of_node(struct pci_dev *dev) { } |
|---|
| 2247 | | -static inline void pci_release_of_node(struct pci_dev *dev) { } |
|---|
| 2248 | | -static inline void pci_set_bus_of_node(struct pci_bus *bus) { } |
|---|
| 2249 | | -static inline void pci_release_bus_of_node(struct pci_bus *bus) { } |
|---|
| 2250 | 2355 | static inline struct irq_domain * |
|---|
| 2251 | 2356 | pci_host_bridge_of_msi_domain(struct pci_bus *bus) { return NULL; } |
|---|
| 2252 | | -static inline int pci_parse_request_of_pci_ranges(struct device *dev, |
|---|
| 2253 | | - struct list_head *resources, |
|---|
| 2254 | | - struct resource **bus_range) |
|---|
| 2255 | | -{ |
|---|
| 2256 | | - return -EINVAL; |
|---|
| 2257 | | -} |
|---|
| 2258 | 2357 | #endif /* CONFIG_OF */ |
|---|
| 2259 | 2358 | |
|---|
| 2260 | 2359 | static inline struct device_node * |
|---|
| .. | .. |
|---|
| 2273 | 2372 | |
|---|
| 2274 | 2373 | void |
|---|
| 2275 | 2374 | pci_msi_register_fwnode_provider(struct fwnode_handle *(*fn)(struct device *)); |
|---|
| 2375 | +bool pci_pr3_present(struct pci_dev *pdev); |
|---|
| 2276 | 2376 | #else |
|---|
| 2277 | 2377 | static inline struct irq_domain * |
|---|
| 2278 | 2378 | pci_host_bridge_acpi_msi_domain(struct pci_bus *bus) { return NULL; } |
|---|
| 2379 | +static inline bool pci_pr3_present(struct pci_dev *pdev) { return false; } |
|---|
| 2279 | 2380 | #endif |
|---|
| 2280 | 2381 | |
|---|
| 2281 | 2382 | #ifdef CONFIG_EEH |
|---|
| .. | .. |
|---|
| 2285 | 2386 | } |
|---|
| 2286 | 2387 | #endif |
|---|
| 2287 | 2388 | |
|---|
| 2288 | | -void pci_add_dma_alias(struct pci_dev *dev, u8 devfn); |
|---|
| 2389 | +void pci_add_dma_alias(struct pci_dev *dev, u8 devfn_from, unsigned nr_devfns); |
|---|
| 2289 | 2390 | bool pci_devs_are_dma_aliases(struct pci_dev *dev1, struct pci_dev *dev2); |
|---|
| 2290 | 2391 | int pci_for_each_dma_alias(struct pci_dev *pdev, |
|---|
| 2291 | 2392 | int (*fn)(struct pci_dev *pdev, |
|---|
| .. | .. |
|---|
| 2357 | 2458 | #define pci_info(pdev, fmt, arg...) dev_info(&(pdev)->dev, fmt, ##arg) |
|---|
| 2358 | 2459 | #define pci_dbg(pdev, fmt, arg...) dev_dbg(&(pdev)->dev, fmt, ##arg) |
|---|
| 2359 | 2460 | |
|---|
| 2461 | +#define pci_notice_ratelimited(pdev, fmt, arg...) \ |
|---|
| 2462 | + dev_notice_ratelimited(&(pdev)->dev, fmt, ##arg) |
|---|
| 2463 | + |
|---|
| 2464 | +#define pci_info_ratelimited(pdev, fmt, arg...) \ |
|---|
| 2465 | + dev_info_ratelimited(&(pdev)->dev, fmt, ##arg) |
|---|
| 2466 | + |
|---|
| 2467 | +#define pci_WARN(pdev, condition, fmt, arg...) \ |
|---|
| 2468 | + WARN(condition, "%s %s: " fmt, \ |
|---|
| 2469 | + dev_driver_string(&(pdev)->dev), pci_name(pdev), ##arg) |
|---|
| 2470 | + |
|---|
| 2471 | +#define pci_WARN_ONCE(pdev, condition, fmt, arg...) \ |
|---|
| 2472 | + WARN_ONCE(condition, "%s %s: " fmt, \ |
|---|
| 2473 | + dev_driver_string(&(pdev)->dev), pci_name(pdev), ##arg) |
|---|
| 2474 | + |
|---|
| 2360 | 2475 | #endif /* LINUX_PCI_H */ |
|---|