hc
2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f
kernel/include/linux/pci.h
....@@ -6,12 +6,18 @@
66 * Copyright 1994, Drew Eckhardt
77 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
88 *
9
+ * PCI Express ASPM defines and function prototypes
10
+ * Copyright (c) 2007 Intel Corp.
11
+ * Zhang Yanmin (yanmin.zhang@intel.com)
12
+ * Shaohua Li (shaohua.li@intel.com)
13
+ *
914 * For more information, please consult the following manuals (look at
1015 * http://www.pcisig.com/ for how to get them):
1116 *
1217 * PCI BIOS Specification
1318 * PCI Local Bus Specification
1419 * PCI to PCI Bridge Specification
20
+ * PCI Express Specification
1521 * PCI System Design Guide
1622 */
1723 #ifndef LINUX_PCI_H
....@@ -36,6 +42,13 @@
3642
3743 #include <linux/pci_ids.h>
3844 #include <linux/android_kabi.h>
45
+
46
+#define PCI_STATUS_ERROR_BITS (PCI_STATUS_DETECTED_PARITY | \
47
+ PCI_STATUS_SIG_SYSTEM_ERROR | \
48
+ PCI_STATUS_REC_MASTER_ABORT | \
49
+ PCI_STATUS_REC_TARGET_ABORT | \
50
+ PCI_STATUS_SIG_TARGET_ABORT | \
51
+ PCI_STATUS_PARITY)
3952
4053 /*
4154 * The PCI interface treats multi-function devices as independent
....@@ -77,7 +90,7 @@
7790 enum {
7891 /* #0-5: standard PCI resources */
7992 PCI_STD_RESOURCES,
80
- PCI_STD_RESOURCE_END = 5,
93
+ PCI_STD_RESOURCE_END = PCI_STD_RESOURCES + PCI_STD_NUM_BARS - 1,
8194
8295 /* #6: expansion ROM resource */
8396 PCI_ROM_RESOURCE,
....@@ -88,9 +101,21 @@
88101 PCI_IOV_RESOURCE_END = PCI_IOV_RESOURCES + PCI_SRIOV_NUM_BARS - 1,
89102 #endif
90103
91
- /* Resources assigned to buses behind the bridge */
104
+/* PCI-to-PCI (P2P) bridge windows */
105
+#define PCI_BRIDGE_IO_WINDOW (PCI_BRIDGE_RESOURCES + 0)
106
+#define PCI_BRIDGE_MEM_WINDOW (PCI_BRIDGE_RESOURCES + 1)
107
+#define PCI_BRIDGE_PREF_MEM_WINDOW (PCI_BRIDGE_RESOURCES + 2)
108
+
109
+/* CardBus bridge windows */
110
+#define PCI_CB_BRIDGE_IO_0_WINDOW (PCI_BRIDGE_RESOURCES + 0)
111
+#define PCI_CB_BRIDGE_IO_1_WINDOW (PCI_BRIDGE_RESOURCES + 1)
112
+#define PCI_CB_BRIDGE_MEM_0_WINDOW (PCI_BRIDGE_RESOURCES + 2)
113
+#define PCI_CB_BRIDGE_MEM_1_WINDOW (PCI_BRIDGE_RESOURCES + 3)
114
+
115
+/* Total number of bridge resources for P2P and CardBus */
92116 #define PCI_BRIDGE_RESOURCE_NUM 4
93117
118
+ /* Resources assigned to buses behind the bridge */
94119 PCI_BRIDGE_RESOURCES,
95120 PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES +
96121 PCI_BRIDGE_RESOURCE_NUM - 1,
....@@ -146,19 +171,16 @@
146171 return pci_power_names[1 + (__force int) state];
147172 }
148173
149
-#define PCI_PM_D2_DELAY 200
150
-#define PCI_PM_D3_WAIT 10
151
-#define PCI_PM_D3COLD_WAIT 100
152
-#define PCI_PM_BUS_WAIT 50
153
-
154174 /**
175
+ * typedef pci_channel_state_t
176
+ *
155177 * The pci_channel state describes connectivity between the CPU and
156178 * the PCI device. If some PCI bus between here and the PCI device
157179 * has crashed or locked up, this info is reflected here.
158180 */
159181 typedef unsigned int __bitwise pci_channel_state_t;
160182
161
-enum pci_channel_state {
183
+enum {
162184 /* I/O channel is in normal state */
163185 pci_channel_io_normal = (__force pci_channel_state_t) 1,
164186
....@@ -236,7 +258,7 @@
236258 PCIE_LNK_WIDTH_UNKNOWN = 0xff,
237259 };
238260
239
-/* Based on the PCI Hotplug Spec, but some values are made up by us */
261
+/* See matching string table in pci_speed_string() */
240262 enum pci_bus_speed {
241263 PCI_SPEED_33MHz = 0x00,
242264 PCI_SPEED_66MHz = 0x01,
....@@ -261,6 +283,7 @@
261283 PCIE_SPEED_5_0GT = 0x15,
262284 PCIE_SPEED_8_0GT = 0x16,
263285 PCIE_SPEED_16_0GT = 0x17,
286
+ PCIE_SPEED_32_0GT = 0x18,
264287 PCI_SPEED_UNKNOWN = 0xff,
265288 };
266289
....@@ -271,7 +294,7 @@
271294 u16 cap_nr;
272295 bool cap_extended;
273296 unsigned int size;
274
- u32 data[0];
297
+ u32 data[];
275298 };
276299
277300 struct pci_cap_saved_state {
....@@ -283,7 +306,7 @@
283306 struct pcie_link_state;
284307 struct pci_vpd;
285308 struct pci_sriov;
286
-struct pci_ats;
309
+struct pci_p2pdma;
287310
288311 /* The pci_dev structure describes PCI devices */
289312 struct pci_dev {
....@@ -328,6 +351,7 @@
328351 pci_power_t current_state; /* Current operating state. In ACPI,
329352 this is D0-D3, D0 being fully
330353 functional, and D3 being off. */
354
+ unsigned int imm_ready:1; /* Supports Immediate Readiness */
331355 u8 pm_cap; /* PM capability offset */
332356 unsigned int pme_support:5; /* Bitmask of states from which PME#
333357 can be generated */
....@@ -336,7 +360,6 @@
336360 unsigned int d2_support:1; /* Low power state D2 is supported */
337361 unsigned int no_d1d2:1; /* D1 and D2 are forbidden */
338362 unsigned int no_d3cold:1; /* D3cold is forbidden */
339
- unsigned int no_d3hot:1; /* D3hot is forbidden */
340363 unsigned int bridge_d3:1; /* Allow D3 for bridge */
341364 unsigned int d3cold_allowed:1; /* D3cold is allowed by user */
342365 unsigned int mmio_always_on:1; /* Disallow turning off io/mem
....@@ -346,19 +369,21 @@
346369 D3cold, not set for devices
347370 powered on/off by the
348371 corresponding bridge */
372
+ unsigned int skip_bus_pm:1; /* Internal: Skip bus-level PM */
349373 unsigned int ignore_hotplug:1; /* Ignore hotplug events */
350374 unsigned int hotplug_user_indicators:1; /* SlotCtl indicators
351375 controlled exclusively by
352376 user sysfs */
353377 unsigned int clear_retrain_link:1; /* Need to clear Retrain Link
354378 bit manually */
355
- unsigned int d3_delay; /* D3->D0 transition time in ms */
379
+ unsigned int d3hot_delay; /* D3hot->D0 transition time in ms */
356380 unsigned int d3cold_delay; /* D3cold->D0 transition time in ms */
357381
358382 #ifdef CONFIG_PCIEASPM
359383 struct pcie_link_state *link_state; /* ASPM link state */
360384 unsigned int ltr_path:1; /* Latency Tolerance Reporting
361385 supported from root to here */
386
+ int l1ss; /* L1SS Capability pointer */
362387 #endif
363388 unsigned int eetlp_prefix_path:1; /* End-to-End TLP Prefix */
364389
....@@ -377,11 +402,14 @@
377402 bool match_driver; /* Skip attaching driver */
378403
379404 unsigned int transparent:1; /* Subtractive decode bridge */
405
+ unsigned int io_window:1; /* Bridge has I/O window */
406
+ unsigned int pref_window:1; /* Bridge has pref mem window */
407
+ unsigned int pref_64_window:1; /* Pref mem window is 64-bit */
380408 unsigned int multifunction:1; /* Multi-function device */
381409
382410 unsigned int is_busmaster:1; /* Is busmaster */
383411 unsigned int no_msi:1; /* May not use MSI */
384
- unsigned int no_64bit_msi:1; /* May only use 32-bit MSIs */
412
+ unsigned int no_64bit_msi:1; /* May only use 32-bit MSIs */
385413 unsigned int block_cfg_access:1; /* Config space access blocked */
386414 unsigned int broken_parity_status:1; /* Generates false positive parity */
387415 unsigned int irq_reroute_variant:2; /* Needs IRQ rerouting variant */
....@@ -400,17 +428,34 @@
400428 unsigned int is_hotplug_bridge:1;
401429 unsigned int shpc_managed:1; /* SHPC owned by shpchp */
402430 unsigned int is_thunderbolt:1; /* Thunderbolt controller */
403
- unsigned int __aer_firmware_first_valid:1;
404
- unsigned int __aer_firmware_first:1;
431
+ /*
432
+ * Devices marked being untrusted are the ones that can potentially
433
+ * execute DMA attacks and similar. They are typically connected
434
+ * through external ports such as Thunderbolt but not limited to
435
+ * that. When an IOMMU is enabled they should be getting full
436
+ * mappings to make sure they cannot access arbitrary memory.
437
+ */
438
+ unsigned int untrusted:1;
439
+ /*
440
+ * Info from the platform, e.g., ACPI or device tree, may mark a
441
+ * device as "external-facing". An external-facing device is
442
+ * itself internal but devices downstream from it are external.
443
+ */
444
+ unsigned int external_facing:1;
405445 unsigned int broken_intx_masking:1; /* INTx masking can't be used */
406446 unsigned int io_window_1k:1; /* Intel bridge 1K I/O windows */
407447 unsigned int irq_managed:1;
408
- unsigned int has_secondary_link:1;
409448 unsigned int non_compliant_bars:1; /* Broken BARs; ignore them */
410449 unsigned int is_probed:1; /* Device probing in progress */
450
+ unsigned int link_active_reporting:1;/* Device capable of reporting link active */
451
+ unsigned int no_vf_scan:1; /* Don't scan for VFs after IOV enablement */
452
+ unsigned int no_command_memory:1; /* No PCI_COMMAND_MEMORY */
411453 pci_dev_flags_t dev_flags;
412454 atomic_t enable_cnt; /* pci_enable_device has been called */
413455
456
+#ifdef CONFIG_NO_GKI
457
+ atomic_t sysfs_init_cnt; /* pci_create_sysfs_dev_files has been called */
458
+#endif
414459 u32 saved_config_space[16]; /* Config space saved at suspend time */
415460 struct hlist_head saved_cap_space;
416461 struct bin_attribute *rom_attr; /* Attribute descriptor for sysfs ROM entry */
....@@ -430,6 +475,11 @@
430475 const struct attribute_group **msi_irq_groups;
431476 #endif
432477 struct pci_vpd *vpd;
478
+#ifdef CONFIG_PCIE_DPC
479
+ u16 dpc_cap;
480
+ unsigned int dpc_rp_extensions:1;
481
+ u8 dpc_rp_log_size;
482
+#endif
433483 #ifdef CONFIG_PCI_ATS
434484 union {
435485 struct pci_sriov *sriov; /* PF: SR-IOV info */
....@@ -437,14 +487,20 @@
437487 };
438488 u16 ats_cap; /* ATS Capability offset */
439489 u8 ats_stu; /* ATS Smallest Translation Unit */
440
- atomic_t ats_ref_cnt; /* Number of VFs with ATS enabled */
441490 #endif
442491 #ifdef CONFIG_PCI_PRI
492
+ u16 pri_cap; /* PRI Capability offset */
443493 u32 pri_reqs_alloc; /* Number of PRI requests allocated */
494
+ unsigned int pasid_required:1; /* PRG Response PASID Required */
444495 #endif
445496 #ifdef CONFIG_PCI_PASID
497
+ u16 pasid_cap; /* PASID Capability offset */
446498 u16 pasid_features;
447499 #endif
500
+#ifdef CONFIG_PCI_P2PDMA
501
+ struct pci_p2pdma *p2pdma;
502
+#endif
503
+ u16 acs_cap; /* ACS Capability offset */
448504 phys_addr_t rom; /* Physical address if not from BAR */
449505 size_t romlen; /* Length if not from BAR */
450506 char *driver_override; /* Driver name to force a match */
....@@ -480,9 +536,11 @@
480536 struct device dev;
481537 struct pci_bus *bus; /* Root bus */
482538 struct pci_ops *ops;
539
+ struct pci_ops *child_ops;
483540 void *sysdata;
484541 int busnr;
485542 struct list_head windows; /* resource_entry */
543
+ struct list_head dma_ranges; /* dma ranges resource list */
486544 u8 (*swizzle_irq)(struct pci_dev *, u8 *); /* Platform IRQ swizzler */
487545 int (*map_irq)(const struct pci_dev *, u8, u8);
488546 void (*release_fn)(struct pci_host_bridge *);
....@@ -495,13 +553,21 @@
495553 unsigned int native_shpc_hotplug:1; /* OS may use SHPC hotplug */
496554 unsigned int native_pme:1; /* OS may use PCIe PME */
497555 unsigned int native_ltr:1; /* OS may use PCIe LTR */
556
+ unsigned int native_dpc:1; /* OS may use PCIe DPC */
557
+ unsigned int preserve_config:1; /* Preserve FW resource setup */
558
+ unsigned int size_windows:1; /* Enable root bus sizing */
559
+
498560 /* Resource alignment requirements */
499561 resource_size_t (*align_resource)(struct pci_dev *dev,
500562 const struct resource *res,
501563 resource_size_t start,
502564 resource_size_t size,
503565 resource_size_t align);
504
- unsigned long private[0] ____cacheline_aligned;
566
+
567
+ ANDROID_KABI_RESERVE(1);
568
+ ANDROID_KABI_RESERVE(2);
569
+
570
+ unsigned long private[] ____cacheline_aligned;
505571 };
506572
507573 #define to_pci_host_bridge(n) container_of(n, struct pci_host_bridge, dev)
....@@ -594,6 +660,11 @@
594660
595661 #define to_pci_bus(n) container_of(n, struct pci_bus, dev)
596662
663
+static inline u16 pci_dev_id(struct pci_dev *dev)
664
+{
665
+ return PCI_DEVID(dev->bus->number, dev->devfn);
666
+}
667
+
597668 /*
598669 * Returns true if the PCI bus is root (behind host-PCI bridge),
599670 * false otherwise
....@@ -632,9 +703,6 @@
632703
633704 return dev->bus->self;
634705 }
635
-
636
-struct device *pci_get_host_bridge_device(struct pci_dev *dev);
637
-void pci_put_host_bridge_device(struct device *dev);
638706
639707 #ifdef CONFIG_PCI_MSI
640708 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev)
....@@ -686,6 +754,8 @@
686754 void __iomem *(*map_bus)(struct pci_bus *bus, unsigned int devfn, int where);
687755 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
688756 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
757
+
758
+ ANDROID_KABI_RESERVE(1);
689759 };
690760
691761 /*
....@@ -747,7 +817,7 @@
747817 struct pci_error_handlers {
748818 /* PCI bus error detected on this device */
749819 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
750
- enum pci_channel_state error);
820
+ pci_channel_state_t error);
751821
752822 /* MMIO has been re-enabled, but not DMA */
753823 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
....@@ -761,10 +831,54 @@
761831
762832 /* Device driver may resume normal operations */
763833 void (*resume)(struct pci_dev *dev);
834
+
835
+ ANDROID_KABI_RESERVE(1);
764836 };
765837
766838
767839 struct module;
840
+
841
+/**
842
+ * struct pci_driver - PCI driver structure
843
+ * @node: List of driver structures.
844
+ * @name: Driver name.
845
+ * @id_table: Pointer to table of device IDs the driver is
846
+ * interested in. Most drivers should export this
847
+ * table using MODULE_DEVICE_TABLE(pci,...).
848
+ * @probe: This probing function gets called (during execution
849
+ * of pci_register_driver() for already existing
850
+ * devices or later if a new device gets inserted) for
851
+ * all PCI devices which match the ID table and are not
852
+ * "owned" by the other drivers yet. This function gets
853
+ * passed a "struct pci_dev \*" for each device whose
854
+ * entry in the ID table matches the device. The probe
855
+ * function returns zero when the driver chooses to
856
+ * take "ownership" of the device or an error code
857
+ * (negative number) otherwise.
858
+ * The probe function always gets called from process
859
+ * context, so it can sleep.
860
+ * @remove: The remove() function gets called whenever a device
861
+ * being handled by this driver is removed (either during
862
+ * deregistration of the driver or when it's manually
863
+ * pulled out of a hot-pluggable slot).
864
+ * The remove function always gets called from process
865
+ * context, so it can sleep.
866
+ * @suspend: Put device into low power state.
867
+ * @resume: Wake device from low power state.
868
+ * (Please see Documentation/power/pci.rst for descriptions
869
+ * of PCI Power Management and the related functions.)
870
+ * @shutdown: Hook into reboot_notifier_list (kernel/sys.c).
871
+ * Intended to stop any idling DMA operations.
872
+ * Useful for enabling wake-on-lan (NIC) or changing
873
+ * the power state of a device before reboot.
874
+ * e.g. drivers/net/e100.c.
875
+ * @sriov_configure: Optional driver callback to allow configuration of
876
+ * number of VFs to enable via sysfs "sriov_numvfs" file.
877
+ * @err_handler: See Documentation/PCI/pci-error-recovery.rst
878
+ * @groups: Sysfs attribute groups.
879
+ * @driver: Driver model structure.
880
+ * @dynids: List of dynamically added device IDs.
881
+ */
768882 struct pci_driver {
769883 struct list_head node;
770884 const char *name;
....@@ -772,11 +886,9 @@
772886 int (*probe)(struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
773887 void (*remove)(struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
774888 int (*suspend)(struct pci_dev *dev, pm_message_t state); /* Device suspended */
775
- int (*suspend_late)(struct pci_dev *dev, pm_message_t state);
776
- int (*resume_early)(struct pci_dev *dev);
777
- int (*resume) (struct pci_dev *dev); /* Device woken up */
778
- void (*shutdown) (struct pci_dev *dev);
779
- int (*sriov_configure) (struct pci_dev *dev, int num_vfs); /* On PF */
889
+ int (*resume)(struct pci_dev *dev); /* Device woken up */
890
+ void (*shutdown)(struct pci_dev *dev);
891
+ int (*sriov_configure)(struct pci_dev *dev, int num_vfs); /* On PF */
780892 const struct pci_error_handlers *err_handler;
781893 const struct attribute_group **groups;
782894 struct device_driver driver;
....@@ -870,6 +982,11 @@
870982 PCI_SCAN_ALL_PCIE_DEVS = 0x00000040, /* Scan all, not just dev 0 */
871983 };
872984
985
+#define PCI_IRQ_LEGACY (1 << 0) /* Allow legacy interrupts */
986
+#define PCI_IRQ_MSI (1 << 1) /* Allow MSI interrupts */
987
+#define PCI_IRQ_MSIX (1 << 2) /* Allow MSI-X interrupts */
988
+#define PCI_IRQ_AFFINITY (1 << 3) /* Auto-assign affinity */
989
+
873990 /* These external functions are only available when PCI support is enabled */
874991 #ifdef CONFIG_PCI
875992
....@@ -914,7 +1031,7 @@
9141031 resource_size_t,
9151032 resource_size_t);
9161033
917
-/* Weak but can be overriden by arch */
1034
+/* Weak but can be overridden by arch */
9181035 void pci_fixup_cardbus(struct pci_bus *);
9191036
9201037 /* Generic PCI functions used internally */
....@@ -940,7 +1057,6 @@
9401057 int pci_scan_root_bus_bridge(struct pci_host_bridge *bridge);
9411058 struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
9421059 int busnr);
943
-void pcie_update_link_speed(struct pci_bus *bus, u16 link_status);
9441060 struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr,
9451061 const char *name,
9461062 struct hotplug_slot *hotplug);
....@@ -958,7 +1074,6 @@
9581074 void pci_read_bridge_bases(struct pci_bus *child);
9591075 struct resource *pci_find_parent_resource(const struct pci_dev *dev,
9601076 struct resource *res);
961
-struct pci_dev *pci_find_pcie_root_port(struct pci_dev *dev);
9621077 u8 pci_swizzle_interrupt_pin(const struct pci_dev *dev, u8 pin);
9631078 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
9641079 u8 pci_common_swizzle(struct pci_dev *dev, u8 *pinp);
....@@ -977,13 +1092,6 @@
9771092
9781093 /* Generic PCI functions exported to card drivers */
9791094
980
-enum pci_lost_interrupt_reason {
981
- PCI_LOST_IRQ_NO_INFORMATION = 0,
982
- PCI_LOST_IRQ_DISABLE_MSI,
983
- PCI_LOST_IRQ_DISABLE_MSIX,
984
- PCI_LOST_IRQ_DISABLE_ACPI,
985
-};
986
-enum pci_lost_interrupt_reason pci_lost_interrupt(struct pci_dev *dev);
9871095 int pci_find_capability(struct pci_dev *dev, int cap);
9881096 int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
9891097 int pci_find_ext_capability(struct pci_dev *dev, int cap);
....@@ -991,6 +1099,8 @@
9911099 int pci_find_ht_capability(struct pci_dev *dev, int ht_cap);
9921100 int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap);
9931101 struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
1102
+
1103
+u64 pci_get_dsn(struct pci_dev *dev);
9941104
9951105 struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
9961106 struct pci_dev *from);
....@@ -1149,6 +1259,8 @@
11491259 int pci_select_bars(struct pci_dev *dev, unsigned long flags);
11501260 bool pci_device_is_present(struct pci_dev *pdev);
11511261 void pci_ignore_hotplug(struct pci_dev *dev);
1262
+struct pci_dev *pci_real_dma_dev(struct pci_dev *dev);
1263
+int pci_status_get_and_clear_errors(struct pci_dev *pdev);
11521264
11531265 int __printf(6, 7) pci_request_irq(struct pci_dev *dev, unsigned int nr,
11541266 irq_handler_t handler, irq_handler_t thread_fn, void *dev_id,
....@@ -1175,7 +1287,7 @@
11751287 int pci_add_cap_save_buffer(struct pci_dev *dev, char cap, unsigned int size);
11761288 int pci_add_ext_cap_save_buffer(struct pci_dev *dev,
11771289 u16 cap, unsigned int size);
1178
-int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state);
1290
+int pci_platform_power_transition(struct pci_dev *dev, pci_power_t state);
11791291 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
11801292 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
11811293 bool pci_pme_capable(struct pci_dev *dev, pci_power_t state);
....@@ -1185,18 +1297,11 @@
11851297 int pci_prepare_to_sleep(struct pci_dev *dev);
11861298 int pci_back_from_sleep(struct pci_dev *dev);
11871299 bool pci_dev_run_wake(struct pci_dev *dev);
1188
-bool pci_check_pme_status(struct pci_dev *dev);
1189
-void pci_pme_wakeup_bus(struct pci_bus *bus);
11901300 void pci_d3cold_enable(struct pci_dev *dev);
11911301 void pci_d3cold_disable(struct pci_dev *dev);
11921302 bool pcie_relaxed_ordering_enabled(struct pci_dev *dev);
11931303 void pci_wakeup_bus(struct pci_bus *bus);
11941304 void pci_bus_set_current_state(struct pci_bus *bus, pci_power_t state);
1195
-
1196
-/* PCI Virtual Channel */
1197
-int pci_save_vc_state(struct pci_dev *dev);
1198
-void pci_restore_vc_state(struct pci_dev *dev);
1199
-void pci_allocate_vc_save_buffers(struct pci_dev *dev);
12001305
12011306 /* For use by arch with custom probe code */
12021307 void set_pcie_port_type(struct pci_dev *pdev);
....@@ -1235,15 +1340,12 @@
12351340 int __must_check pci_request_regions_exclusive(struct pci_dev *, const char *);
12361341 void pci_release_regions(struct pci_dev *);
12371342 int __must_check pci_request_region(struct pci_dev *, int, const char *);
1238
-int __must_check pci_request_region_exclusive(struct pci_dev *, int, const char *);
12391343 void pci_release_region(struct pci_dev *, int);
12401344 int pci_request_selected_regions(struct pci_dev *, int, const char *);
12411345 int pci_request_selected_regions_exclusive(struct pci_dev *, int, const char *);
12421346 void pci_release_selected_regions(struct pci_dev *, int);
12431347
12441348 /* drivers/pci/bus.c */
1245
-struct pci_bus *pci_bus_get(struct pci_bus *bus);
1246
-void pci_bus_put(struct pci_bus *bus);
12471349 void pci_add_resource(struct list_head *resources, struct resource *res);
12481350 void pci_add_resource_offset(struct list_head *resources, struct resource *res,
12491351 resource_size_t offset);
....@@ -1353,16 +1455,19 @@
13531455 int pci_set_vga_state(struct pci_dev *pdev, bool decode,
13541456 unsigned int command_bits, u32 flags);
13551457
1356
-#define PCI_IRQ_LEGACY (1 << 0) /* Allow legacy interrupts */
1357
-#define PCI_IRQ_MSI (1 << 1) /* Allow MSI interrupts */
1358
-#define PCI_IRQ_MSIX (1 << 2) /* Allow MSI-X interrupts */
1359
-#define PCI_IRQ_AFFINITY (1 << 3) /* Auto-assign affinity */
1458
+/*
1459
+ * Virtual interrupts allow for more interrupts to be allocated
1460
+ * than the device has interrupts for. These are not programmed
1461
+ * into the device's MSI-X table and must be handled by some
1462
+ * other driver means.
1463
+ */
1464
+#define PCI_IRQ_VIRTUAL (1 << 4)
1465
+
13601466 #define PCI_IRQ_ALL_TYPES \
13611467 (PCI_IRQ_LEGACY | PCI_IRQ_MSI | PCI_IRQ_MSIX)
13621468
13631469 /* kmem_cache style wrapper around pci_alloc_consistent() */
13641470
1365
-#include <linux/pci-dma.h>
13661471 #include <linux/dmapool.h>
13671472
13681473 #define pci_pool dma_pool
....@@ -1399,12 +1504,11 @@
13991504 }
14001505 int pci_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,
14011506 unsigned int max_vecs, unsigned int flags,
1402
- const struct irq_affinity *affd);
1507
+ struct irq_affinity *affd);
14031508
14041509 void pci_free_irq_vectors(struct pci_dev *dev);
14051510 int pci_irq_vector(struct pci_dev *dev, unsigned int nr);
14061511 const struct cpumask *pci_irq_get_affinity(struct pci_dev *pdev, int vec);
1407
-int pci_irq_get_node(struct pci_dev *pdev, int vec);
14081512
14091513 #else
14101514 static inline int pci_msi_vec_count(struct pci_dev *dev) { return -ENOSYS; }
....@@ -1425,7 +1529,7 @@
14251529 static inline int
14261530 pci_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,
14271531 unsigned int max_vecs, unsigned int flags,
1428
- const struct irq_affinity *aff_desc)
1532
+ struct irq_affinity *aff_desc)
14291533 {
14301534 if ((flags & PCI_IRQ_LEGACY) && min_vecs == 1 && dev->irq)
14311535 return 1;
....@@ -1447,20 +1551,7 @@
14471551 {
14481552 return cpu_possible_mask;
14491553 }
1450
-
1451
-static inline int pci_irq_get_node(struct pci_dev *pdev, int vec)
1452
-{
1453
- return first_online_node;
1454
-}
14551554 #endif
1456
-
1457
-static inline int
1458
-pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,
1459
- unsigned int max_vecs, unsigned int flags)
1460
-{
1461
- return pci_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs, flags,
1462
- NULL);
1463
-}
14641555
14651556 /**
14661557 * pci_irqd_intx_xlate() - Translate PCI INTx value to an IRQ domain hwirq
....@@ -1502,10 +1593,28 @@
15021593 #define pcie_ports_native false
15031594 #endif
15041595
1596
+#define PCIE_LINK_STATE_L0S BIT(0)
1597
+#define PCIE_LINK_STATE_L1 BIT(1)
1598
+#define PCIE_LINK_STATE_CLKPM BIT(2)
1599
+#define PCIE_LINK_STATE_L1_1 BIT(3)
1600
+#define PCIE_LINK_STATE_L1_2 BIT(4)
1601
+#define PCIE_LINK_STATE_L1_1_PCIPM BIT(5)
1602
+#define PCIE_LINK_STATE_L1_2_PCIPM BIT(6)
1603
+
15051604 #ifdef CONFIG_PCIEASPM
1605
+int pci_disable_link_state(struct pci_dev *pdev, int state);
1606
+int pci_disable_link_state_locked(struct pci_dev *pdev, int state);
1607
+void pcie_no_aspm(void);
15061608 bool pcie_aspm_support_enabled(void);
1609
+bool pcie_aspm_enabled(struct pci_dev *pdev);
15071610 #else
1611
+static inline int pci_disable_link_state(struct pci_dev *pdev, int state)
1612
+{ return 0; }
1613
+static inline int pci_disable_link_state_locked(struct pci_dev *pdev, int state)
1614
+{ return 0; }
1615
+static inline void pcie_no_aspm(void) { }
15081616 static inline bool pcie_aspm_support_enabled(void) { return false; }
1617
+static inline bool pcie_aspm_enabled(struct pci_dev *pdev) { return false; }
15091618 #endif
15101619
15111620 #ifdef CONFIG_PCIEAER
....@@ -1514,28 +1623,7 @@
15141623 static inline bool pci_aer_available(void) { return false; }
15151624 #endif
15161625
1517
-#ifdef CONFIG_PCIE_ECRC
1518
-void pcie_set_ecrc_checking(struct pci_dev *dev);
1519
-void pcie_ecrc_get_policy(char *str);
1520
-#else
1521
-static inline void pcie_set_ecrc_checking(struct pci_dev *dev) { }
1522
-static inline void pcie_ecrc_get_policy(char *str) { }
1523
-#endif
1524
-
15251626 bool pci_ats_disabled(void);
1526
-
1527
-#ifdef CONFIG_PCI_ATS
1528
-/* Address Translation Service */
1529
-void pci_ats_init(struct pci_dev *dev);
1530
-int pci_enable_ats(struct pci_dev *dev, int ps);
1531
-void pci_disable_ats(struct pci_dev *dev);
1532
-int pci_ats_queue_depth(struct pci_dev *dev);
1533
-#else
1534
-static inline void pci_ats_init(struct pci_dev *d) { }
1535
-static inline int pci_enable_ats(struct pci_dev *d, int ps) { return -ENODEV; }
1536
-static inline void pci_disable_ats(struct pci_dev *d) { }
1537
-static inline int pci_ats_queue_depth(struct pci_dev *d) { return -ENODEV; }
1538
-#endif
15391627
15401628 #ifdef CONFIG_PCIE_PTM
15411629 int pci_enable_ptm(struct pci_dev *dev, u8 *granularity);
....@@ -1658,6 +1746,7 @@
16581746 static inline void pci_set_master(struct pci_dev *dev) { }
16591747 static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; }
16601748 static inline void pci_disable_device(struct pci_dev *dev) { }
1749
+static inline int pcim_enable_device(struct pci_dev *pdev) { return -EIO; }
16611750 static inline int pci_assign_resource(struct pci_dev *dev, int i)
16621751 { return -EBUSY; }
16631752 static inline int __must_check __pci_register_driver(struct pci_driver *drv,
....@@ -1673,6 +1762,9 @@
16731762 int cap)
16741763 { return 0; }
16751764 static inline int pci_find_ext_capability(struct pci_dev *dev, int cap)
1765
+{ return 0; }
1766
+
1767
+static inline u64 pci_get_dsn(struct pci_dev *dev)
16761768 { return 0; }
16771769
16781770 /* Power management related routines */
....@@ -1698,11 +1790,6 @@
16981790
16991791 static inline unsigned long pci_address_to_pio(phys_addr_t addr) { return -1; }
17001792
1701
-static inline void pci_block_cfg_access(struct pci_dev *dev) { }
1702
-static inline int pci_block_cfg_access_in_atomic(struct pci_dev *dev)
1703
-{ return 0; }
1704
-static inline void pci_unblock_cfg_access(struct pci_dev *dev) { }
1705
-
17061793 static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from)
17071794 { return NULL; }
17081795 static inline struct pci_dev *pci_get_slot(struct pci_bus *bus,
....@@ -1726,13 +1813,39 @@
17261813 unsigned long *out_hwirq,
17271814 unsigned int *out_type)
17281815 { return -EINVAL; }
1816
+
1817
+static inline const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
1818
+ struct pci_dev *dev)
1819
+{ return NULL; }
1820
+static inline bool pci_ats_disabled(void) { return true; }
1821
+
1822
+static inline int pci_irq_vector(struct pci_dev *dev, unsigned int nr)
1823
+{
1824
+ return -EINVAL;
1825
+}
1826
+
1827
+static inline int
1828
+pci_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,
1829
+ unsigned int max_vecs, unsigned int flags,
1830
+ struct irq_affinity *aff_desc)
1831
+{
1832
+ return -ENOSPC;
1833
+}
17291834 #endif /* CONFIG_PCI */
1835
+
1836
+static inline int
1837
+pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,
1838
+ unsigned int max_vecs, unsigned int flags)
1839
+{
1840
+ return pci_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs, flags,
1841
+ NULL);
1842
+}
17301843
17311844 /* Include architecture-dependent settings and functions */
17321845
17331846 #include <asm/pci.h>
17341847
1735
-/* These two functions provide almost identical functionality. Depennding
1848
+/* These two functions provide almost identical functionality. Depending
17361849 * on the architecture, one will be implemented as a wrapper around the
17371850 * other (in drivers/pci/mmap.c).
17381851 *
....@@ -1801,25 +1914,9 @@
18011914 return dev_name(&pdev->dev);
18021915 }
18031916
1804
-
1805
-/*
1806
- * Some archs don't want to expose struct resource to userland as-is
1807
- * in sysfs and /proc
1808
- */
1809
-#ifdef HAVE_ARCH_PCI_RESOURCE_TO_USER
18101917 void pci_resource_to_user(const struct pci_dev *dev, int bar,
18111918 const struct resource *rsrc,
18121919 resource_size_t *start, resource_size_t *end);
1813
-#else
1814
-static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
1815
- const struct resource *rsrc, resource_size_t *start,
1816
- resource_size_t *end)
1817
-{
1818
- *start = rsrc->start;
1819
- *end = rsrc->end;
1820
-}
1821
-#endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
1822
-
18231920
18241921 /*
18251922 * The world is not perfect and supplies us with broken PCI devices.
....@@ -1852,19 +1949,28 @@
18521949 };
18531950
18541951 #ifdef CONFIG_HAVE_ARCH_PREL32_RELOCATIONS
1855
-#define __DECLARE_PCI_FIXUP_SECTION(sec, name, vendor, device, class, \
1856
- class_shift, hook) \
1857
- __ADDRESSABLE(hook) \
1952
+#define ___DECLARE_PCI_FIXUP_SECTION(sec, name, vendor, device, class, \
1953
+ class_shift, hook, stub) \
1954
+ void __cficanonical stub(struct pci_dev *dev); \
1955
+ void __cficanonical stub(struct pci_dev *dev) \
1956
+ { \
1957
+ hook(dev); \
1958
+ } \
18581959 asm(".section " #sec ", \"a\" \n" \
18591960 ".balign 16 \n" \
18601961 ".short " #vendor ", " #device " \n" \
18611962 ".long " #class ", " #class_shift " \n" \
1862
- ".long " #hook " - . \n" \
1963
+ ".long " #stub " - . \n" \
18631964 ".previous \n");
1965
+
1966
+#define __DECLARE_PCI_FIXUP_SECTION(sec, name, vendor, device, class, \
1967
+ class_shift, hook, stub) \
1968
+ ___DECLARE_PCI_FIXUP_SECTION(sec, name, vendor, device, class, \
1969
+ class_shift, hook, stub)
18641970 #define DECLARE_PCI_FIXUP_SECTION(sec, name, vendor, device, class, \
18651971 class_shift, hook) \
18661972 __DECLARE_PCI_FIXUP_SECTION(sec, name, vendor, device, class, \
1867
- class_shift, hook)
1973
+ class_shift, hook, __UNIQUE_ID(hook))
18681974 #else
18691975 /* Anonymous variables would be nice... */
18701976 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, class, \
....@@ -1961,10 +2067,6 @@
19612067 extern u8 pci_dfl_cache_line_size;
19622068 extern u8 pci_cache_line_size;
19632069
1964
-extern unsigned long pci_hotplug_io_size;
1965
-extern unsigned long pci_hotplug_mem_size;
1966
-extern unsigned long pci_hotplug_bus_size;
1967
-
19682070 /* Architecture-specific versions may override these (weak) */
19692071 void pcibios_disable_device(struct pci_dev *dev);
19702072 void pcibios_set_master(struct pci_dev *dev);
....@@ -1972,14 +2074,14 @@
19722074 enum pcie_reset_state state);
19732075 int pcibios_add_device(struct pci_dev *dev);
19742076 void pcibios_release_device(struct pci_dev *dev);
2077
+#ifdef CONFIG_PCI
19752078 void pcibios_penalize_isa_irq(int irq, int active);
2079
+#else
2080
+static inline void pcibios_penalize_isa_irq(int irq, int active) {}
2081
+#endif
19762082 int pcibios_alloc_irq(struct pci_dev *dev);
19772083 void pcibios_free_irq(struct pci_dev *dev);
19782084 resource_size_t pcibios_default_alignment(void);
1979
-
1980
-#ifdef CONFIG_HIBERNATE_CALLBACKS
1981
-extern struct dev_pm_ops pcibios_pm_ops;
1982
-#endif
19832085
19842086 #if defined(CONFIG_PCI_MMCONFIG) || defined(CONFIG_ACPI_MCFG)
19852087 void __init pci_mmcfg_early_init(void);
....@@ -2000,6 +2102,8 @@
20002102
20012103 int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn);
20022104 void pci_disable_sriov(struct pci_dev *dev);
2105
+
2106
+int pci_iov_sysfs_link(struct pci_dev *dev, struct pci_dev *virtfn, int id);
20032107 int pci_iov_add_virtfn(struct pci_dev *dev, int id);
20042108 void pci_iov_remove_virtfn(struct pci_dev *dev, int id);
20052109 int pci_num_vf(struct pci_dev *dev);
....@@ -2025,6 +2129,12 @@
20252129 }
20262130 static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
20272131 { return -ENODEV; }
2132
+
2133
+static inline int pci_iov_sysfs_link(struct pci_dev *dev,
2134
+ struct pci_dev *virtfn, int id)
2135
+{
2136
+ return -ENODEV;
2137
+}
20282138 static inline int pci_iov_add_virtfn(struct pci_dev *dev, int id)
20292139 {
20302140 return -ENOSYS;
....@@ -2095,17 +2205,22 @@
20952205 return (pcie_caps_reg(dev) & PCI_EXP_FLAGS_TYPE) >> 4;
20962206 }
20972207
2208
+/**
2209
+ * pcie_find_root_port - Get the PCIe root port device
2210
+ * @dev: PCI device
2211
+ *
2212
+ * Traverse up the parent chain and return the PCIe Root Port PCI Device
2213
+ * for a given PCI/PCIe Device.
2214
+ */
20982215 static inline struct pci_dev *pcie_find_root_port(struct pci_dev *dev)
20992216 {
2100
- while (1) {
2101
- if (!pci_is_pcie(dev))
2102
- break;
2103
- if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT)
2217
+ while (dev) {
2218
+ if (pci_is_pcie(dev) &&
2219
+ pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT)
21042220 return dev;
2105
- if (!dev->bus->self)
2106
- break;
2107
- dev = dev->bus->self;
2221
+ dev = pci_upstream_bridge(dev);
21082222 }
2223
+
21092224 return NULL;
21102225 }
21112226
....@@ -2142,6 +2257,7 @@
21422257 #define PCI_VPD_INFO_FLD_HDR_SIZE 3
21432258
21442259 #define PCI_VPD_RO_KEYWORD_PARTNO "PN"
2260
+#define PCI_VPD_RO_KEYWORD_SERIALNO "SN"
21452261 #define PCI_VPD_RO_KEYWORD_MFR_ID "MN"
21462262 #define PCI_VPD_RO_KEYWORD_VENDOR0 "V0"
21472263 #define PCI_VPD_RO_KEYWORD_CHKSUM "RV"
....@@ -2192,7 +2308,7 @@
21922308
21932309 /**
21942310 * pci_vpd_info_field_size - Extracts the information field length
2195
- * @lrdt: Pointer to the beginning of an information field header
2311
+ * @info_field: Pointer to the beginning of an information field header
21962312 *
21972313 * Returns the extracted information field length.
21982314 */
....@@ -2230,31 +2346,14 @@
22302346 #ifdef CONFIG_OF
22312347 struct device_node;
22322348 struct irq_domain;
2233
-void pci_set_of_node(struct pci_dev *dev);
2234
-void pci_release_of_node(struct pci_dev *dev);
2235
-void pci_set_bus_of_node(struct pci_bus *bus);
2236
-void pci_release_bus_of_node(struct pci_bus *bus);
22372349 struct irq_domain *pci_host_bridge_of_msi_domain(struct pci_bus *bus);
2238
-int pci_parse_request_of_pci_ranges(struct device *dev,
2239
- struct list_head *resources,
2240
- struct resource **bus_range);
22412350
22422351 /* Arch may override this (weak) */
22432352 struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus);
22442353
22452354 #else /* CONFIG_OF */
2246
-static inline void pci_set_of_node(struct pci_dev *dev) { }
2247
-static inline void pci_release_of_node(struct pci_dev *dev) { }
2248
-static inline void pci_set_bus_of_node(struct pci_bus *bus) { }
2249
-static inline void pci_release_bus_of_node(struct pci_bus *bus) { }
22502355 static inline struct irq_domain *
22512356 pci_host_bridge_of_msi_domain(struct pci_bus *bus) { return NULL; }
2252
-static inline int pci_parse_request_of_pci_ranges(struct device *dev,
2253
- struct list_head *resources,
2254
- struct resource **bus_range)
2255
-{
2256
- return -EINVAL;
2257
-}
22582357 #endif /* CONFIG_OF */
22592358
22602359 static inline struct device_node *
....@@ -2273,9 +2372,11 @@
22732372
22742373 void
22752374 pci_msi_register_fwnode_provider(struct fwnode_handle *(*fn)(struct device *));
2375
+bool pci_pr3_present(struct pci_dev *pdev);
22762376 #else
22772377 static inline struct irq_domain *
22782378 pci_host_bridge_acpi_msi_domain(struct pci_bus *bus) { return NULL; }
2379
+static inline bool pci_pr3_present(struct pci_dev *pdev) { return false; }
22792380 #endif
22802381
22812382 #ifdef CONFIG_EEH
....@@ -2285,7 +2386,7 @@
22852386 }
22862387 #endif
22872388
2288
-void pci_add_dma_alias(struct pci_dev *dev, u8 devfn);
2389
+void pci_add_dma_alias(struct pci_dev *dev, u8 devfn_from, unsigned nr_devfns);
22892390 bool pci_devs_are_dma_aliases(struct pci_dev *dev1, struct pci_dev *dev2);
22902391 int pci_for_each_dma_alias(struct pci_dev *pdev,
22912392 int (*fn)(struct pci_dev *pdev,
....@@ -2357,4 +2458,18 @@
23572458 #define pci_info(pdev, fmt, arg...) dev_info(&(pdev)->dev, fmt, ##arg)
23582459 #define pci_dbg(pdev, fmt, arg...) dev_dbg(&(pdev)->dev, fmt, ##arg)
23592460
2461
+#define pci_notice_ratelimited(pdev, fmt, arg...) \
2462
+ dev_notice_ratelimited(&(pdev)->dev, fmt, ##arg)
2463
+
2464
+#define pci_info_ratelimited(pdev, fmt, arg...) \
2465
+ dev_info_ratelimited(&(pdev)->dev, fmt, ##arg)
2466
+
2467
+#define pci_WARN(pdev, condition, fmt, arg...) \
2468
+ WARN(condition, "%s %s: " fmt, \
2469
+ dev_driver_string(&(pdev)->dev), pci_name(pdev), ##arg)
2470
+
2471
+#define pci_WARN_ONCE(pdev, condition, fmt, arg...) \
2472
+ WARN_ONCE(condition, "%s %s: " fmt, \
2473
+ dev_driver_string(&(pdev)->dev), pci_name(pdev), ##arg)
2474
+
23602475 #endif /* LINUX_PCI_H */