kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/drivers/usb/host/xhci-rcar.c
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@@ -6,6 +6,7 @@
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  */
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 #include <linux/firmware.h>
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+#include <linux/iopoll.h>
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 #include <linux/module.h>
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 #include <linux/platform_device.h>
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 #include <linux/of.h>
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@@ -107,15 +108,6 @@
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 		of_device_is_compatible(node, "renesas,rcar-gen2-xhci");
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 }
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-static int xhci_rcar_is_gen3(struct device *dev)
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-{
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-	struct device_node *node = dev->of_node;
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-
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-	return of_device_is_compatible(node, "renesas,xhci-r8a7795") ||
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-		of_device_is_compatible(node, "renesas,xhci-r8a7796") ||
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-		of_device_is_compatible(node, "renesas,rcar-gen3-xhci");
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-}
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-
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 void xhci_rcar_start(struct usb_hcd *hcd)
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 {
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 	u32 temp;
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@@ -136,8 +128,7 @@
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 	void __iomem *regs = hcd->regs;
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 	struct xhci_plat_priv *priv = hcd_to_xhci_priv(hcd);
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 	const struct firmware *fw;
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-	int retval, index, j, time;
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-	int timeout = 10000;
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+	int retval, index, j;
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 	u32 data, val, temp;
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 	u32 quirks = 0;
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 	const struct soc_device_attribute *attr;
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@@ -182,32 +173,19 @@
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 		temp |= RCAR_USB3_DL_CTRL_FW_SET_DATA0;
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 		writel(temp, regs + RCAR_USB3_DL_CTRL);
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-		for (time = 0; time < timeout; time++) {
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-			val = readl(regs + RCAR_USB3_DL_CTRL);
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-			if ((val & RCAR_USB3_DL_CTRL_FW_SET_DATA0) == 0)
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-				break;
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-			udelay(1);
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-		}
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-		if (time == timeout) {
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-			retval = -ETIMEDOUT;
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+		retval = readl_poll_timeout_atomic(regs + RCAR_USB3_DL_CTRL,
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+				val, !(val & RCAR_USB3_DL_CTRL_FW_SET_DATA0),
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+				1, 10000);
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+		if (retval < 0)
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 			break;
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-		}
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 	}
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 	temp = readl(regs + RCAR_USB3_DL_CTRL);
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 	temp &= ~RCAR_USB3_DL_CTRL_ENABLE;
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 	writel(temp, regs + RCAR_USB3_DL_CTRL);
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-	for (time = 0; time < timeout; time++) {
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-		val = readl(regs + RCAR_USB3_DL_CTRL);
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-		if (val & RCAR_USB3_DL_CTRL_FW_SUCCESS) {
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-			retval = 0;
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-			break;
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-		}
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-		udelay(1);
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-	}
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-	if (time == timeout)
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-		retval = -ETIMEDOUT;
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+	retval = readl_poll_timeout_atomic((regs + RCAR_USB3_DL_CTRL),
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+			val, val & RCAR_USB3_DL_CTRL_FW_SUCCESS, 1, 10000);
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189
 
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 	release_firmware(fw);
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191
 
..
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@@ -216,49 +194,24 @@
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194
 
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 static bool xhci_rcar_wait_for_pll_active(struct usb_hcd *hcd)
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 {
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-	int timeout = 1000;
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+	int retval;
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 	u32 val, mask = RCAR_USB3_AXH_STA_PLL_ACTIVE_MASK;
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-	while (timeout > 0) {
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-		val = readl(hcd->regs + RCAR_USB3_AXH_STA);
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-		if ((val & mask) == mask)
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-			return true;
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-		udelay(1);
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-		timeout--;
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-	}
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-
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-	return false;
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+	retval = readl_poll_timeout_atomic(hcd->regs + RCAR_USB3_AXH_STA,
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+			val, (val & mask) == mask, 1, 1000);
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+	return !retval;
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 }
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 /* This function needs to initialize a "phy" of usb before */
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 int xhci_rcar_init_quirk(struct usb_hcd *hcd)
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 {
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-	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
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-
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 	/* If hcd->regs is NULL, we don't just call the following function */
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 	if (!hcd->regs)
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 		return 0;
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-	/*
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-	 * On R-Car Gen2 and Gen3, the AC64 bit (bit 0) of HCCPARAMS1 is set
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-	 * to 1. However, these SoCs don't support 64-bit address memory
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-	 * pointers. So, this driver clears the AC64 bit of xhci->hcc_params
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-	 * to call dma_set_coherent_mask(dev, DMA_BIT_MASK(32)) in
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-	 * xhci_gen_setup().
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-	 *
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-	 * And, since the firmware/internal CPU control the USBSTS.STS_HALT
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-	 * and the process speed is down when the roothub port enters U3,
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-	 * long delay for the handshake of STS_HALT is neeed in xhci_suspend().
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-	 */
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-	if (xhci_rcar_is_gen2(hcd->self.controller) ||
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-			xhci_rcar_is_gen3(hcd->self.controller)) {
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-		xhci->quirks |= XHCI_NO_64BIT_SUPPORT | XHCI_SLOW_SUSPEND;
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-	}
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-
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 	if (!xhci_rcar_wait_for_pll_active(hcd))
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 		return -ETIMEDOUT;
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-	xhci->quirks |= XHCI_TRUST_TX_LENGTH;
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 	return xhci_rcar_download_firmware(hcd);
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 }
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