| .. | .. |
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| 117 | 117 | Currently supports Xilinx and Qualcomm DWC USB3 IP. |
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| 118 | 118 | Say 'Y' or 'M' if you have one such device. |
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| 119 | 119 | |
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| 120 | +config USB_DWC3_ROCKCHIP_INNO |
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| 121 | + bool "Rockchip Platforms with INNO PHY" |
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| 122 | + depends on OF && COMMON_CLK && (ARCH_ROCKCHIP || COMPILE_TEST) |
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| 123 | + default USB_DWC3 && PHY_ROCKCHIP_INNO_USB3 && NO_GKI |
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| 124 | + help |
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| 125 | + Support of USB2/3 functionality in Rockchip platforms |
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| 126 | + with INNO USB 3.0 PHY IP inside. |
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| 127 | + say 'Y' or 'M' if you have one such device. |
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| 128 | + |
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| 120 | 129 | config USB_DWC3_ST |
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| 121 | 130 | tristate "STMicroelectronics Platforms" |
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| 122 | 131 | depends on (ARCH_STI || COMPILE_TEST) && OF |
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