kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/drivers/thermal/rockchip_thermal.c
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@@ -646,40 +646,40 @@
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 static const struct tsadc_table rk3528_code_table[] = {
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 	{0, MIN_TEMP},
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 	{1386, MIN_TEMP},
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-	{1419, -40000},
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-	{1427, -35000},
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-	{1435, -30000},
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-	{1443, -25000},
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-	{1452, -20000},
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-	{1460, -15000},
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-	{1468, -10000},
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-	{1477, -5000},
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-	{1486, 0},
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-	{1494, 5000},
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-	{1502, 10000},
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-	{1510, 15000},
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-	{1519, 20000},
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-	{1527, 25000},
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-	{1535, 30000},
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-	{1544, 35000},
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-	{1552, 40000},
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-	{1561, 45000},
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-	{1569, 50000},
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-	{1578, 55000},
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-	{1586, 60000},
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-	{1594, 65000},
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-	{1603, 70000},
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-	{1612, 75000},
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-	{1620, 80000},
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+	{1410, -40000},
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+	{1419, -35000},
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+	{1428, -30000},
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+	{1436, -25000},
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+	{1445, -20000},
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+	{1454, -15000},
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+	{1463, -10000},
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+	{1471, -5000},
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+	{1480, 0},
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+	{1489, 5000},
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+	{1498, 10000},
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+	{1506, 15000},
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+	{1515, 20000},
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+	{1524, 25000},
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+	{1533, 30000},
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+	{1541, 35000},
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+	{1550, 40000},
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+	{1558, 45000},
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+	{1567, 50000},
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+	{1575, 55000},
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+	{1584, 60000},
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+	{1593, 65000},
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+	{1602, 70000},
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+	{1610, 75000},
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+	{1619, 80000},
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 	{1628, 85000},
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 	{1637, 90000},
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 	{1646, 95000},
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 	{1654, 100000},
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-	{1662, 105000},
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-	{1671, 110000},
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-	{1679, 115000},
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-	{1688, 120000},
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-	{1696, 125000},
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+	{1663, 105000},
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+	{1672, 110000},
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+	{1680, 115000},
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+	{1689, 120000},
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+	{1697, 125000},
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 	{1790, MAX_TEMP},
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 	{TSADCV5_DATA_MASK, MAX_TEMP},
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 };
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@@ -1482,6 +1482,15 @@
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 	return code - base_code;
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 }
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+static int rk_tsadcv3_get_trim_code(const struct chip_tsadc_table *table,
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+				    int code, int trim_base, int trim_base_frac)
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+{
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+	int temp = trim_base * 1000 + trim_base_frac * 100;
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+	u32 base_code = rk_tsadcv2_temp_to_code(table, temp);
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+
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+	return (TSADCV3_Q_MAX_VAL - code) - base_code;
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+}
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+
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 static int rk_tsadcv1_set_clk_rate(struct platform_device *pdev)
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 {
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 	struct clk *clk;
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@@ -1860,6 +1869,8 @@
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 	.set_alarm_temp = rk_tsadcv3_alarm_temp,
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 	.set_tshut_temp = rk_tsadcv3_tshut_temp,
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 	.set_tshut_mode = rk_tsadcv4_tshut_mode,
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+	.get_trim_code = rk_tsadcv3_get_trim_code,
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+	.trim_slope = 574,
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 	.table = {
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 		.id = rk3528_code_table,
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@@ -1884,6 +1895,8 @@
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 	.set_alarm_temp = rk_tsadcv3_alarm_temp,
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 	.set_tshut_temp = rk_tsadcv3_tshut_temp,
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 	.set_tshut_mode = rk_tsadcv4_tshut_mode,
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+	.get_trim_code = rk_tsadcv3_get_trim_code,
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+	.trim_slope = 588,
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 	.table = {
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 		.id = rk3562_code_table,
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@@ -2167,12 +2180,9 @@
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 	 * The tsadc won't to handle the error in here
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 	 * since some SoCs didn't need this property.
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 	 */
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-	if (rockchip_get_efuse_value(np, "trim_base", &trim_base)) {
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-		dev_info(dev, "Missing trim_base property\n");
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-		return 0;
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-	}
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+	rockchip_get_efuse_value(np, "trim_base", &trim_base);
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 	if (!trim_base)
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-		return 0;
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+		trim_base = 30;
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 	rockchip_get_efuse_value(np, "trim_base_frac", &trim_base_frac);
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 	/*
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 	 * If the tsadc node contains trim_h and trim_l property,