.. | .. |
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221 | 221 | bool slave_aborted; |
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222 | 222 | bool cs_inactive; /* spi slave tansmition stop when cs inactive */ |
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223 | 223 | bool cs_high_supported; /* native CS supports active-high polarity */ |
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| 224 | + struct gpio_desc *ready; /* spi slave transmission ready */ |
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224 | 225 | |
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225 | 226 | struct spi_transfer *xfer; /* Store xfer temporarily */ |
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226 | 227 | phys_addr_t base_addr_phy; |
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.. | .. |
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859 | 860 | ret = rockchip_spi_prepare_irq(rs, ctlr, xfer); |
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860 | 861 | } |
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861 | 862 | |
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| 863 | + if (rs->ready) { |
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| 864 | + gpiod_set_value(rs->ready, 0); |
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| 865 | + udelay(1); |
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| 866 | + gpiod_set_value(rs->ready, 1); |
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| 867 | + } |
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| 868 | + |
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862 | 869 | if (ret > 0) |
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863 | 870 | ret = rockchip_spi_transfer_wait(ctlr, xfer); |
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| 871 | + |
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| 872 | + if (rs->ready) |
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| 873 | + gpiod_set_value(rs->ready, 0); |
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864 | 874 | |
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865 | 875 | return ret; |
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866 | 876 | } |
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.. | .. |
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969 | 979 | bool slave_mode; |
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970 | 980 | struct pinctrl *pinctrl = NULL; |
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971 | 981 | const struct rockchip_spi_quirks *quirks_cfg; |
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| 982 | + u32 val; |
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972 | 983 | |
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973 | 984 | slave_mode = of_property_read_bool(np, "spi-slave"); |
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974 | 985 | |
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.. | .. |
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982 | 993 | if (!ctlr) |
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983 | 994 | return -ENOMEM; |
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984 | 995 | |
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| 996 | + ctlr->rt = device_property_read_bool(&pdev->dev, "rockchip,rt"); |
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985 | 997 | platform_set_drvdata(pdev, ctlr); |
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986 | 998 | |
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987 | 999 | rs = spi_controller_get_devdata(ctlr); |
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.. | .. |
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1095 | 1107 | if (quirks_cfg) |
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1096 | 1108 | rs->max_baud_div_in_cpha = quirks_cfg->max_baud_div_in_cpha; |
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1097 | 1109 | |
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| 1110 | + if (!device_property_read_u32(&pdev->dev, "rockchip,autosuspend-delay-ms", &val)) { |
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| 1111 | + if (val > 0) { |
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| 1112 | + pm_runtime_set_autosuspend_delay(&pdev->dev, val); |
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| 1113 | + pm_runtime_use_autosuspend(&pdev->dev); |
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| 1114 | + } |
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| 1115 | + } |
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| 1116 | + |
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1098 | 1117 | pm_runtime_set_active(&pdev->dev); |
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1099 | 1118 | pm_runtime_enable(&pdev->dev); |
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1100 | 1119 | |
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.. | .. |
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1175 | 1194 | rs->cs_inactive = false; |
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1176 | 1195 | break; |
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1177 | 1196 | } |
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| 1197 | + if (device_property_read_bool(&pdev->dev, "rockchip,cs-inactive-disable")) |
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| 1198 | + rs->cs_inactive = false; |
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1178 | 1199 | |
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1179 | 1200 | pinctrl = devm_pinctrl_get(&pdev->dev); |
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1180 | 1201 | if (!IS_ERR(pinctrl)) { |
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.. | .. |
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1183 | 1204 | dev_warn(&pdev->dev, "no high_speed pinctrl state\n"); |
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1184 | 1205 | rs->high_speed_state = NULL; |
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1185 | 1206 | } |
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| 1207 | + } |
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| 1208 | + |
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| 1209 | + rs->ready = devm_gpiod_get_optional(&pdev->dev, "ready", GPIOD_OUT_HIGH); |
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| 1210 | + if (IS_ERR(rs->ready)) { |
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| 1211 | + ret = dev_err_probe(&pdev->dev, PTR_ERR(rs->ready), |
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| 1212 | + "invalid ready-gpios property in node\n"); |
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| 1213 | + goto err_free_dma_rx; |
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1186 | 1214 | } |
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1187 | 1215 | |
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1188 | 1216 | ret = devm_spi_register_controller(&pdev->dev, ctlr); |
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.. | .. |
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1207 | 1235 | dev_info(&pdev->dev, "register misc device %s\n", misc_name); |
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1208 | 1236 | } |
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1209 | 1237 | |
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1210 | | - dev_info(rs->dev, "probed, poll=%d, rsd=%d\n", rs->poll, rs->rsd); |
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| 1238 | + dev_info(rs->dev, "probed, poll=%d, rsd=%d, cs-inactive=%d, ready=%d\n", |
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| 1239 | + rs->poll, rs->rsd, rs->cs_inactive, rs->ready ? 1 : 0); |
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1211 | 1240 | |
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1212 | 1241 | return 0; |
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1213 | 1242 | |
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