forked from ~ljy/RK356X_SDK_RELEASE
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hc
2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f 
 kernel/drivers/rtc/rtc-sun6i.c
....@@ -1,3 +1,4 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
23  * An RTC driver for Allwinner A31/A23
34  *
....@@ -8,16 +9,6 @@
89  * An RTC driver for Allwinner A10/A20
910  *
1011  * Copyright (c) 2013, Carlo Caione <carlo.caione@gmail.com>
11
- *
12
- * This program is free software; you can redistribute it and/or modify
13
- * it under the terms of the GNU General Public License as published by
14
- * the Free Software Foundation; either version 2 of the License, or
15
- * (at your option) any later version.
16
- *
17
- * This program is distributed in the hope that it will be useful, but WITHOUT
18
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
19
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
20
- * more details.
2112  */
2213 
2314 #include <linux/clk.h>
....@@ -41,9 +32,11 @@
4132 /* Control register */
4233 #define SUN6I_LOSC_CTRL				0x0000
4334 #define SUN6I_LOSC_CTRL_KEY			(0x16aa << 16)
35
+#define SUN6I_LOSC_CTRL_AUTO_SWT_BYPASS		BIT(15)
4436 #define SUN6I_LOSC_CTRL_ALM_DHMS_ACC		BIT(9)
4537 #define SUN6I_LOSC_CTRL_RTC_HMS_ACC		BIT(8)
4638 #define SUN6I_LOSC_CTRL_RTC_YMD_ACC		BIT(7)
39
+#define SUN6I_LOSC_CTRL_EXT_LOSC_EN		BIT(4)
4740 #define SUN6I_LOSC_CTRL_EXT_OSC			BIT(0)
4841 #define SUN6I_LOSC_CTRL_ACC_MASK		GENMASK(9, 7)
4942 
....@@ -115,15 +108,37 @@
115108  * driver, even though it is somewhat limited.
116109  */
117110 #define SUN6I_YEAR_MIN				1970
118
-#define SUN6I_YEAR_MAX				2033
119111 #define SUN6I_YEAR_OFF				(SUN6I_YEAR_MIN - 1900)
112
+
113
+/*
114
+ * There are other differences between models, including:
115
+ *
116
+ *   - number of GPIO pins that can be configured to hold a certain level
117
+ *   - crypto-key related registers (H5, H6)
118
+ *   - boot process related (super standby, secondary processor entry address)
119
+ *     registers (R40, H6)
120
+ *   - SYS power domain controls (R40)
121
+ *   - DCXO controls (H6)
122
+ *   - RC oscillator calibration (H6)
123
+ *
124
+ * These functions are not covered by this driver.
125
+ */
126
+struct sun6i_rtc_clk_data {
127
+	unsigned long rc_osc_rate;
128
+	unsigned int fixed_prescaler : 16;
129
+	unsigned int has_prescaler : 1;
130
+	unsigned int has_out_clk : 1;
131
+	unsigned int export_iosc : 1;
132
+	unsigned int has_losc_en : 1;
133
+	unsigned int has_auto_swt : 1;
134
+};
120135 
121136 struct sun6i_rtc_dev {
122137 	struct rtc_device *rtc;
123
-	struct device *dev;
138
+	const struct sun6i_rtc_clk_data *data;
124139 	void __iomem *base;
125140 	int irq;
126
-	unsigned long alarm;
141
+	time64_t alarm;
127142 
128143 	struct clk_hw hw;
129144 	struct clk_hw *int_osc;
....@@ -139,14 +154,19 @@
139154 					       unsigned long parent_rate)
140155 {
141156 	struct sun6i_rtc_dev *rtc = container_of(hw, struct sun6i_rtc_dev, hw);
142
-	u32 val;
157
+	u32 val = 0;
143158 
144159 	val = readl(rtc->base + SUN6I_LOSC_CTRL);
145160 	if (val & SUN6I_LOSC_CTRL_EXT_OSC)
146161 		return parent_rate;
147162 
148
-	val = readl(rtc->base + SUN6I_LOSC_CLK_PRESCAL);
149
-	val &= GENMASK(4, 0);
163
+	if (rtc->data->fixed_prescaler)
164
+		parent_rate /= rtc->data->fixed_prescaler;
165
+
166
+	if (rtc->data->has_prescaler) {
167
+		val = readl(rtc->base + SUN6I_LOSC_CLK_PRESCAL);
168
+		val &= GENMASK(4, 0);
169
+	}
150170 
151171 	return parent_rate / (val + 1);
152172 }
....@@ -172,6 +192,10 @@
172192 	val &= ~SUN6I_LOSC_CTRL_EXT_OSC;
173193 	val |= SUN6I_LOSC_CTRL_KEY;
174194 	val |= index ? SUN6I_LOSC_CTRL_EXT_OSC : 0;
195
+	if (rtc->data->has_losc_en) {
196
+		val &= ~SUN6I_LOSC_CTRL_EXT_LOSC_EN;
197
+		val |= index ? SUN6I_LOSC_CTRL_EXT_LOSC_EN : 0;
198
+	}
175199 	writel(val, rtc->base + SUN6I_LOSC_CTRL);
176200 	spin_unlock_irqrestore(&rtc->lock, flags);
177201 
....@@ -185,22 +209,26 @@
185209 	.set_parent	= sun6i_rtc_osc_set_parent,
186210 };
187211 
188
-static void __init sun6i_rtc_clk_init(struct device_node *node)
212
+static void __init sun6i_rtc_clk_init(struct device_node *node,
213
+				      const struct sun6i_rtc_clk_data *data)
189214 {
190215 	struct clk_hw_onecell_data *clk_data;
191216 	struct sun6i_rtc_dev *rtc;
192217 	struct clk_init_data init = {
193218 		.ops		= &sun6i_rtc_osc_ops,
219
+		.name		= "losc",
194220 	};
221
+	const char *iosc_name = "rtc-int-osc";
195222 	const char *clkout_name = "osc32k-out";
196223 	const char *parents[2];
224
+	u32 reg;
197225 
198226 	rtc = kzalloc(sizeof(*rtc), GFP_KERNEL);
199227 	if (!rtc)
200228 		return;
201229 
202
-	clk_data = kzalloc(sizeof(*clk_data) + (sizeof(*clk_data->hws) * 2),
203
-			   GFP_KERNEL);
230
+	rtc->data = data;
231
+	clk_data = kzalloc(struct_size(clk_data, hws, 3), GFP_KERNEL);
204232 	if (!clk_data) {
205233 		kfree(rtc);
206234 		return;
....@@ -214,21 +242,33 @@
214242 		goto err;
215243 	}
216244 
217
-	/* Switch to the external, more precise, oscillator */
218
-	writel(SUN6I_LOSC_CTRL_KEY | SUN6I_LOSC_CTRL_EXT_OSC,
219
-	       rtc->base + SUN6I_LOSC_CTRL);
245
+	reg = SUN6I_LOSC_CTRL_KEY;
246
+	if (rtc->data->has_auto_swt) {
247
+		/* Bypass auto-switch to int osc, on ext losc failure */
248
+		reg |= SUN6I_LOSC_CTRL_AUTO_SWT_BYPASS;
249
+		writel(reg, rtc->base + SUN6I_LOSC_CTRL);
250
+	}
251
+
252
+	/* Switch to the external, more precise, oscillator, if present */
253
+	if (of_get_property(node, "clocks", NULL)) {
254
+		reg |= SUN6I_LOSC_CTRL_EXT_OSC;
255
+		if (rtc->data->has_losc_en)
256
+			reg |= SUN6I_LOSC_CTRL_EXT_LOSC_EN;
257
+	}
258
+	writel(reg, rtc->base + SUN6I_LOSC_CTRL);
220259 
221260 	/* Yes, I know, this is ugly. */
222261 	sun6i_rtc = rtc;
223262 
224
-	/* Deal with old DTs */
225
-	if (!of_get_property(node, "clocks", NULL))
226
-		goto err;
263
+	/* Only read IOSC name from device tree if it is exported */
264
+	if (rtc->data->export_iosc)
265
+		of_property_read_string_index(node, "clock-output-names", 2,
266
+					      &iosc_name);
227267 
228268 	rtc->int_osc = clk_hw_register_fixed_rate_with_accuracy(NULL,
229
-								"rtc-int-osc",
269
+								iosc_name,
230270 								NULL, 0,
231
-								667000,
271
+								rtc->data->rc_osc_rate,
232272 								300000000);
233273 	if (IS_ERR(rtc->int_osc)) {
234274 		pr_crit("Couldn't register the internal oscillator\n");
....@@ -236,11 +276,13 @@
236276 	}
237277 
238278 	parents[0] = clk_hw_get_name(rtc->int_osc);
279
+	/* If there is no external oscillator, this will be NULL and ... */
239280 	parents[1] = of_clk_get_parent_name(node, 0);
240281 
241282 	rtc->hw.init = &init;
242283 
243284 	init.parent_names = parents;
285
+	/* ... number of clock parents will be 1. */
244286 	init.num_parents = of_clk_get_parent_count(node) + 1;
245287 	of_property_read_string_index(node, "clock-output-names", 0,
246288 				      &init.name);
....@@ -253,7 +295,7 @@
253295 
254296 	of_property_read_string_index(node, "clock-output-names", 1,
255297 				      &clkout_name);
256
-	rtc->ext_losc = clk_register_gate(NULL, clkout_name, rtc->hw.init->name,
298
+	rtc->ext_losc = clk_register_gate(NULL, clkout_name, init.name,
257299 					  0, rtc->base + SUN6I_LOSC_OUT_GATING,
258300 					  SUN6I_LOSC_OUT_GATING_EN_OFFSET, 0,
259301 					  &rtc->lock);
....@@ -265,6 +307,10 @@
265307 	clk_data->num = 2;
266308 	clk_data->hws[0] = &rtc->hw;
267309 	clk_data->hws[1] = __clk_get_hw(rtc->ext_losc);
310
+	if (rtc->data->export_iosc) {
311
+		clk_data->hws[2] = rtc->int_osc;
312
+		clk_data->num = 3;
313
+	}
268314 	of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
269315 	return;
270316 
....@@ -273,8 +319,94 @@
273319 err:
274320 	kfree(clk_data);
275321 }
276
-CLK_OF_DECLARE_DRIVER(sun6i_rtc_clk, "allwinner,sun6i-a31-rtc",
277
-		      sun6i_rtc_clk_init);
322
+
323
+static const struct sun6i_rtc_clk_data sun6i_a31_rtc_data = {
324
+	.rc_osc_rate = 667000, /* datasheet says 600 ~ 700 KHz */
325
+	.has_prescaler = 1,
326
+};
327
+
328
+static void __init sun6i_a31_rtc_clk_init(struct device_node *node)
329
+{
330
+	sun6i_rtc_clk_init(node, &sun6i_a31_rtc_data);
331
+}
332
+CLK_OF_DECLARE_DRIVER(sun6i_a31_rtc_clk, "allwinner,sun6i-a31-rtc",
333
+		      sun6i_a31_rtc_clk_init);
334
+
335
+static const struct sun6i_rtc_clk_data sun8i_a23_rtc_data = {
336
+	.rc_osc_rate = 667000, /* datasheet says 600 ~ 700 KHz */
337
+	.has_prescaler = 1,
338
+	.has_out_clk = 1,
339
+};
340
+
341
+static void __init sun8i_a23_rtc_clk_init(struct device_node *node)
342
+{
343
+	sun6i_rtc_clk_init(node, &sun8i_a23_rtc_data);
344
+}
345
+CLK_OF_DECLARE_DRIVER(sun8i_a23_rtc_clk, "allwinner,sun8i-a23-rtc",
346
+		      sun8i_a23_rtc_clk_init);
347
+
348
+static const struct sun6i_rtc_clk_data sun8i_h3_rtc_data = {
349
+	.rc_osc_rate = 16000000,
350
+	.fixed_prescaler = 32,
351
+	.has_prescaler = 1,
352
+	.has_out_clk = 1,
353
+	.export_iosc = 1,
354
+};
355
+
356
+static void __init sun8i_h3_rtc_clk_init(struct device_node *node)
357
+{
358
+	sun6i_rtc_clk_init(node, &sun8i_h3_rtc_data);
359
+}
360
+CLK_OF_DECLARE_DRIVER(sun8i_h3_rtc_clk, "allwinner,sun8i-h3-rtc",
361
+		      sun8i_h3_rtc_clk_init);
362
+/* As far as we are concerned, clocks for H5 are the same as H3 */
363
+CLK_OF_DECLARE_DRIVER(sun50i_h5_rtc_clk, "allwinner,sun50i-h5-rtc",
364
+		      sun8i_h3_rtc_clk_init);
365
+
366
+static const struct sun6i_rtc_clk_data sun50i_h6_rtc_data = {
367
+	.rc_osc_rate = 16000000,
368
+	.fixed_prescaler = 32,
369
+	.has_prescaler = 1,
370
+	.has_out_clk = 1,
371
+	.export_iosc = 1,
372
+	.has_losc_en = 1,
373
+	.has_auto_swt = 1,
374
+};
375
+
376
+static void __init sun50i_h6_rtc_clk_init(struct device_node *node)
377
+{
378
+	sun6i_rtc_clk_init(node, &sun50i_h6_rtc_data);
379
+}
380
+CLK_OF_DECLARE_DRIVER(sun50i_h6_rtc_clk, "allwinner,sun50i-h6-rtc",
381
+		      sun50i_h6_rtc_clk_init);
382
+
383
+/*
384
+ * The R40 user manual is self-conflicting on whether the prescaler is
385
+ * fixed or configurable. The clock diagram shows it as fixed, but there
386
+ * is also a configurable divider in the RTC block.
387
+ */
388
+static const struct sun6i_rtc_clk_data sun8i_r40_rtc_data = {
389
+	.rc_osc_rate = 16000000,
390
+	.fixed_prescaler = 512,
391
+};
392
+static void __init sun8i_r40_rtc_clk_init(struct device_node *node)
393
+{
394
+	sun6i_rtc_clk_init(node, &sun8i_r40_rtc_data);
395
+}
396
+CLK_OF_DECLARE_DRIVER(sun8i_r40_rtc_clk, "allwinner,sun8i-r40-rtc",
397
+		      sun8i_r40_rtc_clk_init);
398
+
399
+static const struct sun6i_rtc_clk_data sun8i_v3_rtc_data = {
400
+	.rc_osc_rate = 32000,
401
+	.has_out_clk = 1,
402
+};
403
+
404
+static void __init sun8i_v3_rtc_clk_init(struct device_node *node)
405
+{
406
+	sun6i_rtc_clk_init(node, &sun8i_v3_rtc_data);
407
+}
408
+CLK_OF_DECLARE_DRIVER(sun8i_v3_rtc_clk, "allwinner,sun8i-v3-rtc",
409
+		      sun8i_v3_rtc_clk_init);
278410 
279411 static irqreturn_t sun6i_rtc_alarmirq(int irq, void *id)
280412 {
....@@ -368,7 +500,7 @@
368500 
369501 	wkalrm->enabled = !!(alrm_en & SUN6I_ALRM_EN_CNT_EN);
370502 	wkalrm->pending = !!(alrm_st & SUN6I_ALRM_EN_CNT_EN);
371
-	rtc_time_to_tm(chip->alarm, &wkalrm->time);
503
+	rtc_time64_to_tm(chip->alarm, &wkalrm->time);
372504 
373505 	return 0;
374506 }
....@@ -378,10 +510,8 @@
378510 	struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
379511 	struct rtc_time *alrm_tm = &wkalrm->time;
380512 	struct rtc_time tm_now;
381
-	unsigned long time_now = 0;
382
-	unsigned long time_set = 0;
383
-	unsigned long time_gap = 0;
384
-	int ret = 0;
513
+	time64_t time_now, time_set;
514
+	int ret;
385515 
386516 	ret = sun6i_rtc_gettime(dev, &tm_now);
387517 	if (ret < 0) {
....@@ -389,16 +519,14 @@
389519 		return -EINVAL;
390520 	}
391521 
392
-	rtc_tm_to_time(alrm_tm, &time_set);
393
-	rtc_tm_to_time(&tm_now, &time_now);
522
+	time_set = rtc_tm_to_time64(alrm_tm);
523
+	time_now = rtc_tm_to_time64(&tm_now);
394524 	if (time_set <= time_now) {
395525 		dev_err(dev, "Date to set in the past\n");
396526 		return -EINVAL;
397527 	}
398528 
399
-	time_gap = time_set - time_now;
400
-
401
-	if (time_gap > U32_MAX) {
529
+	if ((time_set - time_now) > U32_MAX) {
402530 		dev_err(dev, "Date too far in the future\n");
403531 		return -EINVAL;
404532 	}
....@@ -407,7 +535,7 @@
407535 	writel(0, chip->base + SUN6I_ALRM_COUNTER);
408536 	usleep_range(100, 300);
409537 
410
-	writel(time_gap, chip->base + SUN6I_ALRM_COUNTER);
538
+	writel(time_set - time_now, chip->base + SUN6I_ALRM_COUNTER);
411539 	chip->alarm = time_set;
412540 
413541 	sun6i_rtc_setaie(wkalrm->enabled, chip);
....@@ -438,14 +566,6 @@
438566 	struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
439567 	u32 date = 0;
440568 	u32 time = 0;
441
-	int year;
442
-
443
-	year = rtc_tm->tm_year + 1900;
444
-	if (year < SUN6I_YEAR_MIN || year > SUN6I_YEAR_MAX) {
445
-		dev_err(dev, "rtc only supports year in range %d - %d\n",
446
-			SUN6I_YEAR_MIN, SUN6I_YEAR_MAX);
447
-		return -EINVAL;
448
-	}
449569 
450570 	rtc_tm->tm_year -= SUN6I_YEAR_OFF;
451571 	rtc_tm->tm_mon += 1;
....@@ -454,7 +574,7 @@
454574 		SUN6I_DATE_SET_MON_VALUE(rtc_tm->tm_mon)  |
455575 		SUN6I_DATE_SET_YEAR_VALUE(rtc_tm->tm_year);
456576 
457
-	if (is_leap_year(year))
577
+	if (is_leap_year(rtc_tm->tm_year + SUN6I_YEAR_MIN))
458578 		date |= SUN6I_LEAP_SET_VALUE(1);
459579 
460580 	time = SUN6I_TIME_SET_SEC_VALUE(rtc_tm->tm_sec)  |
....@@ -517,6 +637,33 @@
517637 	.alarm_irq_enable	= sun6i_rtc_alarm_irq_enable
518638 };
519639 
640
+#ifdef CONFIG_PM_SLEEP
641
+/* Enable IRQ wake on suspend, to wake up from RTC. */
642
+static int sun6i_rtc_suspend(struct device *dev)
643
+{
644
+	struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
645
+
646
+	if (device_may_wakeup(dev))
647
+		enable_irq_wake(chip->irq);
648
+
649
+	return 0;
650
+}
651
+
652
+/* Disable IRQ wake on resume. */
653
+static int sun6i_rtc_resume(struct device *dev)
654
+{
655
+	struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
656
+
657
+	if (device_may_wakeup(dev))
658
+		disable_irq_wake(chip->irq);
659
+
660
+	return 0;
661
+}
662
+#endif
663
+
664
+static SIMPLE_DEV_PM_OPS(sun6i_rtc_pm_ops,
665
+	sun6i_rtc_suspend, sun6i_rtc_resume);
666
+
520667 static int sun6i_rtc_probe(struct platform_device *pdev)
521668 {
522669 	struct sun6i_rtc_dev *chip = sun6i_rtc;
....@@ -526,13 +673,10 @@
526673 		return -ENODEV;
527674 
528675 	platform_set_drvdata(pdev, chip);
529
-	chip->dev = &pdev->dev;
530676 
531677 	chip->irq = platform_get_irq(pdev, 0);
532
-	if (chip->irq < 0) {
533
-		dev_err(&pdev->dev, "No IRQ resource\n");
678
+	if (chip->irq < 0)
534679 		return chip->irq;
535
-	}
536680 
537681 	ret = devm_request_irq(&pdev->dev, chip->irq, sun6i_rtc_alarmirq,
538682 			       0, dev_name(&pdev->dev), chip);
....@@ -569,20 +713,38 @@
569713 
570714 	clk_prepare_enable(chip->losc);
571715 
572
-	chip->rtc = devm_rtc_device_register(&pdev->dev, "rtc-sun6i",
573
-					     &sun6i_rtc_ops, THIS_MODULE);
574
-	if (IS_ERR(chip->rtc)) {
575
-		dev_err(&pdev->dev, "unable to register device\n");
716
+	device_init_wakeup(&pdev->dev, 1);
717
+
718
+	chip->rtc = devm_rtc_allocate_device(&pdev->dev);
719
+	if (IS_ERR(chip->rtc))
576720 		return PTR_ERR(chip->rtc);
577
-	}
721
+
722
+	chip->rtc->ops = &sun6i_rtc_ops;
723
+	chip->rtc->range_max = 2019686399LL; /* 2033-12-31 23:59:59 */
724
+
725
+	ret = rtc_register_device(chip->rtc);
726
+	if (ret)
727
+		return ret;
578728 
579729 	dev_info(&pdev->dev, "RTC enabled\n");
580730 
581731 	return 0;
582732 }
583733 
734
+/*
735
+ * As far as RTC functionality goes, all models are the same. The
736
+ * datasheets claim that different models have different number of
737
+ * registers available for non-volatile storage, but experiments show
738
+ * that all SoCs have 16 registers available for this purpose.
739
+ */
584740 static const struct of_device_id sun6i_rtc_dt_ids[] = {
585741 	{ .compatible = "allwinner,sun6i-a31-rtc" },
742
+	{ .compatible = "allwinner,sun8i-a23-rtc" },
743
+	{ .compatible = "allwinner,sun8i-h3-rtc" },
744
+	{ .compatible = "allwinner,sun8i-r40-rtc" },
745
+	{ .compatible = "allwinner,sun8i-v3-rtc" },
746
+	{ .compatible = "allwinner,sun50i-h5-rtc" },
747
+	{ .compatible = "allwinner,sun50i-h6-rtc" },
586748 	{ /* sentinel */ },
587749 };
588750 MODULE_DEVICE_TABLE(of, sun6i_rtc_dt_ids);
....@@ -592,6 +754,7 @@
592754 	.driver		= {
593755 		.name		= "sun6i-rtc",
594756 		.of_match_table = sun6i_rtc_dt_ids,
757
+		.pm = &sun6i_rtc_pm_ops,
595758 	},
596759 };
597760 builtin_platform_driver(sun6i_rtc_driver);