kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/drivers/rkflash/sfc_nand.c
..
..
@@ -52,6 +52,8 @@
52
52
 	{ 0xC2, 0x96, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x8, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
53
53
 	/* MX35UF2GE4AD */
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54
 	{ 0xC2, 0xA6, 0x00, 4, 0x40, 1, 2048, 0x0C, 19, 0x8, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
55
+	/* MX35UF4GE4AD */
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+	{ 0xC2, 0xB7, 0x00, 8, 0x40, 1, 2048, 0x0C, 20, 0x8, 1, { 0x04, 0x08, 0x14, 0x18 }, &sfc_nand_get_ecc_status0 },
55
57
 
56
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 	/* GD5F1GQ4UAYIG */
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 	{ 0xC8, 0xF1, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x8, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
..
..
@@ -129,7 +131,7 @@
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131
 	/* F35SQA512M */
130
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 	{ 0xCD, 0x70, 0x00, 4, 0x40, 1, 512, 0x4C, 17, 0x1, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
131
133
 	/* F35UQA512M */
132
-	{ 0xCD, 0x70, 0x00, 4, 0x40, 1, 512, 0x4C, 17, 0x1, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
134
+	{ 0xCD, 0x60, 0x00, 4, 0x40, 1, 512, 0x4C, 17, 0x1, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
133
135
 
134
136
 	/* DS35Q1GA-IB */
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137
 	{ 0xE5, 0x71, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
..
..
@@ -204,6 +206,8 @@
204
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 	{ 0xEA, 0xC1, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x4, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
205
207
 	/* TX25G01 */
206
208
 	{ 0xA1, 0xF1, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status8 },
209
+	/* S35ML02G3 */
210
+	{ 0x01, 0x25, 0x00, 4, 0x40, 2, 1024, 0x4C, 19, 0x4, 1, { 0x04, 0x08, 0x0C, 0x10 }, &sfc_nand_get_ecc_status9 },
207
211
 	/* S35ML04G3 */
208
212
 	{ 0x01, 0x35, 0x00, 4, 0x40, 2, 2048, 0x4C, 20, 0x4, 1, { 0x04, 0x08, 0x0C, 0x10 }, &sfc_nand_get_ecc_status9 },
209
213
 };
..
..
@@ -307,7 +311,7 @@
307
311
 	return ret;
308
312
 }
309
313
 
310
-static int sfc_nand_wait_busy(u8 *data, int timeout)
314
+static int sfc_nand_wait_busy_sleep(u8 *data, int timeout, int sleep_us)
311
315
 {
312
316
 	int ret;
313
317
 	int i;
..
..
@@ -315,7 +319,9 @@
315
319
 
316
320
 	*data = 0;
317
321
 
318
-	for (i = 0; i < timeout; i++) {
322
+	for (i = 0; i < timeout; i += sleep_us) {
323
+		usleep_range(sleep_us, sleep_us + 50);
324
+
319
325
 		ret = sfc_nand_read_feature(0xC0, &status);
320
326
 
321
327
 		if (ret != SFC_OK)
..
..
@@ -325,8 +331,6 @@
325
331
 
326
332
 		if (!(status & (1 << 0)))
327
333
 			return SFC_OK;
328
-
329
-		sfc_delay(1);
330
334
 	}
331
335
 
332
336
 	return SFC_NAND_WAIT_TIME_OUT;
..
..
@@ -790,7 +794,7 @@
790
794
 	if (ret != SFC_OK)
791
795
 		return ret;
792
796
 
793
-	ret = sfc_nand_wait_busy(&status, 1000 * 1000);
797
+	ret = sfc_nand_wait_busy_sleep(&status, 1000 * 1000, 1000);
794
798
 
795
799
 	if (status & (1 << 2))
796
800
 		return SFC_NAND_PROG_ERASE_ERROR;
..
..
@@ -847,6 +851,7 @@
847
851
 	op.sfctrl.d32 = 0;
848
852
 	op.sfctrl.b.datalines = sfc_nand_dev.prog_lines;
849
853
 	op.sfctrl.b.addrbits = 16;
854
+	op.sfctrl.b.enbledma = 0;
850
855
 	plane = p_nand_info->plane_per_die == 2 ? ((addr >> 6) & 0x1) << 12 : 0;
851
856
 	sfc_request(&op, plane, p_page_buf, page_size);
852
857
 
..
..
@@ -859,7 +864,7 @@
859
864
 	if (p_nand_info->id0 == MID_GIGADEV) {
860
865
 		sfc_nand_read_cache(addr, (u32 *)sfc_nand_dev.recheck_buffer, 0, data_area_size);
861
866
 		if (memcmp(sfc_nand_dev.recheck_buffer, p_page_buf, data_area_size)) {
862
-			rkflash_print_error("%s %x cache bitflip\n", __func__, addr);
867
+			rkflash_print_error("%s cache bitflip1\n", __func__);
863
868
 			msleep(1000);
864
869
 			sfc_request(&op, plane, p_page_buf, page_size);
865
870
 		}
..
..
@@ -876,7 +881,8 @@
876
881
 	if (ret != SFC_OK)
877
882
 		return ret;
878
883
 
879
-	ret = sfc_nand_wait_busy(&status, 1000 * 1000);
884
+	ret = sfc_nand_wait_busy_sleep(&status, 1000 * 1000, 200);
885
+
880
886
 	if (status & (1 << 3))
881
887
 		return SFC_NAND_PROG_ERASE_ERROR;
882
888
 
..
..
@@ -927,7 +933,10 @@
927
933
 	    sfc_get_version() < SFC_VER_3)
928
934
 		sfc_nand_rw_preset();
929
935
 
930
-	sfc_nand_wait_busy(&status, 1000 * 1000);
936
+	sfc_nand_wait_busy_sleep(&status, 1000 * 1000, 50);
937
+	if (sfc_nand_dev.manufacturer == 0x01 && status)
938
+		sfc_nand_wait_busy_sleep(&status, 1000 * 1000, 50);
939
+
931
940
 	ecc_result = p_nand_info->ecc_status();
932
941
 
933
942
 	op.sfcmd.d32 = 0;
..
..
@@ -938,6 +947,7 @@
938
947
 	op.sfctrl.d32 = 0;
939
948
 	op.sfctrl.b.datalines = sfc_nand_dev.read_lines;
940
949
 	op.sfctrl.b.addrbits = 16;
950
+	op.sfctrl.b.enbledma = 0;
941
951
 
942
952
 	plane = p_nand_info->plane_per_die == 2 ? ((row >> 6) & 0x1) << 12 : 0;
943
953
 	ret = sfc_request(&op, plane | column, p_page_buf, len);
..
..
@@ -962,7 +972,9 @@
962
972
 	u32 sec_per_page = p_nand_info->sec_per_page;
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973
 	u32 data_size = sec_per_page * SFC_NAND_SECTOR_SIZE;
964
974
 	struct nand_mega_area *meta = &p_nand_info->meta;
975
+	int retries = 0;
965
976
 
977
+retry:
966
978
 	ret = sfc_nand_read_page_raw(cs, addr, gp_page_buf);
967
979
 	memcpy(p_data, gp_page_buf, data_size);
968
980
 	p_spare[0] = gp_page_buf[(data_size + meta->off0) / 4];
..
..
@@ -984,6 +996,10 @@
984
996
 
985
997
 		if (p_spare)
986
998
 			rkflash_print_hex("spare:", p_spare, 4, 2);
999
+		if (ret == SFC_NAND_ECC_ERROR && retries < 1) {
1000
+			retries++;
1001
+			goto retry;
1002
+		}
987
1003
 	}
988
1004
 
989
1005
 	return ret;