kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
..
..
@@ -483,6 +483,18 @@
483
483
 		val |= 0x01 << 17;
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484
 		writel(val, priv->mmio + 0x200);
485
485
 
486
+		/* Set slow slew rate control for PI */
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+		val = readl(priv->mmio + 0x204);
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+		val &= ~GENMASK(2, 0);
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+		val |= 0x07;
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+		writel(val, priv->mmio + 0x204);
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+
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+		/* Set CDR phase path with 2x gain */
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+		val = readl(priv->mmio + 0x204);
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+		val &= ~GENMASK(5, 5);
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+		val |= 0x01 << 5;
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+		writel(val, priv->mmio + 0x204);
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+
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 		/* Set Rx squelch input filler bandwidth */
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 		val = readl(priv->mmio + 0x20c);
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 		val &= ~GENMASK(2, 0);
..
..
@@ -697,7 +709,7 @@
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 			/* CKDRV output swing adjust to 650mv */
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 			val = readl(priv->mmio + (0xd << 2));
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 			val &= ~(0xf << 1);
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-			val |= 0xb;
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+			val |= (0xb << 1);
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 			writel(val, priv->mmio + (0xd << 2));
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 		}
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 		break;