.. | .. |
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2394 | 2394 | |
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2395 | 2395 | dev->ctrl.cap = lo_hi_readq(dev->bar + NVME_REG_CAP); |
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2396 | 2396 | |
---|
| 2397 | + if (dev->ctrl.quirks & NVME_QUIRK_LIMIT_IOQD32) |
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| 2398 | + io_queue_depth = 32; |
---|
| 2399 | + |
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2397 | 2400 | dev->q_depth = min_t(u32, NVME_CAP_MQES(dev->ctrl.cap) + 1, |
---|
2398 | 2401 | io_queue_depth); |
---|
2399 | 2402 | dev->ctrl.sqsize = dev->q_depth - 1; /* 0's based queue depth */ |
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.. | .. |
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3236 | 3239 | .driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY | |
---|
3237 | 3240 | NVME_QUIRK_DISABLE_WRITE_ZEROES| |
---|
3238 | 3241 | NVME_QUIRK_IGNORE_DEV_SUBNQN, }, |
---|
| 3242 | + { PCI_DEVICE(0x1987, 0x5013), /* Phison E13 */ |
---|
| 3243 | + .driver_data = NVME_QUIRK_LIMIT_IOQD32}, |
---|
3239 | 3244 | { PCI_DEVICE(0x1987, 0x5016), /* Phison E16 */ |
---|
3240 | 3245 | .driver_data = NVME_QUIRK_IGNORE_DEV_SUBNQN | |
---|
3241 | 3246 | NVME_QUIRK_BOGUS_NID, }, |
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