forked from ~ljy/RK356X_SDK_RELEASE
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2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f 
 kernel/drivers/net/wireless/realtek/rtlwifi/rtl8723be/hw.c
....@@ -1,27 +1,5 @@
1
-/******************************************************************************
2
- *
3
- * Copyright(c) 2009-2014  Realtek Corporation.
4
- *
5
- * This program is free software; you can redistribute it and/or modify it
6
- * under the terms of version 2 of the GNU General Public License as
7
- * published by the Free Software Foundation.
8
- *
9
- * This program is distributed in the hope that it will be useful, but WITHOUT
10
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12
- * more details.
13
- *
14
- * The full GNU General Public License is included in this distribution in the
15
- * file called LICENSE.
16
- *
17
- * Contact Information:
18
- * wlanfae <wlanfae@realtek.com>
19
- * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20
- * Hsinchu 300, Taiwan.
21
- *
22
- * Larry Finger <Larry.Finger@lwfinger.net>
23
- *
24
- *****************************************************************************/
1
+// SPDX-License-Identifier: GPL-2.0
2
+/* Copyright(c) 2009-2014  Realtek Corporation.*/
253 
264 #include "../wifi.h"
275 #include "../efuse.h"
....@@ -59,11 +37,10 @@
5937 		struct rtl_tx_desc *entry = &ring->desc[ring->idx];
6038 		struct sk_buff *skb = __skb_dequeue(&ring->queue);
6139 
62
-		pci_unmap_single(rtlpci->pdev,
63
-				 rtlpriv->cfg->ops->get_desc(
64
-				 hw,
65
-				 (u8 *)entry, true, HW_DESC_TXBUFF_ADDR),
66
-				 skb->len, PCI_DMA_TODEVICE);
40
+		dma_unmap_single(&rtlpci->pdev->dev,
41
+				 rtlpriv->cfg->ops->get_desc(hw, (u8 *)entry,
42
+						true, HW_DESC_TXBUFF_ADDR),
43
+				 skb->len, DMA_TO_DEVICE);
6744 		kfree_skb(skb);
6845 		ring->idx = (ring->idx + 1) % ring->entries;
6946 	}
....@@ -168,9 +145,9 @@
168145 			if (content & IMR_CPWM) {
169146 				rtl_write_word(rtlpriv, isr_regaddr, 0x0100);
170147 				rtlhal->fw_ps_state = FW_PS_STATE_RF_ON;
171
-				RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
172
-					 "Receive CPWM INT!!! Set pHalData->FwPSState = %X\n",
173
-					 rtlhal->fw_ps_state);
148
+				rtl_dbg(rtlpriv, COMP_POWER, DBG_LOUD,
149
+					"Receive CPWM INT!!! Set pHalData->FwPSState = %X\n",
150
+					rtlhal->fw_ps_state);
174151 			}
175152 		}
176153 
....@@ -319,12 +296,12 @@
319296 		*((enum rf_pwrstate *)(val)) = ppsc->rfpwr_state;
320297 		break;
321298 	case HW_VAR_FWLPS_RF_ON:{
322
-		enum rf_pwrstate rfState;
299
+		enum rf_pwrstate rfstate;
323300 		u32 val_rcr;
324301 
325302 		rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_RF_STATE,
326
-					      (u8 *)(&rfState));
327
-		if (rfState == ERFOFF) {
303
+					      (u8 *)(&rfstate));
304
+		if (rfstate == ERFOFF) {
328305 			*((bool *)(val)) = true;
329306 		} else {
330307 			val_rcr = rtl_read_dword(rtlpriv, REG_RCR);
....@@ -353,8 +330,8 @@
353330 	case HAL_DEF_WOWLAN:
354331 		break;
355332 	default:
356
-		RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
357
-			 "switch case %#x not processed\n", variable);
333
+		rtl_dbg(rtlpriv, COMP_ERR, DBG_LOUD,
334
+			"switch case %#x not processed\n", variable);
358335 		break;
359336 	}
360337 }
....@@ -458,8 +435,8 @@
458435 	case HW_VAR_SLOT_TIME:{
459436 		u8 e_aci;
460437 
461
-		RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
462
-			 "HW_VAR_SLOT_TIME %x\n", val[0]);
438
+		rtl_dbg(rtlpriv, COMP_MLME, DBG_LOUD,
439
+			"HW_VAR_SLOT_TIME %x\n", val[0]);
463440 
464441 		rtl_write_byte(rtlpriv, REG_SLOT, val[0]);
465442 
....@@ -501,9 +478,9 @@
501478 
502479 			*val = min_spacing_to_set;
503480 
504
-			RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
505
-				 "Set HW_VAR_AMPDU_MIN_SPACE: %#x\n",
506
-				  mac->min_space_cfg);
481
+			rtl_dbg(rtlpriv, COMP_MLME, DBG_LOUD,
482
+				"Set HW_VAR_AMPDU_MIN_SPACE: %#x\n",
483
+				mac->min_space_cfg);
507484 
508485 			rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE,
509486 				       mac->min_space_cfg);
....@@ -516,9 +493,9 @@
516493 		density_to_set = *((u8 *)val);
517494 		mac->min_space_cfg |= (density_to_set << 3);
518495 
519
-		RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
520
-			 "Set HW_VAR_SHORTGI_DENSITY: %#x\n",
521
-			  mac->min_space_cfg);
496
+		rtl_dbg(rtlpriv, COMP_MLME, DBG_LOUD,
497
+			"Set HW_VAR_SHORTGI_DENSITY: %#x\n",
498
+			mac->min_space_cfg);
522499 
523500 		rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE,
524501 			       mac->min_space_cfg);
....@@ -556,9 +533,9 @@
556533 
557534 			}
558535 
559
-			RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
560
-				 "Set HW_VAR_AMPDU_FACTOR: %#x\n",
561
-				  factor_toset);
536
+			rtl_dbg(rtlpriv, COMP_MLME, DBG_LOUD,
537
+				"Set HW_VAR_AMPDU_FACTOR: %#x\n",
538
+				factor_toset);
562539 		}
563540 		}
564541 		break;
....@@ -593,9 +570,9 @@
593570 				acm_ctrl |= ACMHW_VOQEN;
594571 				break;
595572 			default:
596
-				RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
597
-					 "HW_VAR_ACM_CTRL acm set failed: eACI is %d\n",
598
-					 acm);
573
+				rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING,
574
+					"HW_VAR_ACM_CTRL acm set failed: eACI is %d\n",
575
+					acm);
599576 				break;
600577 			}
601578 		} else {
....@@ -610,16 +587,16 @@
610587 				acm_ctrl &= (~ACMHW_VOQEN);
611588 				break;
612589 			default:
613
-				RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
614
-					 "switch case %#x not processed\n",
615
-					 e_aci);
590
+				rtl_dbg(rtlpriv, COMP_ERR, DBG_LOUD,
591
+					"switch case %#x not processed\n",
592
+					e_aci);
616593 				break;
617594 			}
618595 		}
619596 
620
-		RT_TRACE(rtlpriv, COMP_QOS, DBG_TRACE,
621
-			 "SetHwReg8190pci(): [HW_VAR_ACM_CTRL] Write 0x%X\n",
622
-			 acm_ctrl);
597
+		rtl_dbg(rtlpriv, COMP_QOS, DBG_TRACE,
598
+			"SetHwReg8190pci(): [HW_VAR_ACM_CTRL] Write 0x%X\n",
599
+			acm_ctrl);
623600 		rtl_write_byte(rtlpriv, REG_ACMHWCTRL, acm_ctrl);
624601 		}
625602 		break;
....@@ -727,8 +704,8 @@
727704 		}
728705 		break;
729706 	default:
730
-		RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
731
-			 "switch case %#x not processed\n", variable);
707
+		rtl_dbg(rtlpriv, COMP_ERR, DBG_LOUD,
708
+			"switch case %#x not processed\n", variable);
732709 		break;
733710 	}
734711 }
....@@ -764,10 +741,10 @@
764741 	struct rtl_priv *rtlpriv = rtl_priv(hw);
765742 	unsigned short i;
766743 	u8 txpktbuf_bndy;
767
-	u8 maxPage;
744
+	u8 maxpage;
768745 	bool status;
769746 
770
-	maxPage = 255;
747
+	maxpage = 255;
771748 	txpktbuf_bndy = 245;
772749 
773750 	rtl_write_dword(rtlpriv, REG_TRXFF_BNDY,
....@@ -792,13 +769,13 @@
792769 	if (!status)
793770 		return status;
794771 
795
-	for (i = txpktbuf_bndy; i < maxPage; i++) {
772
+	for (i = txpktbuf_bndy; i < maxpage; i++) {
796773 		status = _rtl8723be_llt_write(hw, i, (i + 1));
797774 		if (!status)
798775 			return status;
799776 	}
800777 
801
-	status = _rtl8723be_llt_write(hw, maxPage, txpktbuf_bndy);
778
+	status = _rtl8723be_llt_write(hw, maxpage, txpktbuf_bndy);
802779 	if (!status)
803780 		return status;
804781 
....@@ -843,8 +820,8 @@
843820 	if (!rtl_hal_pwrseqcmdparsing(rtlpriv, PWR_CUT_ALL_MSK,
844821 				      PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,
845822 				      RTL8723_NIC_ENABLE_FLOW)) {
846
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
847
-			 "init MAC Fail as power on failure\n");
823
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
824
+			"init MAC Fail as power on failure\n");
848825 		return false;
849826 	}
850827 
....@@ -881,7 +858,7 @@
881858 	rtl_write_word(rtlpriv, REG_CR, 0x2ff);
882859 
883860 	if (!rtlhal->mac_func_enable) {
884
-		if (_rtl8723be_llt_table_init(hw) == false)
861
+		if (!_rtl8723be_llt_table_init(hw))
885862 			return false;
886863 	}
887864 
....@@ -1143,14 +1120,14 @@
11431120 	struct rtl_priv *rtlpriv = rtl_priv(hw);
11441121 	u8 sec_reg_value;
11451122 
1146
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1147
-		 "PairwiseEncAlgorithm = %d GroupEncAlgorithm = %d\n",
1148
-		  rtlpriv->sec.pairwise_enc_algorithm,
1149
-		  rtlpriv->sec.group_enc_algorithm);
1123
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG,
1124
+		"PairwiseEncAlgorithm = %d GroupEncAlgorithm = %d\n",
1125
+		rtlpriv->sec.pairwise_enc_algorithm,
1126
+		rtlpriv->sec.group_enc_algorithm);
11501127 
11511128 	if (rtlpriv->cfg->mod_params->sw_crypto || rtlpriv->sec.use_sw_sec) {
1152
-		RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
1153
-			 "not open hw encryption\n");
1129
+		rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG,
1130
+			"not open hw encryption\n");
11541131 		return;
11551132 	}
11561133 
....@@ -1165,8 +1142,8 @@
11651142 
11661143 	rtl_write_byte(rtlpriv, REG_CR + 1, 0x02);
11671144 
1168
-	RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
1169
-		 "The SECR-value %x\n", sec_reg_value);
1145
+	rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG,
1146
+		"The SECR-value %x\n", sec_reg_value);
11701147 
11711148 	rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_WPA_CONFIG, &sec_reg_value);
11721149 }
....@@ -1230,8 +1207,8 @@
12301207 	 */
12311208 	tmp = rtl_read_byte(rtlpriv, REG_DBI_CTRL + 3);
12321209 	if ((tmp & BIT(0)) || (tmp & BIT(1))) {
1233
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1234
-			 "CheckPcieDMAHang8723BE(): true!!\n");
1210
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
1211
+			"CheckPcieDMAHang8723BE(): true!!\n");
12351212 		return true;
12361213 	}
12371214 	return false;
....@@ -1244,8 +1221,8 @@
12441221 	bool release_mac_rx_pause;
12451222 	u8 backup_pcie_dma_pause;
12461223 
1247
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1248
-		 "ResetPcieInterfaceDMA8723BE()\n");
1224
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
1225
+		"ResetPcieInterfaceDMA8723BE()\n");
12491226 
12501227 	/* Revise Note: Follow the document "PCIe RX DMA Hang Reset Flow_v03"
12511228 	 * released by SD1 Alan.
....@@ -1397,8 +1374,8 @@
13971374 
13981375 	err = rtl8723_download_fw(hw, true, FW_8723B_POLLING_TIMEOUT_COUNT);
13991376 	if (err) {
1400
-		RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1401
-			 "Failed to download FW. Init HW without FW now..\n");
1377
+		rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING,
1378
+			"Failed to download FW. Init HW without FW now..\n");
14021379 		err = 1;
14031380 		goto exit;
14041381 	}
....@@ -1482,7 +1459,7 @@
14821459 
14831460 	value32 = rtl_read_dword(rtlpriv, REG_SYS_CFG1);
14841461 	if ((value32 & (CHIP_8723B)) != CHIP_8723B)
1485
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "unknown chip version\n");
1462
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "unknown chip version\n");
14861463 	else
14871464 		version = (enum version_8723e)CHIP_8723B;
14881465 
....@@ -1498,9 +1475,9 @@
14981475 	if (((value32 & EXT_VENDOR_ID) >> 18) == 0x01)
14991476 		version = (enum version_8723e)(version | CHIP_VENDOR_SMIC);
15001477 
1501
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1502
-		 "Chip RF Type: %s\n", (rtlphy->rf_type == RF_2T2R) ?
1503
-		  "RF_2T2R" : "RF_1T1R");
1478
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
1479
+		"Chip RF Type: %s\n", (rtlphy->rf_type == RF_2T2R) ?
1480
+		"RF_2T2R" : "RF_1T1R");
15041481 
15051482 	return version;
15061483 }
....@@ -1516,26 +1493,26 @@
15161493 	switch (type) {
15171494 	case NL80211_IFTYPE_UNSPECIFIED:
15181495 		mode = MSR_NOLINK;
1519
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
1520
-			 "Set Network type to NO LINK!\n");
1496
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
1497
+			"Set Network type to NO LINK!\n");
15211498 		break;
15221499 	case NL80211_IFTYPE_ADHOC:
15231500 	case NL80211_IFTYPE_MESH_POINT:
15241501 		mode = MSR_ADHOC;
1525
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
1526
-			 "Set Network type to Ad Hoc!\n");
1502
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
1503
+			"Set Network type to Ad Hoc!\n");
15271504 		break;
15281505 	case NL80211_IFTYPE_STATION:
15291506 		mode = MSR_INFRA;
15301507 		ledaction = LED_CTL_LINK;
1531
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
1532
-			 "Set Network type to STA!\n");
1508
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
1509
+			"Set Network type to STA!\n");
15331510 		break;
15341511 	case NL80211_IFTYPE_AP:
15351512 		mode = MSR_AP;
15361513 		ledaction = LED_CTL_LINK;
1537
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
1538
-			 "Set Network type to AP!\n");
1514
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
1515
+			"Set Network type to AP!\n");
15391516 		break;
15401517 	default:
15411518 		pr_err("Network type %d not support!\n", type);
....@@ -1560,9 +1537,9 @@
15601537 		_rtl8723be_resume_tx_beacon(hw);
15611538 		_rtl8723be_disable_bcn_sub_func(hw);
15621539 	} else {
1563
-		RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1564
-			 "Set HW_VAR_MEDIA_STATUS: No such media status(%x).\n",
1565
-			 mode);
1540
+		rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING,
1541
+			"Set HW_VAR_MEDIA_STATUS: No such media status(%x).\n",
1542
+			mode);
15661543 	}
15671544 
15681545 	rtl_write_byte(rtlpriv, MSR, bt_msr | mode);
....@@ -1724,8 +1701,8 @@
17241701 	struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
17251702 	u16 bcn_interval = mac->beacon_interval;
17261703 
1727
-	RT_TRACE(rtlpriv, COMP_BEACON, DBG_DMESG,
1728
-		 "beacon_interval:%d\n", bcn_interval);
1704
+	rtl_dbg(rtlpriv, COMP_BEACON, DBG_DMESG,
1705
+		"beacon_interval:%d\n", bcn_interval);
17291706 	rtl8723be_disable_interrupt(hw);
17301707 	rtl_write_word(rtlpriv, REG_BCN_INTERVAL, bcn_interval);
17311708 	rtl8723be_enable_interrupt(hw);
....@@ -1737,8 +1714,8 @@
17371714 	struct rtl_priv *rtlpriv = rtl_priv(hw);
17381715 	struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
17391716 
1740
-	RT_TRACE(rtlpriv, COMP_INTR, DBG_LOUD,
1741
-		 "add_msr:%x, rm_msr:%x\n", add_msr, rm_msr);
1717
+	rtl_dbg(rtlpriv, COMP_INTR, DBG_LOUD,
1718
+		"add_msr:%x, rm_msr:%x\n", add_msr, rm_msr);
17421719 
17431720 	if (add_msr)
17441721 		rtlpci->irq_mask[0] |= add_msr;
....@@ -1769,15 +1746,15 @@
17691746 	struct rtl_priv *rtlpriv = rtl_priv(hw);
17701747 	u32 path, addr = EEPROM_TX_PWR_INX, group, cnt = 0;
17711748 
1772
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1773
-		 "hal_ReadPowerValueFromPROM8723BE(): PROMContent[0x%x]=0x%x\n",
1774
-		 (addr + 1), hwinfo[addr + 1]);
1749
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
1750
+		"hal_ReadPowerValueFromPROM8723BE(): PROMContent[0x%x]=0x%x\n",
1751
+		(addr + 1), hwinfo[addr + 1]);
17751752 	if (0xFF == hwinfo[addr + 1])  /*YJ,add,120316*/
17761753 		autoload_fail = true;
17771754 
17781755 	if (autoload_fail) {
1779
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1780
-			 "auto load fail : Use Default value!\n");
1756
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
1757
+			"auto load fail : Use Default value!\n");
17811758 		for (path = 0; path < MAX_RF_PATH; path++) {
17821759 			/* 2.4G default value */
17831760 			for (group = 0 ; group < MAX_CHNL_GROUP_24G; group++) {
....@@ -2121,8 +2098,8 @@
21212098 		rtlefuse->board_type |= BIT(2); /* ODM_BOARD_BT */
21222099 
21232100 	rtlhal->board_type = rtlefuse->board_type;
2124
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2125
-		 "board_type = 0x%x\n", rtlefuse->board_type);
2101
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
2102
+		"board_type = 0x%x\n", rtlefuse->board_type);
21262103 
21272104 	rtlhal->package_type = _rtl8723be_read_package_type(hw);
21282105 
....@@ -2259,8 +2236,8 @@
22592236 	default:
22602237 		break;
22612238 	}
2262
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2263
-		 "RT Customized ID: 0x%02X\n", rtlhal->oem_id);
2239
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG,
2240
+		"RT Customized ID: 0x%02X\n", rtlhal->oem_id);
22642241 }
22652242 
22662243 void rtl8723be_read_eeprom_info(struct ieee80211_hw *hw)
....@@ -2277,18 +2254,18 @@
22772254 	else
22782255 		rtlpriv->dm.rfpath_rxenable[0] =
22792256 		    rtlpriv->dm.rfpath_rxenable[1] = true;
2280
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "VersionID = 0x%4x\n",
2281
-		 rtlhal->version);
2257
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "VersionID = 0x%4x\n",
2258
+		rtlhal->version);
22822259 	tmp_u1b = rtl_read_byte(rtlpriv, REG_9346CR);
22832260 	if (tmp_u1b & BIT(4)) {
2284
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "Boot from EEPROM\n");
2261
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG, "Boot from EEPROM\n");
22852262 		rtlefuse->epromtype = EEPROM_93C46;
22862263 	} else {
2287
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "Boot from EFUSE\n");
2264
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG, "Boot from EFUSE\n");
22882265 		rtlefuse->epromtype = EEPROM_BOOT_EFUSE;
22892266 	}
22902267 	if (tmp_u1b & BIT(5)) {
2291
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Autoload OK\n");
2268
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "Autoload OK\n");
22922269 		rtlefuse->autoload_failflag = false;
22932270 		_rtl8723be_read_adapter_info(hw, false);
22942271 	} else {
....@@ -2439,8 +2416,8 @@
24392416 
24402417 	sta_entry->ratr_index = ratr_index;
24412418 
2442
-	RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG,
2443
-		 "ratr_bitmap :%x\n", ratr_bitmap);
2419
+	rtl_dbg(rtlpriv, COMP_RATR, DBG_DMESG,
2420
+		"ratr_bitmap :%x\n", ratr_bitmap);
24442421 	*(u32 *)&rate_mask = (ratr_bitmap & 0x0fffffff) |
24452422 				       (ratr_index << 28);
24462423 	rate_mask[0] = macid;
....@@ -2453,13 +2430,13 @@
24532430 	rate_mask[5] = (u8)((ratr_bitmap & 0x00ff0000) >> 16);
24542431 	rate_mask[6] = (u8)((ratr_bitmap & 0xff000000) >> 24);
24552432 
2456
-	RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG,
2457
-		 "Rate_index:%x, ratr_val:%x, %x:%x:%x:%x:%x:%x:%x\n",
2458
-		 ratr_index, ratr_bitmap,
2459
-		 rate_mask[0], rate_mask[1],
2460
-		 rate_mask[2], rate_mask[3],
2461
-		 rate_mask[4], rate_mask[5],
2462
-		 rate_mask[6]);
2433
+	rtl_dbg(rtlpriv, COMP_RATR, DBG_DMESG,
2434
+		"Rate_index:%x, ratr_val:%x, %x:%x:%x:%x:%x:%x:%x\n",
2435
+		ratr_index, ratr_bitmap,
2436
+		rate_mask[0], rate_mask[1],
2437
+		rate_mask[2], rate_mask[3],
2438
+		rate_mask[4], rate_mask[5],
2439
+		rate_mask[6]);
24632440 	rtl8723be_fill_h2c_cmd(hw, H2C_8723B_RA_MASK, 7, rate_mask);
24642441 	_rtl8723be_set_bcn_ctrl_reg(hw, BIT(3), 0);
24652442 }
....@@ -2522,15 +2499,15 @@
25222499 		e_rfpowerstate_toset = (u1tmp & BIT(1)) ? ERFON : ERFOFF;
25232500 
25242501 	if ((ppsc->hwradiooff) && (e_rfpowerstate_toset == ERFON)) {
2525
-		RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
2526
-			 "GPIOChangeRF  - HW Radio ON, RF ON\n");
2502
+		rtl_dbg(rtlpriv, COMP_RF, DBG_DMESG,
2503
+			"GPIOChangeRF  - HW Radio ON, RF ON\n");
25272504 
25282505 		e_rfpowerstate_toset = ERFON;
25292506 		ppsc->hwradiooff = false;
25302507 		b_actuallyset = true;
25312508 	} else if (!ppsc->hwradiooff && (e_rfpowerstate_toset == ERFOFF)) {
2532
-		RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
2533
-			 "GPIOChangeRF  - HW Radio OFF, RF OFF\n");
2509
+		rtl_dbg(rtlpriv, COMP_RF, DBG_DMESG,
2510
+			"GPIOChangeRF  - HW Radio OFF, RF OFF\n");
25342511 
25352512 		e_rfpowerstate_toset = ERFOFF;
25362513 		ppsc->hwradiooff = true;
....@@ -2581,7 +2558,7 @@
25812558 		u8 cam_offset = 0;
25822559 		u8 clear_number = 5;
25832560 
2584
-		RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, "clear_all\n");
2561
+		rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG, "clear_all\n");
25852562 
25862563 		for (idx = 0; idx < clear_number; idx++) {
25872564 			rtl_cam_mark_invalid(hw, cam_offset + idx);
....@@ -2609,8 +2586,8 @@
26092586 			enc_algo = CAM_AES;
26102587 			break;
26112588 		default:
2612
-			RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
2613
-				 "switch case %#x not processed\n", enc_algo);
2589
+			rtl_dbg(rtlpriv, COMP_ERR, DBG_LOUD,
2590
+				"switch case %#x not processed\n", enc_algo);
26142591 			enc_algo = CAM_TKIP;
26152592 			break;
26162593 		}
....@@ -2640,26 +2617,26 @@
26402617 		}
26412618 
26422619 		if (rtlpriv->sec.key_len[key_index] == 0) {
2643
-			RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
2644
-				 "delete one entry, entry_id is %d\n",
2645
-				  entry_id);
2620
+			rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG,
2621
+				"delete one entry, entry_id is %d\n",
2622
+				entry_id);
26462623 			if (mac->opmode == NL80211_IFTYPE_AP)
26472624 				rtl_cam_del_entry(hw, p_macaddr);
26482625 			rtl_cam_delete_one_entry(hw, p_macaddr, entry_id);
26492626 		} else {
2650
-			RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
2651
-				 "add one entry\n");
2627
+			rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG,
2628
+				"add one entry\n");
26522629 			if (is_pairwise) {
2653
-				RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
2654
-					 "set Pairwise key\n");
2630
+				rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG,
2631
+					"set Pairwise key\n");
26552632 
26562633 				rtl_cam_add_one_entry(hw, macaddr, key_index,
26572634 					       entry_id, enc_algo,
26582635 					       CAM_CONFIG_NO_USEDK,
26592636 					       rtlpriv->sec.key_buf[key_index]);
26602637 			} else {
2661
-				RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
2662
-					 "set group key\n");
2638
+				rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG,
2639
+					"set group key\n");
26632640 
26642641 				if (mac->opmode == NL80211_IFTYPE_ADHOC) {
26652642 					rtl_cam_add_one_entry(hw,