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| 1 | +/* SPDX-License-Identifier: ISC */ |
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1 | 2 | /* |
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2 | 3 | * Copyright (c) 2004-2011 Atheros Communications Inc. |
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3 | 4 | * Copyright (c) 2011-2012 Qualcomm Atheros, Inc. |
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4 | 5 | * Copyright (c) 2016-2017 Erik Stromdahl <erik.stromdahl@gmail.com> |
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5 | | - * |
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6 | | - * Permission to use, copy, modify, and/or distribute this software for any |
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7 | | - * purpose with or without fee is hereby granted, provided that the above |
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8 | | - * copyright notice and this permission notice appear in all copies. |
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9 | | - * |
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10 | | - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
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11 | | - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
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12 | | - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
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13 | | - * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
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14 | | - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
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15 | | - * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
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16 | | - * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
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17 | 6 | */ |
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18 | 7 | |
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19 | 8 | #ifndef _SDIO_H_ |
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20 | 9 | #define _SDIO_H_ |
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21 | 10 | |
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22 | 11 | #define ATH10K_HIF_MBOX_BLOCK_SIZE 256 |
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23 | | - |
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24 | | -#define QCA_MANUFACTURER_ID_BASE GENMASK(11, 8) |
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25 | | -#define QCA_MANUFACTURER_ID_AR6005_BASE 0x5 |
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26 | | -#define QCA_MANUFACTURER_ID_QCA9377_BASE 0x7 |
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27 | | -#define QCA_SDIO_ID_AR6005_BASE 0x500 |
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28 | | -#define QCA_SDIO_ID_QCA9377_BASE 0x700 |
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29 | | -#define QCA_MANUFACTURER_ID_REV_MASK 0x00FF |
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30 | | -#define QCA_MANUFACTURER_CODE 0x271 /* Qualcomm/Atheros */ |
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31 | 12 | |
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32 | 13 | #define ATH10K_SDIO_MAX_BUFFER_SIZE 4096 /*Unsure of this constant*/ |
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33 | 14 | |
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.. | .. |
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48 | 29 | (ATH10K_SDIO_MAX_BUFFER_SIZE - sizeof(struct ath10k_htc_hdr)) |
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49 | 30 | |
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50 | 31 | #define ATH10K_HIF_MBOX_NUM_MAX 4 |
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51 | | -#define ATH10K_SDIO_BUS_REQUEST_MAX_NUM 64 |
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| 32 | +#define ATH10K_SDIO_BUS_REQUEST_MAX_NUM 1024 |
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52 | 33 | |
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53 | 34 | #define ATH10K_SDIO_HIF_COMMUNICATION_TIMEOUT_HZ (100 * HZ) |
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54 | 35 | |
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.. | .. |
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100 | 81 | * to the maximum value (HTC_HOST_MAX_MSG_PER_RX_BUNDLE). |
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101 | 82 | * |
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102 | 83 | * in this case the driver must allocate |
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103 | | - * (HTC_HOST_MAX_MSG_PER_RX_BUNDLE * HTC_HOST_MAX_MSG_PER_RX_BUNDLE) skb's. |
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| 84 | + * (HTC_HOST_MAX_MSG_PER_RX_BUNDLE * 2) skb's. |
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104 | 85 | */ |
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105 | 86 | #define ATH10K_SDIO_MAX_RX_MSGS \ |
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106 | | - (HTC_HOST_MAX_MSG_PER_RX_BUNDLE * HTC_HOST_MAX_MSG_PER_RX_BUNDLE) |
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| 87 | + (HTC_HOST_MAX_MSG_PER_RX_BUNDLE * 2) |
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107 | 88 | |
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108 | 89 | #define ATH10K_FIFO_TIMEOUT_AND_CHIP_CONTROL 0x00000868u |
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109 | 90 | #define ATH10K_FIFO_TIMEOUT_AND_CHIP_CONTROL_DISABLE_SLEEP_OFF 0xFFFEFFFF |
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110 | 91 | #define ATH10K_FIFO_TIMEOUT_AND_CHIP_CONTROL_DISABLE_SLEEP_ON 0x10000 |
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111 | 92 | |
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| 93 | +enum sdio_mbox_state { |
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| 94 | + SDIO_MBOX_UNKNOWN_STATE = 0, |
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| 95 | + SDIO_MBOX_REQUEST_TO_SLEEP_STATE = 1, |
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| 96 | + SDIO_MBOX_SLEEP_STATE = 2, |
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| 97 | + SDIO_MBOX_AWAKE_STATE = 3, |
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| 98 | +}; |
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| 99 | + |
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| 100 | +#define ATH10K_CIS_READ_WAIT_4_RTC_CYCLE_IN_US 125 |
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| 101 | +#define ATH10K_CIS_RTC_STATE_ADDR 0x1138 |
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| 102 | +#define ATH10K_CIS_RTC_STATE_ON 0x01 |
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| 103 | +#define ATH10K_CIS_XTAL_SETTLE_DURATION_IN_US 1500 |
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| 104 | +#define ATH10K_CIS_READ_RETRY 10 |
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| 105 | +#define ATH10K_MIN_SLEEP_INACTIVITY_TIME_MS 50 |
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| 106 | + |
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| 107 | +/* TODO: remove this and use skb->cb instead, much cleaner approach */ |
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112 | 108 | struct ath10k_sdio_bus_request { |
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113 | 109 | struct list_head list; |
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114 | 110 | |
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.. | .. |
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137 | 133 | bool part_of_bundle; |
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138 | 134 | bool last_in_bundle; |
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139 | 135 | bool trailer_only; |
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140 | | - int status; |
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141 | 136 | }; |
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142 | 137 | |
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143 | 138 | struct ath10k_sdio_irq_proc_regs { |
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.. | .. |
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149 | 144 | u8 rx_lookahead_valid; |
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150 | 145 | u8 host_int_status2; |
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151 | 146 | u8 gmbox_rx_avail; |
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152 | | - __le32 rx_lookahead[2]; |
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153 | | - __le32 rx_gmbox_lookahead_alias[2]; |
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| 147 | + __le32 rx_lookahead[2 * ATH10K_HIF_MBOX_NUM_MAX]; |
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| 148 | + __le32 int_status_enable; |
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154 | 149 | }; |
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155 | 150 | |
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156 | 151 | struct ath10k_sdio_irq_enable_regs { |
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.. | .. |
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198 | 193 | struct ath10k_sdio_bus_request bus_req[ATH10K_SDIO_BUS_REQUEST_MAX_NUM]; |
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199 | 194 | /* free list of bus requests */ |
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200 | 195 | struct list_head bus_req_freeq; |
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| 196 | + |
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| 197 | + struct sk_buff_head rx_head; |
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| 198 | + |
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201 | 199 | /* protects access to bus_req_freeq */ |
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202 | 200 | spinlock_t lock; |
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203 | 201 | |
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.. | .. |
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206 | 204 | |
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207 | 205 | struct ath10k *ar; |
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208 | 206 | struct ath10k_sdio_irq_data irq_data; |
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| 207 | + |
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| 208 | + /* temporary buffer for sdio read. |
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| 209 | + * It is allocated when probe, and used for receive bundled packets, |
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| 210 | + * the read for bundled packets is not parallel, so it does not need |
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| 211 | + * protected. |
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| 212 | + */ |
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| 213 | + u8 *vsg_buffer; |
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209 | 214 | |
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210 | 215 | /* temporary buffer for BMI requests */ |
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211 | 216 | u8 *bmi_buf; |
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.. | .. |
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217 | 222 | struct list_head wr_asyncq; |
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218 | 223 | /* protects access to wr_asyncq */ |
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219 | 224 | spinlock_t wr_async_lock; |
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| 225 | + |
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| 226 | + struct work_struct async_work_rx; |
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| 227 | + struct timer_list sleep_timer; |
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| 228 | + enum sdio_mbox_state mbox_state; |
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220 | 229 | }; |
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221 | 230 | |
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222 | 231 | static inline struct ath10k_sdio *ath10k_sdio_priv(struct ath10k *ar) |
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