forked from ~ljy/RK356X_SDK_RELEASE
blame | history | patch | commit | commitdiff
hc
2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f 
 kernel/drivers/net/wireless/ath/ath10k/htt.h
....@@ -1,19 +1,8 @@
1
+/* SPDX-License-Identifier: ISC */
12 /*
23  * Copyright (c) 2005-2011 Atheros Communications Inc.
34  * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
45  * Copyright (c) 2018, The Linux Foundation. All rights reserved.
5
- *
6
- * Permission to use, copy, modify, and/or distribute this software for any
7
- * purpose with or without fee is hereby granted, provided that the above
8
- * copyright notice and this permission notice appear in all copies.
9
- *
10
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
176  */
187 
198 #ifndef _HTT_H_
....@@ -29,7 +18,6 @@
2918 #include "htc.h"
3019 #include "hw.h"
3120 #include "rx_desc.h"
32
-#include "hw.h"
3321 
3422 enum htt_dbg_stats_type {
3523 	HTT_DBG_STATS_WAL_PDEV_TXRX = 1 << 0,
....@@ -162,8 +150,18 @@
162150 	HTT_DATA_TX_DESC_FLAGS1_MORE_IN_BATCH    = 1 << 12,
163151 	HTT_DATA_TX_DESC_FLAGS1_CKSUM_L3_OFFLOAD = 1 << 13,
164152 	HTT_DATA_TX_DESC_FLAGS1_CKSUM_L4_OFFLOAD = 1 << 14,
165
-	HTT_DATA_TX_DESC_FLAGS1_RSVD1            = 1 << 15
153
+	HTT_DATA_TX_DESC_FLAGS1_TX_COMPLETE      = 1 << 15
166154 };
155
+
156
+#define HTT_TX_CREDIT_DELTA_ABS_M      0xffff0000
157
+#define HTT_TX_CREDIT_DELTA_ABS_S      16
158
+#define HTT_TX_CREDIT_DELTA_ABS_GET(word) \
159
+	    (((word) & HTT_TX_CREDIT_DELTA_ABS_M) >> HTT_TX_CREDIT_DELTA_ABS_S)
160
+
161
+#define HTT_TX_CREDIT_SIGN_BIT_M       0x00000100
162
+#define HTT_TX_CREDIT_SIGN_BIT_S       8
163
+#define HTT_TX_CREDIT_SIGN_BIT_GET(word) \
164
+	    (((word) & HTT_TX_CREDIT_SIGN_BIT_M) >> HTT_TX_CREDIT_SIGN_BIT_S)
167165 
168166 enum htt_data_tx_ext_tid {
169167 	HTT_DATA_TX_EXT_TID_NON_QOS_MCAST_BCAST = 16,
....@@ -291,12 +289,12 @@
291289 
292290 struct htt_rx_ring_setup_32 {
293291 	struct htt_rx_ring_setup_hdr hdr;
294
-	struct htt_rx_ring_setup_ring32 rings[0];
292
+	struct htt_rx_ring_setup_ring32 rings[];
295293 } __packed;
296294 
297295 struct htt_rx_ring_setup_64 {
298296 	struct htt_rx_ring_setup_hdr hdr;
299
-	struct htt_rx_ring_setup_ring64 rings[0];
297
+	struct htt_rx_ring_setup_ring64 rings[];
300298 } __packed;
301299 
302300 /*
....@@ -327,6 +325,7 @@
327325 } __packed;
328326 
329327 #define HTT_STATS_REQ_CFG_STAT_TYPE_INVALID 0xff
328
+#define HTT_STATS_BIT_MASK GENMASK(16, 0)
330329 
331330 /*
332331  * htt_oob_sync_req - request out-of-band sync
....@@ -356,6 +355,13 @@
356355 	u8 max_num_ampdu_subframes;
357356 	/* amsdu_subframes is limited by 0x1F mask */
358357 	u8 max_num_amsdu_subframes;
358
+} __packed;
359
+
360
+struct htt_aggr_conf_v2 {
361
+	u8 max_num_ampdu_subframes;
362
+	/* amsdu_subframes is limited by 0x1F mask */
363
+	u8 max_num_amsdu_subframes;
364
+	u8 reserved;
359365 } __packed;
360366 
361367 #define HTT_MGMT_FRM_HDR_DOWNLOAD_LEN 32
....@@ -565,6 +571,7 @@
565571 #define HTT_RX_INDICATION_INFO0_EXT_TID_LSB   (0)
566572 #define HTT_RX_INDICATION_INFO0_FLUSH_VALID   (1 << 5)
567573 #define HTT_RX_INDICATION_INFO0_RELEASE_VALID (1 << 6)
574
+#define HTT_RX_INDICATION_INFO0_PPDU_DURATION BIT(7)
568575 
569576 #define HTT_RX_INDICATION_INFO1_FLUSH_START_SEQNO_MASK   0x0000003F
570577 #define HTT_RX_INDICATION_INFO1_FLUSH_START_SEQNO_LSB    0
....@@ -576,6 +583,15 @@
576583 #define HTT_RX_INDICATION_INFO1_RELEASE_END_SEQNO_LSB    18
577584 #define HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES_MASK     0xFF000000
578585 #define HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES_LSB      24
586
+
587
+#define HTT_TX_CMPL_FLAG_DATA_RSSI		BIT(0)
588
+#define HTT_TX_CMPL_FLAG_PPID_PRESENT		BIT(1)
589
+#define HTT_TX_CMPL_FLAG_PA_PRESENT		BIT(2)
590
+#define HTT_TX_CMPL_FLAG_PPDU_DURATION_PRESENT	BIT(3)
591
+
592
+#define HTT_TX_DATA_RSSI_ENABLE_WCN3990 BIT(3)
593
+#define HTT_TX_DATA_APPEND_RETRIES BIT(0)
594
+#define HTT_TX_DATA_APPEND_TIMESTAMP BIT(1)
579595 
580596 struct htt_rx_indication_hdr {
581597 	u8 info0; /* %HTT_RX_INDICATION_INFO0_ */
....@@ -716,7 +732,30 @@
716732 	 * %mpdu_ranges starts after &%prefix + roundup(%fw_rx_desc_bytes, 4)
717733 	 * and has %num_mpdu_ranges elements.
718734 	 */
719
-	struct htt_rx_indication_mpdu_range mpdu_ranges[0];
735
+	struct htt_rx_indication_mpdu_range mpdu_ranges[];
736
+} __packed;
737
+
738
+/* High latency version of the RX indication */
739
+struct htt_rx_indication_hl {
740
+	struct htt_rx_indication_hdr hdr;
741
+	struct htt_rx_indication_ppdu ppdu;
742
+	struct htt_rx_indication_prefix prefix;
743
+	struct fw_rx_desc_hl fw_desc;
744
+	struct htt_rx_indication_mpdu_range mpdu_ranges[];
745
+} __packed;
746
+
747
+struct htt_hl_rx_desc {
748
+	__le32 info;
749
+	__le32 pn_31_0;
750
+	union {
751
+		struct {
752
+			__le16 pn_47_32;
753
+			__le16 pn_63_48;
754
+		} pn16;
755
+		__le32 pn_63_32;
756
+	} u0;
757
+	__le32 pn_95_64;
758
+	__le32 pn_127_96;
720759 } __packed;
721760 
722761 static inline struct htt_rx_indication_mpdu_range *
....@@ -728,6 +767,18 @@
728767 	     + sizeof(rx_ind->ppdu)
729768 	     + sizeof(rx_ind->prefix)
730769 	     + roundup(__le16_to_cpu(rx_ind->prefix.fw_rx_desc_bytes), 4);
770
+	return ptr;
771
+}
772
+
773
+static inline struct htt_rx_indication_mpdu_range *
774
+	htt_rx_ind_get_mpdu_ranges_hl(struct htt_rx_indication_hl *rx_ind)
775
+{
776
+	void *ptr = rx_ind;
777
+
778
+	ptr += sizeof(rx_ind->hdr)
779
+	     + sizeof(rx_ind->ppdu)
780
+	     + sizeof(rx_ind->prefix)
781
+	     + sizeof(rx_ind->fw_desc);
731782 	return ptr;
732783 }
733784 
....@@ -764,6 +815,21 @@
764815 	__le16 peer_id;
765816 } __packed;
766817 
818
+enum htt_txrx_sec_cast_type {
819
+	HTT_TXRX_SEC_MCAST = 0,
820
+	HTT_TXRX_SEC_UCAST
821
+};
822
+
823
+enum htt_rx_pn_check_type {
824
+	HTT_RX_NON_PN_CHECK = 0,
825
+	HTT_RX_PN_CHECK
826
+};
827
+
828
+enum htt_rx_tkip_demic_type {
829
+	HTT_RX_NON_TKIP_MIC = 0,
830
+	HTT_RX_TKIP_MIC
831
+};
832
+
767833 enum htt_security_types {
768834 	HTT_SECURITY_NONE,
769835 	HTT_SECURITY_WEP128,
....@@ -776,6 +842,10 @@
776842 
777843 	HTT_NUM_SECURITY_TYPES /* keep this last! */
778844 };
845
+
846
+#define ATH10K_HTT_TXRX_PEER_SECURITY_MAX 2
847
+#define ATH10K_TXRX_NUM_EXT_TIDS 19
848
+#define ATH10K_TXRX_NON_QOS_TID 16
779849 
780850 enum htt_security_flags {
781851 #define HTT_SECURITY_TYPE_MASK 0x7F
....@@ -830,6 +900,88 @@
830900 
831901 #define HTT_TX_COMPL_INV_MSDU_ID 0xFFFF
832902 
903
+struct htt_append_retries {
904
+	__le16 msdu_id;
905
+	u8 tx_retries;
906
+	u8 flag;
907
+} __packed;
908
+
909
+struct htt_data_tx_completion_ext {
910
+	struct htt_append_retries a_retries;
911
+	__le32 t_stamp;
912
+	__le16 msdus_rssi[];
913
+} __packed;
914
+
915
+/**
916
+ * @brief target -> host TX completion indication message definition
917
+ *
918
+ * @details
919
+ * The following diagram shows the format of the TX completion indication sent
920
+ * from the target to the host
921
+ *
922
+ *          |31 28|27|26|25|24|23        16| 15 |14 11|10   8|7          0|
923
+ *          |-------------------------------------------------------------|
924
+ * header:  |rsvd |A2|TP|A1|A0|     num    | t_i| tid |status|  msg_type  |
925
+ *          |-------------------------------------------------------------|
926
+ * payload: |            MSDU1 ID          |         MSDU0 ID             |
927
+ *          |-------------------------------------------------------------|
928
+ *          :            MSDU3 ID          :         MSDU2 ID             :
929
+ *          |-------------------------------------------------------------|
930
+ *          |          struct htt_tx_compl_ind_append_retries             |
931
+ *          |- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -|
932
+ *          |          struct htt_tx_compl_ind_append_tx_tstamp           |
933
+ *          |- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -|
934
+ *          |           MSDU1 ACK RSSI     |        MSDU0 ACK RSSI        |
935
+ *          |-------------------------------------------------------------|
936
+ *          :           MSDU3 ACK RSSI     :        MSDU2 ACK RSSI        :
937
+ *          |- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -|
938
+ *    -msg_type
939
+ *     Bits 7:0
940
+ *     Purpose: identifies this as HTT TX completion indication
941
+ *    -status
942
+ *     Bits 10:8
943
+ *     Purpose: the TX completion status of payload fragmentations descriptors
944
+ *     Value: could be HTT_TX_COMPL_IND_STAT_OK or HTT_TX_COMPL_IND_STAT_DISCARD
945
+ *    -tid
946
+ *     Bits 14:11
947
+ *     Purpose: the tid associated with those fragmentation descriptors. It is
948
+ *     valid or not, depending on the tid_invalid bit.
949
+ *     Value: 0 to 15
950
+ *    -tid_invalid
951
+ *     Bits 15:15
952
+ *     Purpose: this bit indicates whether the tid field is valid or not
953
+ *     Value: 0 indicates valid, 1 indicates invalid
954
+ *    -num
955
+ *     Bits 23:16
956
+ *     Purpose: the number of payload in this indication
957
+ *     Value: 1 to 255
958
+ *    -A0 = append
959
+ *     Bits 24:24
960
+ *     Purpose: append the struct htt_tx_compl_ind_append_retries which contains
961
+ *            the number of tx retries for one MSDU at the end of this message
962
+ *     Value: 0 indicates no appending, 1 indicates appending
963
+ *    -A1 = append1
964
+ *     Bits 25:25
965
+ *     Purpose: Append the struct htt_tx_compl_ind_append_tx_tstamp which
966
+ *            contains the timestamp info for each TX msdu id in payload.
967
+ *     Value: 0 indicates no appending, 1 indicates appending
968
+ *    -TP = MSDU tx power presence
969
+ *     Bits 26:26
970
+ *     Purpose: Indicate whether the TX_COMPL_IND includes a tx power report
971
+ *            for each MSDU referenced by the TX_COMPL_IND message.
972
+ *            The order of the per-MSDU tx power reports matches the order
973
+ *            of the MSDU IDs.
974
+ *     Value: 0 indicates not appending, 1 indicates appending
975
+ *    -A2 = append2
976
+ *     Bits 27:27
977
+ *     Purpose: Indicate whether data ACK RSSI is appended for each MSDU in
978
+ *            TX_COMP_IND message.  The order of the per-MSDU ACK RSSI report
979
+ *            matches the order of the MSDU IDs.
980
+ *            The ACK RSSI values are valid when status is COMPLETE_OK (and
981
+ *            this append2 bit is set).
982
+ *     Value: 0 indicates not appending, 1 indicates appending
983
+ */
984
+
833985 struct htt_data_tx_completion {
834986 	union {
835987 		u8 flags;
....@@ -840,8 +992,23 @@
840992 		} __packed;
841993 	} __packed;
842994 	u8 num_msdus;
843
-	u8 rsvd0;
844
-	__le16 msdus[0]; /* variable length based on %num_msdus */
995
+	u8 flags2; /* HTT_TX_CMPL_FLAG_DATA_RSSI */
996
+	__le16 msdus[]; /* variable length based on %num_msdus */
997
+} __packed;
998
+
999
+#define HTT_TX_PPDU_DUR_INFO0_PEER_ID_MASK	GENMASK(15, 0)
1000
+#define HTT_TX_PPDU_DUR_INFO0_TID_MASK		GENMASK(20, 16)
1001
+
1002
+struct htt_data_tx_ppdu_dur {
1003
+	__le32 info0; /* HTT_TX_PPDU_DUR_INFO0_ */
1004
+	__le32 tx_duration; /* in usecs */
1005
+} __packed;
1006
+
1007
+#define HTT_TX_COMPL_PPDU_DUR_INFO0_NUM_ENTRIES_MASK	GENMASK(7, 0)
1008
+
1009
+struct htt_data_tx_compl_ppdu_dur {
1010
+	__le32 info0; /* HTT_TX_COMPL_PPDU_DUR_INFO0_ */
1011
+	struct htt_data_tx_ppdu_dur ppdu_dur[];
8451012 } __packed;
8461013 
8471014 struct htt_tx_compl_ind_base {
....@@ -867,7 +1034,7 @@
8671034 	u8 addr[6];
8681035 	u8 num_elems;
8691036 	u8 rsvd0;
870
-	struct htt_rc_tx_done_params params[0]; /* variable length %num_elems */
1037
+	struct htt_rc_tx_done_params params[]; /* variable length %num_elems */
8711038 } __packed;
8721039 
8731040 /* see htt_rx_indication for similar fields and descriptions */
....@@ -884,8 +1051,13 @@
8841051 	__le16 fw_rx_desc_bytes;
8851052 	__le16 rsvd0;
8861053 
887
-	u8 fw_msdu_rx_desc[0];
1054
+	u8 fw_msdu_rx_desc[];
8881055 } __packed;
1056
+
1057
+#define ATH10K_IEEE80211_EXTIV               BIT(5)
1058
+#define ATH10K_IEEE80211_TKIP_MICLEN         8   /* trailing MIC */
1059
+
1060
+#define HTT_RX_FRAG_IND_INFO0_HEADER_LEN     16
8891061 
8901062 #define HTT_RX_FRAG_IND_INFO0_EXT_TID_MASK     0x1F
8911063 #define HTT_RX_FRAG_IND_INFO0_EXT_TID_LSB      0
....@@ -904,7 +1076,7 @@
9041076 	u8 seqno_end;
9051077 	u8 pn_ie_count;
9061078 	u8 reserved;
907
-	u8 pn_ies[0];
1079
+	u8 pn_ies[];
9081080 } __packed;
9091081 
9101082 struct htt_rx_offload_msdu {
....@@ -913,7 +1085,7 @@
9131085 	u8 vdev_id;
9141086 	u8 tid;
9151087 	u8 fw_desc;
916
-	u8 payload[0];
1088
+	u8 payload[];
9171089 } __packed;
9181090 
9191091 struct htt_rx_offload_ind {
....@@ -996,7 +1168,7 @@
9961168 	 *  a) num_ints * sizeof(__le32)
9971169 	 *  b) num_chars * sizeof(u8) aligned to 4bytes
9981170 	 */
999
-	u8 payload[0];
1171
+	u8 payload[];
10001172 } __packed;
10011173 
10021174 static inline __le32 *htt_rx_test_get_ints(struct htt_rx_test *rx_test)
....@@ -1030,7 +1202,7 @@
10301202  */
10311203 struct htt_pktlog_msg {
10321204 	u8 pad[3];
1033
-	u8 payload[0];
1205
+	u8 payload[];
10341206 } __packed;
10351207 
10361208 struct htt_dbg_stats_rx_reorder_stats {
....@@ -1319,7 +1491,7 @@
13191491 	} __packed;
13201492 	u8 pad;
13211493 	__le16 length;
1322
-	u8 payload[0]; /* roundup(length, 4) long */
1494
+	u8 payload[]; /* roundup(length, 4) long */
13231495 } __packed;
13241496 
13251497 struct htt_stats_conf {
....@@ -1328,7 +1500,7 @@
13281500 	__le32 cookie_msb;
13291501 
13301502 	/* each item has variable length! */
1331
-	struct htt_stats_conf_item items[0];
1503
+	struct htt_stats_conf_item items[];
13321504 } __packed;
13331505 
13341506 static inline struct htt_stats_conf_item *htt_stats_conf_next_item(
....@@ -1502,8 +1674,8 @@
15021674 	__le32 token;
15031675 	__le16 num_resp_ids;
15041676 	__le16 num_records;
1505
-	struct htt_tx_fetch_record records[0];
15061677 	__le32 resp_ids[0]; /* ath10k_htt_get_tx_fetch_ind_resp_ids() */
1678
+	struct htt_tx_fetch_record records[];
15071679 } __packed;
15081680 
15091681 static inline void *
....@@ -1518,13 +1690,13 @@
15181690 	__le16 fetch_seq_num;
15191691 	__le16 num_records;
15201692 	__le32 token;
1521
-	struct htt_tx_fetch_record records[0];
1693
+	struct htt_tx_fetch_record records[];
15221694 } __packed;
15231695 
15241696 struct htt_tx_fetch_confirm {
15251697 	u8 pad0;
15261698 	__le16 num_resp_ids;
1527
-	__le32 resp_ids[0];
1699
+	__le32 resp_ids[];
15281700 } __packed;
15291701 
15301702 enum htt_tx_mode_switch_mode {
....@@ -1556,7 +1728,7 @@
15561728 	__le16 info0; /* HTT_TX_MODE_SWITCH_IND_INFO0_ */
15571729 	__le16 info1; /* HTT_TX_MODE_SWITCH_IND_INFO1_ */
15581730 	u8 pad1[2];
1559
-	struct htt_tx_mode_switch_record records[0];
1731
+	struct htt_tx_mode_switch_record records[];
15601732 } __packed;
15611733 
15621734 struct htt_channel_change {
....@@ -1586,7 +1758,7 @@
15861758 	u8 num_ppdu;
15871759 	u8 ppdu_len;
15881760 	u8 version;
1589
-	u8 payload[0];
1761
+	u8 payload[];
15901762 } __packed;
15911763 
15921764 #define ATH10K_10_2_TX_STATS_OFFSET	136
....@@ -1628,6 +1800,7 @@
16281800 		struct htt_stats_req stats_req;
16291801 		struct htt_oob_sync_req oob_sync_req;
16301802 		struct htt_aggr_conf aggr_conf;
1803
+		struct htt_aggr_conf_v2 aggr_conf_v2;
16311804 		struct htt_frag_desc_bank_cfg32 frag_desc_bank_cfg32;
16321805 		struct htt_frag_desc_bank_cfg64 frag_desc_bank_cfg64;
16331806 		struct htt_tx_fetch_resp tx_fetch_resp;
....@@ -1641,6 +1814,7 @@
16411814 		struct htt_mgmt_tx_completion mgmt_tx_completion;
16421815 		struct htt_data_tx_completion data_tx_completion;
16431816 		struct htt_rx_indication rx_ind;
1817
+		struct htt_rx_indication_hl rx_ind_hl;
16441818 		struct htt_rx_fragment_indication rx_frag_ind;
16451819 		struct htt_rx_peer_map peer_map;
16461820 		struct htt_rx_peer_unmap peer_unmap;
....@@ -1693,18 +1867,20 @@
16931867 	struct ath10k_htc_hdr htc_hdr;
16941868 	struct htt_cmd_hdr cmd_hdr;
16951869 	struct htt_data_tx_desc cmd_tx;
1696
-} __packed;
1870
+} __packed __aligned(4);
16971871 
16981872 struct ath10k_htt_txbuf_64 {
16991873 	struct htt_data_tx_desc_frag frags[2];
17001874 	struct ath10k_htc_hdr htc_hdr;
17011875 	struct htt_cmd_hdr cmd_hdr;
17021876 	struct htt_data_tx_desc_64 cmd_tx;
1703
-} __packed;
1877
+} __packed __aligned(4);
17041878 
17051879 struct ath10k_htt {
17061880 	struct ath10k *ar;
17071881 	enum ath10k_htc_ep_id eid;
1882
+
1883
+	struct sk_buff_head rx_indication_head;
17081884 
17091885 	u8 target_version_major;
17101886 	u8 target_version_minor;
....@@ -1856,6 +2032,10 @@
18562032 	bool tx_mem_allocated;
18572033 	const struct ath10k_htt_tx_ops *tx_ops;
18582034 	const struct ath10k_htt_rx_ops *rx_ops;
2035
+	bool disable_tx_comp;
2036
+	bool bundle_tx;
2037
+	struct sk_buff_head tx_req_head;
2038
+	struct sk_buff_head tx_complete_head;
18592039 };
18602040 
18612041 struct ath10k_htt_tx_ops {
....@@ -1867,6 +2047,10 @@
18672047 		      struct sk_buff *msdu);
18682048 	int (*htt_alloc_txbuff)(struct ath10k_htt *htt);
18692049 	void (*htt_free_txbuff)(struct ath10k_htt *htt);
2050
+	int (*htt_h2t_aggr_cfg_msg)(struct ath10k_htt *htt,
2051
+				    u8 max_subfrms_ampdu,
2052
+				    u8 max_subfrms_amsdu);
2053
+	void (*htt_flush_tx)(struct ath10k_htt *htt);
18702054 };
18712055 
18722056 static inline int ath10k_htt_send_rx_ring_cfg(struct ath10k_htt *htt)
....@@ -1906,6 +2090,12 @@
19062090 	return htt->tx_ops->htt_tx(htt, txmode, msdu);
19072091 }
19082092 
2093
+static inline void ath10k_htt_flush_tx(struct ath10k_htt *htt)
2094
+{
2095
+	if (htt->tx_ops->htt_flush_tx)
2096
+		htt->tx_ops->htt_flush_tx(htt);
2097
+}
2098
+
19092099 static inline int ath10k_htt_alloc_txbuff(struct ath10k_htt *htt)
19102100 {
19112101 	if (!htt->tx_ops->htt_alloc_txbuff)
....@@ -1920,6 +2110,19 @@
19202110 		htt->tx_ops->htt_free_txbuff(htt);
19212111 }
19222112 
2113
+static inline int ath10k_htt_h2t_aggr_cfg_msg(struct ath10k_htt *htt,
2114
+					      u8 max_subfrms_ampdu,
2115
+					      u8 max_subfrms_amsdu)
2116
+
2117
+{
2118
+	if (!htt->tx_ops->htt_h2t_aggr_cfg_msg)
2119
+		return -EOPNOTSUPP;
2120
+
2121
+	return htt->tx_ops->htt_h2t_aggr_cfg_msg(htt,
2122
+						 max_subfrms_ampdu,
2123
+						 max_subfrms_amsdu);
2124
+}
2125
+
19232126 struct ath10k_htt_rx_ops {
19242127 	size_t (*htt_get_rx_ring_size)(struct ath10k_htt *htt);
19252128 	void (*htt_config_paddrs_ring)(struct ath10k_htt *htt, void *vaddr);
....@@ -1927,6 +2130,9 @@
19272130 				    int idx);
19282131 	void* (*htt_get_vaddr_ring)(struct ath10k_htt *htt);
19292132 	void (*htt_reset_paddrs_ring)(struct ath10k_htt *htt, int idx);
2133
+	bool (*htt_rx_proc_rx_frag_ind)(struct ath10k_htt *htt,
2134
+					struct htt_rx_fragment_indication *rx,
2135
+					struct sk_buff *skb);
19302136 };
19312137 
19322138 static inline size_t ath10k_htt_get_rx_ring_size(struct ath10k_htt *htt)
....@@ -1966,6 +2172,16 @@
19662172 		htt->rx_ops->htt_reset_paddrs_ring(htt, idx);
19672173 }
19682174 
2175
+static inline bool ath10k_htt_rx_proc_rx_frag_ind(struct ath10k_htt *htt,
2176
+						  struct htt_rx_fragment_indication *rx,
2177
+						  struct sk_buff *skb)
2178
+{
2179
+	if (!htt->rx_ops->htt_rx_proc_rx_frag_ind)
2180
+		return true;
2181
+
2182
+	return htt->rx_ops->htt_rx_proc_rx_frag_ind(htt, rx, skb);
2183
+}
2184
+
19692185 #define RX_HTT_HDR_STATUS_LEN 64
19702186 
19712187 /* This structure layout is programmed via rx ring setup
....@@ -1991,8 +2207,31 @@
19912207 		struct rx_ppdu_end ppdu_end;
19922208 	} __packed;
19932209 	u8 rx_hdr_status[RX_HTT_HDR_STATUS_LEN];
1994
-	u8 msdu_payload[0];
2210
+	u8 msdu_payload[];
19952211 };
2212
+
2213
+#define HTT_RX_DESC_HL_INFO_SEQ_NUM_MASK           0x00000fff
2214
+#define HTT_RX_DESC_HL_INFO_SEQ_NUM_LSB            0
2215
+#define HTT_RX_DESC_HL_INFO_ENCRYPTED_MASK         0x00001000
2216
+#define HTT_RX_DESC_HL_INFO_ENCRYPTED_LSB          12
2217
+#define HTT_RX_DESC_HL_INFO_CHAN_INFO_PRESENT_MASK 0x00002000
2218
+#define HTT_RX_DESC_HL_INFO_CHAN_INFO_PRESENT_LSB  13
2219
+#define HTT_RX_DESC_HL_INFO_MCAST_BCAST_MASK       0x00010000
2220
+#define HTT_RX_DESC_HL_INFO_MCAST_BCAST_LSB        16
2221
+#define HTT_RX_DESC_HL_INFO_KEY_ID_OCT_MASK        0x01fe0000
2222
+#define HTT_RX_DESC_HL_INFO_KEY_ID_OCT_LSB         17
2223
+
2224
+struct htt_rx_desc_base_hl {
2225
+	__le32 info; /* HTT_RX_DESC_HL_INFO_ */
2226
+};
2227
+
2228
+struct htt_rx_chan_info {
2229
+	__le16 primary_chan_center_freq_mhz;
2230
+	__le16 contig_chan1_center_freq_mhz;
2231
+	__le16 contig_chan2_center_freq_mhz;
2232
+	u8 phy_mode;
2233
+	u8 reserved;
2234
+} __packed;
19962235 
19972236 #define HTT_RX_DESC_ALIGN 8
19982237 
....@@ -2042,16 +2281,15 @@
20422281 void ath10k_htt_htc_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb);
20432282 bool ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb);
20442283 int ath10k_htt_h2t_ver_req_msg(struct ath10k_htt *htt);
2045
-int ath10k_htt_h2t_stats_req(struct ath10k_htt *htt, u8 mask, u64 cookie);
2046
-int ath10k_htt_h2t_aggr_cfg_msg(struct ath10k_htt *htt,
2047
-				u8 max_subfrms_ampdu,
2048
-				u8 max_subfrms_amsdu);
2284
+int ath10k_htt_h2t_stats_req(struct ath10k_htt *htt, u32 mask, u32 reset_mask,
2285
+			     u64 cookie);
20492286 void ath10k_htt_hif_tx_complete(struct ath10k *ar, struct sk_buff *skb);
20502287 int ath10k_htt_tx_fetch_resp(struct ath10k *ar,
20512288 			     __le32 token,
20522289 			     __le16 fetch_seq_num,
20532290 			     struct htt_tx_fetch_record *records,
20542291 			     size_t num_records);
2292
+void ath10k_htt_op_ep_tx_credits(struct ath10k *ar);
20552293 
20562294 void ath10k_htt_tx_txq_update(struct ieee80211_hw *hw,
20572295 			      struct ieee80211_txq *txq);
....@@ -2070,6 +2308,7 @@
20702308 void ath10k_htt_rx_pktlog_completion_handler(struct ath10k *ar,
20712309 					     struct sk_buff *skb);
20722310 int ath10k_htt_txrx_compl_task(struct ath10k *ar, int budget);
2311
+int ath10k_htt_rx_hl_indication(struct ath10k *ar, int budget);
20732312 void ath10k_htt_set_tx_ops(struct ath10k_htt *htt);
20742313 void ath10k_htt_set_rx_ops(struct ath10k_htt *htt);
20752314 #endif