.. | .. |
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| 1 | +// SPDX-License-Identifier: ISC |
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1 | 2 | /* |
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2 | 3 | * Copyright (c) 2011-2017 Qualcomm Atheros, Inc. |
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3 | 4 | * Copyright (c) 2018, The Linux Foundation. All rights reserved. |
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4 | | - * |
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5 | | - * Permission to use, copy, modify, and/or distribute this software for any |
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6 | | - * purpose with or without fee is hereby granted, provided that the above |
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7 | | - * copyright notice and this permission notice appear in all copies. |
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8 | | - * |
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9 | | - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
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10 | | - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
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11 | | - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
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12 | | - * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
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13 | | - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
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14 | | - * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
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15 | | - * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
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16 | 5 | */ |
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17 | 6 | |
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18 | 7 | #include "coredump.h" |
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.. | .. |
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277 | 266 | {0x38070, 0x380E0}, |
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278 | 267 | {0x3A000, 0x3A064}, |
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279 | 268 | {0x40000, 0x400A4}, |
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| 269 | + {0x80000, 0x8000C}, |
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| 270 | + {0x80010, 0x80020}, |
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| 271 | +}; |
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| 272 | + |
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| 273 | +static const struct ath10k_mem_section qca6174_hw30_sdio_register_sections[] = { |
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| 274 | + {0x800, 0x810}, |
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| 275 | + {0x820, 0x82C}, |
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| 276 | + {0x830, 0x8F4}, |
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| 277 | + {0x90C, 0x91C}, |
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| 278 | + {0xA14, 0xA18}, |
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| 279 | + {0xA84, 0xA94}, |
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| 280 | + {0xAA8, 0xAD4}, |
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| 281 | + {0xADC, 0xB40}, |
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| 282 | + {0x1000, 0x10A4}, |
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| 283 | + {0x10BC, 0x111C}, |
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| 284 | + {0x1134, 0x1138}, |
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| 285 | + {0x1144, 0x114C}, |
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| 286 | + {0x1150, 0x115C}, |
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| 287 | + {0x1160, 0x1178}, |
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| 288 | + {0x1240, 0x1260}, |
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| 289 | + {0x2000, 0x207C}, |
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| 290 | + {0x3000, 0x3014}, |
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| 291 | + {0x4000, 0x4014}, |
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| 292 | + {0x5000, 0x5124}, |
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| 293 | + {0x6000, 0x6040}, |
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| 294 | + {0x6080, 0x60CC}, |
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| 295 | + {0x6100, 0x611C}, |
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| 296 | + {0x6140, 0x61D8}, |
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| 297 | + {0x6200, 0x6238}, |
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| 298 | + {0x6240, 0x628C}, |
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| 299 | + {0x62C0, 0x62EC}, |
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| 300 | + {0x6380, 0x63E8}, |
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| 301 | + {0x6400, 0x6440}, |
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| 302 | + {0x6480, 0x64CC}, |
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| 303 | + {0x6500, 0x651C}, |
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| 304 | + {0x6540, 0x6580}, |
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| 305 | + {0x6600, 0x6638}, |
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| 306 | + {0x6640, 0x668C}, |
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| 307 | + {0x66C0, 0x66EC}, |
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| 308 | + {0x6780, 0x67E8}, |
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| 309 | + {0x7080, 0x708C}, |
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| 310 | + {0x70C0, 0x70C8}, |
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| 311 | + {0x7400, 0x741C}, |
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| 312 | + {0x7440, 0x7454}, |
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| 313 | + {0x7800, 0x7818}, |
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| 314 | + {0x8010, 0x8060}, |
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| 315 | + {0x8080, 0x8084}, |
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| 316 | + {0x80A0, 0x80A4}, |
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| 317 | + {0x80C0, 0x80C4}, |
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| 318 | + {0x80E0, 0x80ec}, |
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| 319 | + {0x8110, 0x8128}, |
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| 320 | + {0x9000, 0x9004}, |
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| 321 | + {0xF000, 0xF0E0}, |
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| 322 | + {0xF140, 0xF190}, |
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| 323 | + {0xF250, 0xF25C}, |
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| 324 | + {0xF260, 0xF268}, |
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| 325 | + {0xF26C, 0xF2A8}, |
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| 326 | + {0x10008, 0x1000C}, |
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| 327 | + {0x10014, 0x10018}, |
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| 328 | + {0x1001C, 0x10020}, |
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| 329 | + {0x10024, 0x10028}, |
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| 330 | + {0x10030, 0x10034}, |
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| 331 | + {0x10040, 0x10054}, |
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| 332 | + {0x10058, 0x1007C}, |
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| 333 | + {0x10080, 0x100C4}, |
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| 334 | + {0x100C8, 0x10114}, |
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| 335 | + {0x1012C, 0x10130}, |
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| 336 | + {0x10138, 0x10144}, |
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| 337 | + {0x10200, 0x10220}, |
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| 338 | + {0x10230, 0x10250}, |
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| 339 | + {0x10260, 0x10280}, |
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| 340 | + {0x10290, 0x102B0}, |
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| 341 | + {0x102C0, 0x102DC}, |
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| 342 | + {0x102E0, 0x102F4}, |
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| 343 | + {0x102FC, 0x1037C}, |
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| 344 | + {0x10380, 0x10390}, |
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| 345 | + {0x10800, 0x10828}, |
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| 346 | + {0x10840, 0x10844}, |
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| 347 | + {0x10880, 0x10884}, |
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| 348 | + {0x108C0, 0x108E8}, |
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| 349 | + {0x10900, 0x10928}, |
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| 350 | + {0x10940, 0x10944}, |
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| 351 | + {0x10980, 0x10984}, |
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| 352 | + {0x109C0, 0x109E8}, |
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| 353 | + {0x10A00, 0x10A28}, |
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| 354 | + {0x10A40, 0x10A50}, |
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| 355 | + {0x11000, 0x11028}, |
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| 356 | + {0x11030, 0x11034}, |
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| 357 | + {0x11038, 0x11068}, |
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| 358 | + {0x11070, 0x11074}, |
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| 359 | + {0x11078, 0x110A8}, |
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| 360 | + {0x110B0, 0x110B4}, |
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| 361 | + {0x110B8, 0x110E8}, |
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| 362 | + {0x110F0, 0x110F4}, |
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| 363 | + {0x110F8, 0x11128}, |
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| 364 | + {0x11138, 0x11144}, |
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| 365 | + {0x11178, 0x11180}, |
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| 366 | + {0x111B8, 0x111C0}, |
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| 367 | + {0x111F8, 0x11200}, |
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| 368 | + {0x11238, 0x1123C}, |
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| 369 | + {0x11270, 0x11274}, |
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| 370 | + {0x11278, 0x1127C}, |
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| 371 | + {0x112B0, 0x112B4}, |
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| 372 | + {0x112B8, 0x112BC}, |
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| 373 | + {0x112F0, 0x112F4}, |
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| 374 | + {0x112F8, 0x112FC}, |
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| 375 | + {0x11338, 0x1133C}, |
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| 376 | + {0x11378, 0x1137C}, |
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| 377 | + {0x113B8, 0x113BC}, |
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| 378 | + {0x113F8, 0x113FC}, |
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| 379 | + {0x11438, 0x11440}, |
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| 380 | + {0x11478, 0x11480}, |
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| 381 | + {0x114B8, 0x114BC}, |
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| 382 | + {0x114F8, 0x114FC}, |
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| 383 | + {0x11538, 0x1153C}, |
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| 384 | + {0x11578, 0x1157C}, |
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| 385 | + {0x115B8, 0x115BC}, |
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| 386 | + {0x115F8, 0x115FC}, |
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| 387 | + {0x11638, 0x1163C}, |
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| 388 | + {0x11678, 0x1167C}, |
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| 389 | + {0x116B8, 0x116BC}, |
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| 390 | + {0x116F8, 0x116FC}, |
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| 391 | + {0x11738, 0x1173C}, |
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| 392 | + {0x11778, 0x1177C}, |
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| 393 | + {0x117B8, 0x117BC}, |
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| 394 | + {0x117F8, 0x117FC}, |
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| 395 | + {0x17000, 0x1701C}, |
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| 396 | + {0x17020, 0x170AC}, |
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| 397 | + {0x18000, 0x18050}, |
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| 398 | + {0x18054, 0x18074}, |
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| 399 | + {0x18080, 0x180D4}, |
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| 400 | + {0x180DC, 0x18104}, |
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| 401 | + {0x18108, 0x1813C}, |
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| 402 | + {0x18144, 0x18148}, |
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| 403 | + {0x18168, 0x18174}, |
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| 404 | + {0x18178, 0x18180}, |
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| 405 | + {0x181C8, 0x181E0}, |
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| 406 | + {0x181E4, 0x181E8}, |
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| 407 | + {0x181EC, 0x1820C}, |
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| 408 | + {0x1825C, 0x18280}, |
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| 409 | + {0x18284, 0x18290}, |
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| 410 | + {0x18294, 0x182A0}, |
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| 411 | + {0x18300, 0x18304}, |
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| 412 | + {0x18314, 0x18320}, |
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| 413 | + {0x18328, 0x18350}, |
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| 414 | + {0x1835C, 0x1836C}, |
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| 415 | + {0x18370, 0x18390}, |
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| 416 | + {0x18398, 0x183AC}, |
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| 417 | + {0x183BC, 0x183D8}, |
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| 418 | + {0x183DC, 0x183F4}, |
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| 419 | + {0x18400, 0x186F4}, |
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| 420 | + {0x186F8, 0x1871C}, |
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| 421 | + {0x18720, 0x18790}, |
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| 422 | + {0x19800, 0x19830}, |
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| 423 | + {0x19834, 0x19840}, |
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| 424 | + {0x19880, 0x1989C}, |
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| 425 | + {0x198A4, 0x198B0}, |
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| 426 | + {0x198BC, 0x19900}, |
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| 427 | + {0x19C00, 0x19C88}, |
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| 428 | + {0x19D00, 0x19D20}, |
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| 429 | + {0x19E00, 0x19E7C}, |
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| 430 | + {0x19E80, 0x19E94}, |
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| 431 | + {0x19E98, 0x19EAC}, |
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| 432 | + {0x19EB0, 0x19EBC}, |
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| 433 | + {0x19F70, 0x19F74}, |
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| 434 | + {0x19F80, 0x19F8C}, |
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| 435 | + {0x19FA0, 0x19FB4}, |
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| 436 | + {0x19FC0, 0x19FD8}, |
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| 437 | + {0x1A000, 0x1A200}, |
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| 438 | + {0x1A204, 0x1A210}, |
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| 439 | + {0x1A228, 0x1A22C}, |
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| 440 | + {0x1A230, 0x1A248}, |
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| 441 | + {0x1A250, 0x1A270}, |
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| 442 | + {0x1A280, 0x1A290}, |
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| 443 | + {0x1A2A0, 0x1A2A4}, |
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| 444 | + {0x1A2C0, 0x1A2EC}, |
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| 445 | + {0x1A300, 0x1A3BC}, |
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| 446 | + {0x1A3F0, 0x1A3F4}, |
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| 447 | + {0x1A3F8, 0x1A434}, |
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| 448 | + {0x1A438, 0x1A444}, |
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| 449 | + {0x1A448, 0x1A468}, |
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| 450 | + {0x1A580, 0x1A58C}, |
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| 451 | + {0x1A644, 0x1A654}, |
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| 452 | + {0x1A670, 0x1A698}, |
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| 453 | + {0x1A6AC, 0x1A6B0}, |
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| 454 | + {0x1A6D0, 0x1A6D4}, |
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| 455 | + {0x1A6EC, 0x1A70C}, |
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| 456 | + {0x1A710, 0x1A738}, |
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| 457 | + {0x1A7C0, 0x1A7D0}, |
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| 458 | + {0x1A7D4, 0x1A7D8}, |
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| 459 | + {0x1A7DC, 0x1A7E4}, |
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| 460 | + {0x1A7F0, 0x1A7F8}, |
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| 461 | + {0x1A888, 0x1A89C}, |
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| 462 | + {0x1A8A8, 0x1A8AC}, |
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| 463 | + {0x1A8C0, 0x1A8DC}, |
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| 464 | + {0x1A8F0, 0x1A8FC}, |
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| 465 | + {0x1AE04, 0x1AE08}, |
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| 466 | + {0x1AE18, 0x1AE24}, |
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| 467 | + {0x1AF80, 0x1AF8C}, |
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| 468 | + {0x1AFA0, 0x1AFB4}, |
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| 469 | + {0x1B000, 0x1B200}, |
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| 470 | + {0x1B284, 0x1B288}, |
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| 471 | + {0x1B2D0, 0x1B2D8}, |
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| 472 | + {0x1B2DC, 0x1B2EC}, |
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| 473 | + {0x1B300, 0x1B340}, |
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| 474 | + {0x1B374, 0x1B378}, |
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| 475 | + {0x1B380, 0x1B384}, |
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| 476 | + {0x1B388, 0x1B38C}, |
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| 477 | + {0x1B404, 0x1B408}, |
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| 478 | + {0x1B420, 0x1B428}, |
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| 479 | + {0x1B440, 0x1B444}, |
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| 480 | + {0x1B448, 0x1B44C}, |
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| 481 | + {0x1B450, 0x1B458}, |
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| 482 | + {0x1B45C, 0x1B468}, |
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| 483 | + {0x1B584, 0x1B58C}, |
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| 484 | + {0x1B68C, 0x1B690}, |
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| 485 | + {0x1B6AC, 0x1B6B0}, |
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| 486 | + {0x1B7F0, 0x1B7F8}, |
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| 487 | + {0x1C800, 0x1CC00}, |
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| 488 | + {0x1CE00, 0x1CE04}, |
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| 489 | + {0x1CF80, 0x1CF84}, |
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| 490 | + {0x1D200, 0x1D800}, |
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| 491 | + {0x1E000, 0x20014}, |
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| 492 | + {0x20100, 0x20124}, |
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| 493 | + {0x21400, 0x217A8}, |
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| 494 | + {0x21800, 0x21BA8}, |
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| 495 | + {0x21C00, 0x21FA8}, |
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| 496 | + {0x22000, 0x223A8}, |
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| 497 | + {0x22400, 0x227A8}, |
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| 498 | + {0x22800, 0x22BA8}, |
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| 499 | + {0x22C00, 0x22FA8}, |
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| 500 | + {0x23000, 0x233A8}, |
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| 501 | + {0x24000, 0x24034}, |
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| 502 | + |
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| 503 | + /* EFUSE0,1,2 is disabled here |
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| 504 | + * because its state may be reset |
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| 505 | + * |
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| 506 | + * {0x24800, 0x24804}, |
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| 507 | + * {0x25000, 0x25004}, |
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| 508 | + * {0x25800, 0x25804}, |
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| 509 | + */ |
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| 510 | + |
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| 511 | + {0x26000, 0x26064}, |
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| 512 | + {0x27000, 0x27024}, |
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| 513 | + {0x34000, 0x3400C}, |
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| 514 | + {0x34400, 0x3445C}, |
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| 515 | + {0x34800, 0x3485C}, |
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| 516 | + {0x34C00, 0x34C5C}, |
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| 517 | + {0x35000, 0x3505C}, |
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| 518 | + {0x35400, 0x3545C}, |
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| 519 | + {0x35800, 0x3585C}, |
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| 520 | + {0x35C00, 0x35C5C}, |
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| 521 | + {0x36000, 0x3605C}, |
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| 522 | + {0x38000, 0x38064}, |
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| 523 | + {0x38070, 0x380E0}, |
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| 524 | + {0x3A000, 0x3A074}, |
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| 525 | + |
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| 526 | + /* DBI windows is skipped here, it can be only accessed when pcie |
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| 527 | + * is active (not in reset) and CORE_CTRL_PCIE_LTSSM_EN = 0 && |
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| 528 | + * PCIE_CTRL_APP_LTSSM_ENALBE=0. |
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| 529 | + * {0x3C000 , 0x3C004}, |
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| 530 | + */ |
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| 531 | + |
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| 532 | + {0x40000, 0x400A4}, |
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| 533 | + |
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| 534 | + /* SI register is skiped here. |
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| 535 | + * Because it will cause bus hang |
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| 536 | + * |
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| 537 | + * {0x50000, 0x50018}, |
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| 538 | + */ |
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| 539 | + |
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280 | 540 | {0x80000, 0x8000C}, |
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281 | 541 | {0x80010, 0x80020}, |
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282 | 542 | }; |
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.. | .. |
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613 | 873 | }, |
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614 | 874 | }; |
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615 | 875 | |
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| 876 | +static const struct ath10k_mem_region qca6174_hw30_sdio_mem_regions[] = { |
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| 877 | + { |
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| 878 | + .type = ATH10K_MEM_REGION_TYPE_DRAM, |
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| 879 | + .start = 0x400000, |
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| 880 | + .len = 0xa8000, |
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| 881 | + .name = "DRAM", |
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| 882 | + .section_table = { |
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| 883 | + .sections = NULL, |
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| 884 | + .size = 0, |
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| 885 | + }, |
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| 886 | + }, |
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| 887 | + { |
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| 888 | + .type = ATH10K_MEM_REGION_TYPE_AXI, |
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| 889 | + .start = 0xa0000, |
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| 890 | + .len = 0x18000, |
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| 891 | + .name = "AXI", |
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| 892 | + .section_table = { |
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| 893 | + .sections = NULL, |
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| 894 | + .size = 0, |
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| 895 | + }, |
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| 896 | + }, |
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| 897 | + { |
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| 898 | + .type = ATH10K_MEM_REGION_TYPE_IRAM1, |
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| 899 | + .start = 0x00980000, |
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| 900 | + .len = 0x00080000, |
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| 901 | + .name = "IRAM1", |
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| 902 | + .section_table = { |
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| 903 | + .sections = NULL, |
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| 904 | + .size = 0, |
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| 905 | + }, |
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| 906 | + }, |
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| 907 | + { |
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| 908 | + .type = ATH10K_MEM_REGION_TYPE_IRAM2, |
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| 909 | + .start = 0x00a00000, |
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| 910 | + .len = 0x00040000, |
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| 911 | + .name = "IRAM2", |
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| 912 | + .section_table = { |
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| 913 | + .sections = NULL, |
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| 914 | + .size = 0, |
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| 915 | + }, |
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| 916 | + }, |
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| 917 | + { |
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| 918 | + .type = ATH10K_MEM_REGION_TYPE_REG, |
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| 919 | + .start = 0x800, |
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| 920 | + .len = 0x80020 - 0x800, |
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| 921 | + .name = "REG_TOTAL", |
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| 922 | + .section_table = { |
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| 923 | + .sections = qca6174_hw30_sdio_register_sections, |
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| 924 | + .size = ARRAY_SIZE(qca6174_hw30_sdio_register_sections), |
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| 925 | + }, |
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| 926 | + }, |
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| 927 | +}; |
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| 928 | + |
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616 | 929 | static const struct ath10k_mem_region qca6174_hw30_mem_regions[] = { |
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617 | 930 | { |
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618 | 931 | .type = ATH10K_MEM_REGION_TYPE_DRAM, |
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.. | .. |
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714 | 1027 | }, |
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715 | 1028 | { |
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716 | 1029 | .type = ATH10K_MEM_REGION_TYPE_REG, |
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717 | | - .start = 0x98000, |
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| 1030 | + .start = 0x980000, |
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718 | 1031 | .len = 0x50000, |
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719 | 1032 | .name = "IRAM", |
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720 | 1033 | .section_table = { |
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.. | .. |
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797 | 1110 | }, |
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798 | 1111 | { |
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799 | 1112 | .type = ATH10K_MEM_REGION_TYPE_REG, |
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800 | | - .start = 0x98000, |
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| 1113 | + .start = 0x980000, |
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801 | 1114 | .len = 0x50000, |
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802 | 1115 | .name = "IRAM", |
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803 | 1116 | .section_table = { |
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.. | .. |
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867 | 1180 | }, |
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868 | 1181 | }; |
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869 | 1182 | |
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| 1183 | +static const struct ath10k_mem_section ipq4019_soc_reg_range[] = { |
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| 1184 | + {0x080000, 0x080004}, |
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| 1185 | + {0x080020, 0x080024}, |
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| 1186 | + {0x080028, 0x080050}, |
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| 1187 | + {0x0800d4, 0x0800ec}, |
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| 1188 | + {0x08010c, 0x080118}, |
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| 1189 | + {0x080284, 0x080290}, |
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| 1190 | + {0x0802a8, 0x0802b8}, |
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| 1191 | + {0x0802dc, 0x08030c}, |
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| 1192 | + {0x082000, 0x083fff} |
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| 1193 | +}; |
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| 1194 | + |
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| 1195 | +static const struct ath10k_mem_region qca4019_hw10_mem_regions[] = { |
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| 1196 | + { |
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| 1197 | + .type = ATH10K_MEM_REGION_TYPE_DRAM, |
---|
| 1198 | + .start = 0x400000, |
---|
| 1199 | + .len = 0x68000, |
---|
| 1200 | + .name = "DRAM", |
---|
| 1201 | + .section_table = { |
---|
| 1202 | + .sections = NULL, |
---|
| 1203 | + .size = 0, |
---|
| 1204 | + }, |
---|
| 1205 | + }, |
---|
| 1206 | + { |
---|
| 1207 | + .type = ATH10K_MEM_REGION_TYPE_REG, |
---|
| 1208 | + .start = 0xC0000, |
---|
| 1209 | + .len = 0x40000, |
---|
| 1210 | + .name = "SRAM", |
---|
| 1211 | + .section_table = { |
---|
| 1212 | + .sections = NULL, |
---|
| 1213 | + .size = 0, |
---|
| 1214 | + }, |
---|
| 1215 | + }, |
---|
| 1216 | + { |
---|
| 1217 | + .type = ATH10K_MEM_REGION_TYPE_REG, |
---|
| 1218 | + .start = 0x980000, |
---|
| 1219 | + .len = 0x50000, |
---|
| 1220 | + .name = "IRAM", |
---|
| 1221 | + .section_table = { |
---|
| 1222 | + .sections = NULL, |
---|
| 1223 | + .size = 0, |
---|
| 1224 | + }, |
---|
| 1225 | + }, |
---|
| 1226 | + { |
---|
| 1227 | + .type = ATH10K_MEM_REGION_TYPE_IOREG, |
---|
| 1228 | + .start = 0x30000, |
---|
| 1229 | + .len = 0x7000, |
---|
| 1230 | + .name = "APB REG 1", |
---|
| 1231 | + .section_table = { |
---|
| 1232 | + .sections = NULL, |
---|
| 1233 | + .size = 0, |
---|
| 1234 | + }, |
---|
| 1235 | + }, |
---|
| 1236 | + { |
---|
| 1237 | + .type = ATH10K_MEM_REGION_TYPE_IOREG, |
---|
| 1238 | + .start = 0x3f000, |
---|
| 1239 | + .len = 0x3000, |
---|
| 1240 | + .name = "APB REG 2", |
---|
| 1241 | + .section_table = { |
---|
| 1242 | + .sections = NULL, |
---|
| 1243 | + .size = 0, |
---|
| 1244 | + }, |
---|
| 1245 | + }, |
---|
| 1246 | + { |
---|
| 1247 | + .type = ATH10K_MEM_REGION_TYPE_IOREG, |
---|
| 1248 | + .start = 0x43000, |
---|
| 1249 | + .len = 0x3000, |
---|
| 1250 | + .name = "WIFI REG", |
---|
| 1251 | + .section_table = { |
---|
| 1252 | + .sections = NULL, |
---|
| 1253 | + .size = 0, |
---|
| 1254 | + }, |
---|
| 1255 | + }, |
---|
| 1256 | + { |
---|
| 1257 | + .type = ATH10K_MEM_REGION_TYPE_IOREG, |
---|
| 1258 | + .start = 0x4A000, |
---|
| 1259 | + .len = 0x5000, |
---|
| 1260 | + .name = "CE REG", |
---|
| 1261 | + .section_table = { |
---|
| 1262 | + .sections = NULL, |
---|
| 1263 | + .size = 0, |
---|
| 1264 | + }, |
---|
| 1265 | + }, |
---|
| 1266 | + { |
---|
| 1267 | + .type = ATH10K_MEM_REGION_TYPE_REG, |
---|
| 1268 | + .start = 0x080000, |
---|
| 1269 | + .len = 0x083fff - 0x080000, |
---|
| 1270 | + .name = "REG_TOTAL", |
---|
| 1271 | + .section_table = { |
---|
| 1272 | + .sections = ipq4019_soc_reg_range, |
---|
| 1273 | + .size = ARRAY_SIZE(ipq4019_soc_reg_range), |
---|
| 1274 | + }, |
---|
| 1275 | + }, |
---|
| 1276 | +}; |
---|
| 1277 | + |
---|
| 1278 | +static const struct ath10k_mem_region wcn399x_hw10_mem_regions[] = { |
---|
| 1279 | + { |
---|
| 1280 | + /* MSA region start is not fixed, hence it is assigned at runtime */ |
---|
| 1281 | + .type = ATH10K_MEM_REGION_TYPE_MSA, |
---|
| 1282 | + .len = 0x100000, |
---|
| 1283 | + .name = "DRAM", |
---|
| 1284 | + .section_table = { |
---|
| 1285 | + .sections = NULL, |
---|
| 1286 | + .size = 0, |
---|
| 1287 | + }, |
---|
| 1288 | + }, |
---|
| 1289 | +}; |
---|
| 1290 | + |
---|
870 | 1291 | static const struct ath10k_hw_mem_layout hw_mem_layouts[] = { |
---|
871 | 1292 | { |
---|
872 | 1293 | .hw_id = QCA6174_HW_1_0_VERSION, |
---|
| 1294 | + .hw_rev = ATH10K_HW_QCA6174, |
---|
| 1295 | + .bus = ATH10K_BUS_PCI, |
---|
873 | 1296 | .region_table = { |
---|
874 | 1297 | .regions = qca6174_hw10_mem_regions, |
---|
875 | 1298 | .size = ARRAY_SIZE(qca6174_hw10_mem_regions), |
---|
.. | .. |
---|
877 | 1300 | }, |
---|
878 | 1301 | { |
---|
879 | 1302 | .hw_id = QCA6174_HW_1_1_VERSION, |
---|
| 1303 | + .hw_rev = ATH10K_HW_QCA6174, |
---|
| 1304 | + .bus = ATH10K_BUS_PCI, |
---|
880 | 1305 | .region_table = { |
---|
881 | 1306 | .regions = qca6174_hw10_mem_regions, |
---|
882 | 1307 | .size = ARRAY_SIZE(qca6174_hw10_mem_regions), |
---|
.. | .. |
---|
884 | 1309 | }, |
---|
885 | 1310 | { |
---|
886 | 1311 | .hw_id = QCA6174_HW_1_3_VERSION, |
---|
| 1312 | + .hw_rev = ATH10K_HW_QCA6174, |
---|
| 1313 | + .bus = ATH10K_BUS_PCI, |
---|
887 | 1314 | .region_table = { |
---|
888 | 1315 | .regions = qca6174_hw10_mem_regions, |
---|
889 | 1316 | .size = ARRAY_SIZE(qca6174_hw10_mem_regions), |
---|
.. | .. |
---|
891 | 1318 | }, |
---|
892 | 1319 | { |
---|
893 | 1320 | .hw_id = QCA6174_HW_2_1_VERSION, |
---|
| 1321 | + .hw_rev = ATH10K_HW_QCA6174, |
---|
| 1322 | + .bus = ATH10K_BUS_PCI, |
---|
894 | 1323 | .region_table = { |
---|
895 | 1324 | .regions = qca6174_hw21_mem_regions, |
---|
896 | 1325 | .size = ARRAY_SIZE(qca6174_hw21_mem_regions), |
---|
.. | .. |
---|
898 | 1327 | }, |
---|
899 | 1328 | { |
---|
900 | 1329 | .hw_id = QCA6174_HW_3_0_VERSION, |
---|
| 1330 | + .hw_rev = ATH10K_HW_QCA6174, |
---|
| 1331 | + .bus = ATH10K_BUS_PCI, |
---|
901 | 1332 | .region_table = { |
---|
902 | 1333 | .regions = qca6174_hw30_mem_regions, |
---|
903 | 1334 | .size = ARRAY_SIZE(qca6174_hw30_mem_regions), |
---|
.. | .. |
---|
905 | 1336 | }, |
---|
906 | 1337 | { |
---|
907 | 1338 | .hw_id = QCA6174_HW_3_2_VERSION, |
---|
| 1339 | + .hw_rev = ATH10K_HW_QCA6174, |
---|
| 1340 | + .bus = ATH10K_BUS_PCI, |
---|
908 | 1341 | .region_table = { |
---|
909 | 1342 | .regions = qca6174_hw30_mem_regions, |
---|
910 | 1343 | .size = ARRAY_SIZE(qca6174_hw30_mem_regions), |
---|
911 | 1344 | }, |
---|
912 | 1345 | }, |
---|
913 | 1346 | { |
---|
| 1347 | + .hw_id = QCA6174_HW_3_2_VERSION, |
---|
| 1348 | + .hw_rev = ATH10K_HW_QCA6174, |
---|
| 1349 | + .bus = ATH10K_BUS_SDIO, |
---|
| 1350 | + .region_table = { |
---|
| 1351 | + .regions = qca6174_hw30_sdio_mem_regions, |
---|
| 1352 | + .size = ARRAY_SIZE(qca6174_hw30_sdio_mem_regions), |
---|
| 1353 | + }, |
---|
| 1354 | + }, |
---|
| 1355 | + { |
---|
914 | 1356 | .hw_id = QCA9377_HW_1_1_DEV_VERSION, |
---|
| 1357 | + .hw_rev = ATH10K_HW_QCA9377, |
---|
| 1358 | + .bus = ATH10K_BUS_PCI, |
---|
915 | 1359 | .region_table = { |
---|
916 | 1360 | .regions = qca6174_hw30_mem_regions, |
---|
917 | 1361 | .size = ARRAY_SIZE(qca6174_hw30_mem_regions), |
---|
.. | .. |
---|
919 | 1363 | }, |
---|
920 | 1364 | { |
---|
921 | 1365 | .hw_id = QCA988X_HW_2_0_VERSION, |
---|
| 1366 | + .hw_rev = ATH10K_HW_QCA988X, |
---|
| 1367 | + .bus = ATH10K_BUS_PCI, |
---|
922 | 1368 | .region_table = { |
---|
923 | 1369 | .regions = qca988x_hw20_mem_regions, |
---|
924 | 1370 | .size = ARRAY_SIZE(qca988x_hw20_mem_regions), |
---|
.. | .. |
---|
926 | 1372 | }, |
---|
927 | 1373 | { |
---|
928 | 1374 | .hw_id = QCA9984_HW_1_0_DEV_VERSION, |
---|
| 1375 | + .hw_rev = ATH10K_HW_QCA9984, |
---|
| 1376 | + .bus = ATH10K_BUS_PCI, |
---|
929 | 1377 | .region_table = { |
---|
930 | 1378 | .regions = qca9984_hw10_mem_regions, |
---|
931 | 1379 | .size = ARRAY_SIZE(qca9984_hw10_mem_regions), |
---|
.. | .. |
---|
933 | 1381 | }, |
---|
934 | 1382 | { |
---|
935 | 1383 | .hw_id = QCA9888_HW_2_0_DEV_VERSION, |
---|
| 1384 | + .hw_rev = ATH10K_HW_QCA9888, |
---|
| 1385 | + .bus = ATH10K_BUS_PCI, |
---|
936 | 1386 | .region_table = { |
---|
937 | 1387 | .regions = qca9984_hw10_mem_regions, |
---|
938 | 1388 | .size = ARRAY_SIZE(qca9984_hw10_mem_regions), |
---|
.. | .. |
---|
940 | 1390 | }, |
---|
941 | 1391 | { |
---|
942 | 1392 | .hw_id = QCA99X0_HW_2_0_DEV_VERSION, |
---|
| 1393 | + .hw_rev = ATH10K_HW_QCA99X0, |
---|
| 1394 | + .bus = ATH10K_BUS_PCI, |
---|
943 | 1395 | .region_table = { |
---|
944 | 1396 | .regions = qca99x0_hw20_mem_regions, |
---|
945 | 1397 | .size = ARRAY_SIZE(qca99x0_hw20_mem_regions), |
---|
946 | 1398 | }, |
---|
947 | 1399 | }, |
---|
948 | | - |
---|
| 1400 | + { |
---|
| 1401 | + .hw_id = QCA4019_HW_1_0_DEV_VERSION, |
---|
| 1402 | + .hw_rev = ATH10K_HW_QCA4019, |
---|
| 1403 | + .bus = ATH10K_BUS_AHB, |
---|
| 1404 | + .region_table = { |
---|
| 1405 | + .regions = qca4019_hw10_mem_regions, |
---|
| 1406 | + .size = ARRAY_SIZE(qca4019_hw10_mem_regions), |
---|
| 1407 | + }, |
---|
| 1408 | + }, |
---|
| 1409 | + { |
---|
| 1410 | + .hw_id = WCN3990_HW_1_0_DEV_VERSION, |
---|
| 1411 | + .hw_rev = ATH10K_HW_WCN3990, |
---|
| 1412 | + .bus = ATH10K_BUS_SNOC, |
---|
| 1413 | + .region_table = { |
---|
| 1414 | + .regions = wcn399x_hw10_mem_regions, |
---|
| 1415 | + .size = ARRAY_SIZE(wcn399x_hw10_mem_regions), |
---|
| 1416 | + }, |
---|
| 1417 | + }, |
---|
949 | 1418 | }; |
---|
950 | 1419 | |
---|
951 | 1420 | static u32 ath10k_coredump_get_ramdump_size(struct ath10k *ar) |
---|
.. | .. |
---|
987 | 1456 | return NULL; |
---|
988 | 1457 | |
---|
989 | 1458 | for (i = 0; i < ARRAY_SIZE(hw_mem_layouts); i++) { |
---|
990 | | - if (ar->target_version == hw_mem_layouts[i].hw_id) |
---|
| 1459 | + if (ar->target_version == hw_mem_layouts[i].hw_id && |
---|
| 1460 | + ar->hw_rev == hw_mem_layouts[i].hw_rev && |
---|
| 1461 | + hw_mem_layouts[i].bus == ar->hif.bus) |
---|
991 | 1462 | return &hw_mem_layouts[i]; |
---|
992 | 1463 | } |
---|
993 | 1464 | |
---|
.. | .. |
---|
999 | 1470 | { |
---|
1000 | 1471 | struct ath10k_fw_crash_data *crash_data = ar->coredump.fw_crash_data; |
---|
1001 | 1472 | |
---|
1002 | | - lockdep_assert_held(&ar->data_lock); |
---|
| 1473 | + lockdep_assert_held(&ar->dump_mutex); |
---|
1003 | 1474 | |
---|
1004 | 1475 | if (ath10k_coredump_mask == 0) |
---|
1005 | 1476 | /* coredump disabled */ |
---|
.. | .. |
---|
1043 | 1514 | if (!buf) |
---|
1044 | 1515 | return NULL; |
---|
1045 | 1516 | |
---|
1046 | | - spin_lock_bh(&ar->data_lock); |
---|
| 1517 | + mutex_lock(&ar->dump_mutex); |
---|
1047 | 1518 | |
---|
1048 | 1519 | dump_data = (struct ath10k_dump_file_data *)(buf); |
---|
1049 | 1520 | strlcpy(dump_data->df_magic, "ATH10K-FW-DUMP", |
---|
.. | .. |
---|
1053 | 1524 | dump_data->version = cpu_to_le32(ATH10K_FW_CRASH_DUMP_VERSION); |
---|
1054 | 1525 | |
---|
1055 | 1526 | guid_copy(&dump_data->guid, &crash_data->guid); |
---|
1056 | | - dump_data->chip_id = cpu_to_le32(ar->chip_id); |
---|
| 1527 | + dump_data->chip_id = cpu_to_le32(ar->bus_param.chip_id); |
---|
1057 | 1528 | dump_data->bus_type = cpu_to_le32(0); |
---|
1058 | 1529 | dump_data->target_version = cpu_to_le32(ar->target_version); |
---|
1059 | 1530 | dump_data->fw_version_major = cpu_to_le32(ar->fw_version_major); |
---|
.. | .. |
---|
1089 | 1560 | if (test_bit(ATH10K_FW_CRASH_DUMP_CE_DATA, &ath10k_coredump_mask)) { |
---|
1090 | 1561 | dump_tlv = (struct ath10k_tlv_dump_data *)(buf + sofar); |
---|
1091 | 1562 | dump_tlv->type = cpu_to_le32(ATH10K_FW_CRASH_DUMP_CE_DATA); |
---|
1092 | | - dump_tlv->tlv_len = cpu_to_le32(sizeof(*ce_hdr) + |
---|
1093 | | - CE_COUNT * sizeof(ce_hdr->entries[0])); |
---|
| 1563 | + dump_tlv->tlv_len = cpu_to_le32(struct_size(ce_hdr, entries, |
---|
| 1564 | + CE_COUNT)); |
---|
1094 | 1565 | ce_hdr = (struct ath10k_ce_crash_hdr *)(dump_tlv->tlv_data); |
---|
1095 | 1566 | ce_hdr->ce_count = cpu_to_le32(CE_COUNT); |
---|
1096 | 1567 | memset(ce_hdr->reserved, 0, sizeof(ce_hdr->reserved)); |
---|
.. | .. |
---|
1112 | 1583 | } |
---|
1113 | 1584 | } |
---|
1114 | 1585 | |
---|
1115 | | - spin_unlock_bh(&ar->data_lock); |
---|
| 1586 | + mutex_unlock(&ar->dump_mutex); |
---|
1116 | 1587 | |
---|
1117 | 1588 | return dump_data; |
---|
1118 | 1589 | } |
---|