forked from ~ljy/RK356X_SDK_RELEASE

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hc
2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f 
 kernel/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h
....@@ -11,8 +11,8 @@
1111  */
1212 
1313 #define I40E_FW_API_VERSION_MAJOR	0x0001
14
-#define I40E_FW_API_VERSION_MINOR_X722	0x0005
15
-#define I40E_FW_API_VERSION_MINOR_X710	0x0007
14
+#define I40E_FW_API_VERSION_MINOR_X722	0x0009
15
+#define I40E_FW_API_VERSION_MINOR_X710	0x0009
1616 
1717 #define I40E_FW_MINOR_VERSION(_h) ((_h)->mac.type == I40E_MAC_XL710 ? \
1818 					I40E_FW_API_VERSION_MINOR_X710 : \
....@@ -20,6 +20,12 @@
2020 
2121 /* API version 1.7 implements additional link and PHY-specific APIs  */
2222 #define I40E_MINOR_VER_GET_LINK_INFO_XL710 0x0007
23
+/* API version 1.9 for X722 implements additional link and PHY-specific APIs */
24
+#define I40E_MINOR_VER_GET_LINK_INFO_X722 0x0009
25
+/* API version 1.6 for X722 devices adds ability to stop FW LLDP agent */
26
+#define I40E_MINOR_VER_FW_LLDP_STOPPABLE_X722 0x0006
27
+/* API version 1.10 for X722 devices adds ability to request FEC encoding */
28
+#define I40E_MINOR_VER_FW_REQUEST_FEC_X722 0x000A
2329 
2430 struct i40e_aq_desc {
2531 	__le16 flags;
....@@ -51,29 +57,17 @@
5157  */
5258 
5359 /* command flags and offsets*/
54
-#define I40E_AQ_FLAG_DD_SHIFT	0
55
-#define I40E_AQ_FLAG_CMP_SHIFT	1
5660 #define I40E_AQ_FLAG_ERR_SHIFT	2
57
-#define I40E_AQ_FLAG_VFE_SHIFT	3
5861 #define I40E_AQ_FLAG_LB_SHIFT	9
5962 #define I40E_AQ_FLAG_RD_SHIFT	10
60
-#define I40E_AQ_FLAG_VFC_SHIFT	11
6163 #define I40E_AQ_FLAG_BUF_SHIFT	12
6264 #define I40E_AQ_FLAG_SI_SHIFT	13
63
-#define I40E_AQ_FLAG_EI_SHIFT	14
64
-#define I40E_AQ_FLAG_FE_SHIFT	15
6565 
66
-#define I40E_AQ_FLAG_DD		BIT(I40E_AQ_FLAG_DD_SHIFT)  /* 0x1    */
67
-#define I40E_AQ_FLAG_CMP	BIT(I40E_AQ_FLAG_CMP_SHIFT) /* 0x2    */
6866 #define I40E_AQ_FLAG_ERR	BIT(I40E_AQ_FLAG_ERR_SHIFT) /* 0x4    */
69
-#define I40E_AQ_FLAG_VFE	BIT(I40E_AQ_FLAG_VFE_SHIFT) /* 0x8    */
7067 #define I40E_AQ_FLAG_LB		BIT(I40E_AQ_FLAG_LB_SHIFT)  /* 0x200  */
7168 #define I40E_AQ_FLAG_RD		BIT(I40E_AQ_FLAG_RD_SHIFT)  /* 0x400  */
72
-#define I40E_AQ_FLAG_VFC	BIT(I40E_AQ_FLAG_VFC_SHIFT) /* 0x800  */
7369 #define I40E_AQ_FLAG_BUF	BIT(I40E_AQ_FLAG_BUF_SHIFT) /* 0x1000 */
7470 #define I40E_AQ_FLAG_SI		BIT(I40E_AQ_FLAG_SI_SHIFT)  /* 0x2000 */
75
-#define I40E_AQ_FLAG_EI		BIT(I40E_AQ_FLAG_EI_SHIFT)  /* 0x4000 */
76
-#define I40E_AQ_FLAG_FE		BIT(I40E_AQ_FLAG_FE_SHIFT)  /* 0x8000 */
7771 
7872 /* error codes */
7973 enum i40e_admin_queue_err {
....@@ -259,6 +253,7 @@
259253 	i40e_aqc_opc_get_cee_dcb_cfg	= 0x0A07,
260254 	i40e_aqc_opc_lldp_set_local_mib	= 0x0A08,
261255 	i40e_aqc_opc_lldp_stop_start_spec_agent	= 0x0A09,
256
+	i40e_aqc_opc_lldp_restore		= 0x0A0A,
262257 
263258 	/* Tunnel commands */
264259 	i40e_aqc_opc_add_udp_tunnel	= 0x0B00,
....@@ -357,13 +352,6 @@
357352 /* Request resource ownership (direct 0x0008)
358353  * Release resource ownership (direct 0x0009)
359354  */
360
-#define I40E_AQ_RESOURCE_NVM			1
361
-#define I40E_AQ_RESOURCE_SDP			2
362
-#define I40E_AQ_RESOURCE_ACCESS_READ		1
363
-#define I40E_AQ_RESOURCE_ACCESS_WRITE		2
364
-#define I40E_AQ_RESOURCE_NVM_READ_TIMEOUT	3000
365
-#define I40E_AQ_RESOURCE_NVM_WRITE_TIMEOUT	180000
366
-
367355 struct i40e_aqc_request_resource {
368356 	__le16	resource_id;
369357 	__le16	access_type;
....@@ -379,7 +367,6 @@
379367  */
380368 struct i40e_aqc_list_capabilites {
381369 	u8 command_flags;
382
-#define I40E_AQ_LIST_CAP_PF_INDEX_EN	1
383370 	u8 pf_index;
384371 	u8 reserved[2];
385372 	__le32 count;
....@@ -406,8 +393,6 @@
406393 #define I40E_AQ_CAP_ID_NPAR_ACTIVE	0x0003
407394 #define I40E_AQ_CAP_ID_OS2BMC_CAP	0x0004
408395 #define I40E_AQ_CAP_ID_FUNCTIONS_VALID	0x0005
409
-#define I40E_AQ_CAP_ID_ALTERNATE_RAM	0x0006
410
-#define I40E_AQ_CAP_ID_WOL_AND_PROXY	0x0008
411396 #define I40E_AQ_CAP_ID_SRIOV		0x0012
412397 #define I40E_AQ_CAP_ID_VF		0x0013
413398 #define I40E_AQ_CAP_ID_VMDQ		0x0014
....@@ -436,11 +421,6 @@
436421 /* Set CPPM Configuration (direct 0x0103) */
437422 struct i40e_aqc_cppm_configuration {
438423 	__le16	command_flags;
439
-#define I40E_AQ_CPPM_EN_LTRC	0x0800
440
-#define I40E_AQ_CPPM_EN_DMCTH	0x1000
441
-#define I40E_AQ_CPPM_EN_DMCTLX	0x2000
442
-#define I40E_AQ_CPPM_EN_HPTC	0x4000
443
-#define I40E_AQ_CPPM_EN_DMARC	0x8000
444424 	__le16	ttlx;
445425 	__le32	dmacr;
446426 	__le16	dmcth;
....@@ -454,15 +434,8 @@
454434 /* Set ARP Proxy command / response (indirect 0x0104) */
455435 struct i40e_aqc_arp_proxy_data {
456436 	__le16	command_flags;
457
-#define I40E_AQ_ARP_INIT_IPV4	0x0800
458
-#define I40E_AQ_ARP_UNSUP_CTL	0x1000
459
-#define I40E_AQ_ARP_ENA		0x2000
460
-#define I40E_AQ_ARP_ADD_IPV4	0x4000
461
-#define I40E_AQ_ARP_DEL_IPV4	0x8000
462437 	__le16	table_id;
463438 	__le32	enabled_offloads;
464
-#define I40E_AQ_ARP_DIRECTED_OFFLOAD_ENABLE	0x00000020
465
-#define I40E_AQ_ARP_OFFLOAD_ENABLE		0x00000800
466439 	__le32	ip_addr;
467440 	u8	mac_addr[6];
468441 	u8	reserved[2];
....@@ -477,19 +450,6 @@
477450 	__le16	table_idx_ipv6_0;
478451 	__le16	table_idx_ipv6_1;
479452 	__le16	control;
480
-#define I40E_AQ_NS_PROXY_ADD_0		0x0001
481
-#define I40E_AQ_NS_PROXY_DEL_0		0x0002
482
-#define I40E_AQ_NS_PROXY_ADD_1		0x0004
483
-#define I40E_AQ_NS_PROXY_DEL_1		0x0008
484
-#define I40E_AQ_NS_PROXY_ADD_IPV6_0	0x0010
485
-#define I40E_AQ_NS_PROXY_DEL_IPV6_0	0x0020
486
-#define I40E_AQ_NS_PROXY_ADD_IPV6_1	0x0040
487
-#define I40E_AQ_NS_PROXY_DEL_IPV6_1	0x0080
488
-#define I40E_AQ_NS_PROXY_COMMAND_SEQ	0x0100
489
-#define I40E_AQ_NS_PROXY_INIT_IPV6_TBL	0x0200
490
-#define I40E_AQ_NS_PROXY_INIT_MAC_TBL	0x0400
491
-#define I40E_AQ_NS_PROXY_OFFLOAD_ENABLE	0x0800
492
-#define I40E_AQ_NS_PROXY_DIRECTED_OFFLOAD_ENABLE	0x1000
493453 	u8	mac_addr_0[6];
494454 	u8	mac_addr_1[6];
495455 	u8	local_mac_addr[6];
....@@ -502,7 +462,6 @@
502462 /* Manage LAA Command (0x0106) - obsolete */
503463 struct i40e_aqc_mng_laa {
504464 	__le16	command_flags;
505
-#define I40E_AQ_LAA_FLAG_WR	0x8000
506465 	u8	reserved[2];
507466 	__le32	sal;
508467 	__le16	sah;
....@@ -515,11 +474,7 @@
515474 struct i40e_aqc_mac_address_read {
516475 	__le16	command_flags;
517476 #define I40E_AQC_LAN_ADDR_VALID		0x10
518
-#define I40E_AQC_SAN_ADDR_VALID		0x20
519477 #define I40E_AQC_PORT_ADDR_VALID	0x40
520
-#define I40E_AQC_WOL_ADDR_VALID		0x80
521
-#define I40E_AQC_MC_MAG_EN_VALID	0x100
522
-#define I40E_AQC_ADDR_VALID_MASK	0x3F0
523478 	u8	reserved[6];
524479 	__le32	addr_high;
525480 	__le32	addr_low;
....@@ -543,9 +498,7 @@
543498 #define I40E_AQC_WOL_PRESERVE_ON_PFR	0x0200
544499 #define I40E_AQC_WRITE_TYPE_LAA_ONLY	0x0000
545500 #define I40E_AQC_WRITE_TYPE_LAA_WOL	0x4000
546
-#define I40E_AQC_WRITE_TYPE_PORT	0x8000
547501 #define I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG	0xC000
548
-#define I40E_AQC_WRITE_TYPE_MASK	0xC000
549502 
550503 	__le16	mac_sah;
551504 	__le32	mac_sal;
....@@ -568,22 +521,9 @@
568521 
569522 struct i40e_aqc_set_wol_filter {
570523 	__le16 filter_index;
571
-#define I40E_AQC_MAX_NUM_WOL_FILTERS	8
572
-#define I40E_AQC_SET_WOL_FILTER_TYPE_MAGIC_SHIFT	15
573
-#define I40E_AQC_SET_WOL_FILTER_TYPE_MAGIC_MASK	(0x1 << \
574
-		I40E_AQC_SET_WOL_FILTER_TYPE_MAGIC_SHIFT)
575524 
576
-#define I40E_AQC_SET_WOL_FILTER_INDEX_SHIFT		0
577
-#define I40E_AQC_SET_WOL_FILTER_INDEX_MASK	(0x7 << \
578
-		I40E_AQC_SET_WOL_FILTER_INDEX_SHIFT)
579525 	__le16 cmd_flags;
580
-#define I40E_AQC_SET_WOL_FILTER				0x8000
581
-#define I40E_AQC_SET_WOL_FILTER_NO_TCO_WOL		0x4000
582
-#define I40E_AQC_SET_WOL_FILTER_ACTION_CLEAR		0
583
-#define I40E_AQC_SET_WOL_FILTER_ACTION_SET		1
584526 	__le16 valid_flags;
585
-#define I40E_AQC_SET_WOL_FILTER_ACTION_VALID		0x8000
586
-#define I40E_AQC_SET_WOL_FILTER_NO_TCO_ACTION_VALID	0x4000
587527 	u8 reserved[2];
588528 	__le32	address_high;
589529 	__le32	address_low;
....@@ -603,12 +543,6 @@
603543 struct i40e_aqc_get_wake_reason_completion {
604544 	u8 reserved_1[2];
605545 	__le16 wake_reason;
606
-#define I40E_AQC_GET_WAKE_UP_REASON_WOL_REASON_MATCHED_INDEX_SHIFT	0
607
-#define I40E_AQC_GET_WAKE_UP_REASON_WOL_REASON_MATCHED_INDEX_MASK (0xFF << \
608
-		I40E_AQC_GET_WAKE_UP_REASON_WOL_REASON_MATCHED_INDEX_SHIFT)
609
-#define I40E_AQC_GET_WAKE_UP_REASON_WOL_REASON_RESERVED_SHIFT	8
610
-#define I40E_AQC_GET_WAKE_UP_REASON_WOL_REASON_RESERVED_MASK	(0xFF << \
611
-		I40E_AQC_GET_WAKE_UP_REASON_WOL_REASON_RESERVED_SHIFT)
612546 	u8 reserved_2[12];
613547 };
614548 
....@@ -641,25 +575,12 @@
641575 
642576 struct i40e_aqc_switch_config_element_resp {
643577 	u8	element_type;
644
-#define I40E_AQ_SW_ELEM_TYPE_MAC	1
645
-#define I40E_AQ_SW_ELEM_TYPE_PF		2
646
-#define I40E_AQ_SW_ELEM_TYPE_VF		3
647
-#define I40E_AQ_SW_ELEM_TYPE_EMP	4
648
-#define I40E_AQ_SW_ELEM_TYPE_BMC	5
649
-#define I40E_AQ_SW_ELEM_TYPE_PV		16
650
-#define I40E_AQ_SW_ELEM_TYPE_VEB	17
651
-#define I40E_AQ_SW_ELEM_TYPE_PA		18
652
-#define I40E_AQ_SW_ELEM_TYPE_VSI	19
653578 	u8	revision;
654
-#define I40E_AQ_SW_ELEM_REV_1		1
655579 	__le16	seid;
656580 	__le16	uplink_seid;
657581 	__le16	downlink_seid;
658582 	u8	reserved[3];
659583 	u8	connection_type;
660
-#define I40E_AQ_CONN_TYPE_REGULAR	0x1
661
-#define I40E_AQ_CONN_TYPE_DEFAULT	0x2
662
-#define I40E_AQ_CONN_TYPE_CASCADED	0x3
663584 	__le16	scheduler_id;
664585 	__le16	element_info;
665586 };
....@@ -692,12 +613,7 @@
692613 /* Set Port Parameters command (direct 0x0203) */
693614 struct i40e_aqc_set_port_parameters {
694615 	__le16	command_flags;
695
-#define I40E_AQ_SET_P_PARAMS_SAVE_BAD_PACKETS	1
696
-#define I40E_AQ_SET_P_PARAMS_PAD_SHORT_PACKETS	2 /* must set! */
697
-#define I40E_AQ_SET_P_PARAMS_DOUBLE_VLAN_ENA	4
698616 	__le16	bad_frame_vsi;
699
-#define I40E_AQ_SET_P_PARAMS_BFRAME_SEID_SHIFT	0x0
700
-#define I40E_AQ_SET_P_PARAMS_BFRAME_SEID_MASK	0x3FF
701617 	__le16	default_seid;        /* reserved for command */
702618 	u8	reserved[10];
703619 };
....@@ -717,25 +633,6 @@
717633 /* expect an array of these structs in the response buffer */
718634 struct i40e_aqc_switch_resource_alloc_element_resp {
719635 	u8	resource_type;
720
-#define I40E_AQ_RESOURCE_TYPE_VEB		0x0
721
-#define I40E_AQ_RESOURCE_TYPE_VSI		0x1
722
-#define I40E_AQ_RESOURCE_TYPE_MACADDR		0x2
723
-#define I40E_AQ_RESOURCE_TYPE_STAG		0x3
724
-#define I40E_AQ_RESOURCE_TYPE_ETAG		0x4
725
-#define I40E_AQ_RESOURCE_TYPE_MULTICAST_HASH	0x5
726
-#define I40E_AQ_RESOURCE_TYPE_UNICAST_HASH	0x6
727
-#define I40E_AQ_RESOURCE_TYPE_VLAN		0x7
728
-#define I40E_AQ_RESOURCE_TYPE_VSI_LIST_ENTRY	0x8
729
-#define I40E_AQ_RESOURCE_TYPE_ETAG_LIST_ENTRY	0x9
730
-#define I40E_AQ_RESOURCE_TYPE_VLAN_STAT_POOL	0xA
731
-#define I40E_AQ_RESOURCE_TYPE_MIRROR_RULE	0xB
732
-#define I40E_AQ_RESOURCE_TYPE_QUEUE_SETS	0xC
733
-#define I40E_AQ_RESOURCE_TYPE_VLAN_FILTERS	0xD
734
-#define I40E_AQ_RESOURCE_TYPE_INNER_MAC_FILTERS	0xF
735
-#define I40E_AQ_RESOURCE_TYPE_IP_FILTERS	0x10
736
-#define I40E_AQ_RESOURCE_TYPE_GRE_VN_KEYS	0x11
737
-#define I40E_AQ_RESOURCE_TYPE_VN2_KEYS		0x12
738
-#define I40E_AQ_RESOURCE_TYPE_TUNNEL_PORTS	0x13
739636 	u8	reserved1;
740637 	__le16	guaranteed;
741638 	__le16	total;
....@@ -751,7 +648,6 @@
751648 	__le16	flags;
752649 /* flags used for both fields below */
753650 #define I40E_AQ_SET_SWITCH_CFG_PROMISC		0x0001
754
-#define I40E_AQ_SET_SWITCH_CFG_L2_FILTER	0x0002
755651 	__le16	valid_flags;
756652 	/* The ethertype in switch_tag is dropped on ingress and used
757653 	 * internally by the switch. Set this to zero for the default
....@@ -784,17 +680,10 @@
784680 	 */
785681 #define I40E_AQ_SET_SWITCH_BIT7_VALID		0x80
786682 
787
-#define I40E_AQ_SET_SWITCH_L4_SRC_PORT		0x40
788683 
789
-#define I40E_AQ_SET_SWITCH_L4_TYPE_RSVD		0x00
790684 #define I40E_AQ_SET_SWITCH_L4_TYPE_TCP		0x10
791
-#define I40E_AQ_SET_SWITCH_L4_TYPE_UDP		0x20
792
-#define I40E_AQ_SET_SWITCH_L4_TYPE_BOTH		0x30
793685 
794
-#define I40E_AQ_SET_SWITCH_MODE_DEFAULT		0x00
795
-#define I40E_AQ_SET_SWITCH_MODE_L4_PORT		0x01
796686 #define I40E_AQ_SET_SWITCH_MODE_NON_TUNNEL	0x02
797
-#define I40E_AQ_SET_SWITCH_MODE_TUNNEL		0x03
798687 	u8	mode;
799688 	u8	rsvd5[5];
800689 };
....@@ -829,19 +718,13 @@
829718 	__le16	uplink_seid;
830719 	u8	connection_type;
831720 #define I40E_AQ_VSI_CONN_TYPE_NORMAL	0x1
832
-#define I40E_AQ_VSI_CONN_TYPE_DEFAULT	0x2
833
-#define I40E_AQ_VSI_CONN_TYPE_CASCADED	0x3
834721 	u8	reserved1;
835722 	u8	vf_id;
836723 	u8	reserved2;
837724 	__le16	vsi_flags;
838
-#define I40E_AQ_VSI_TYPE_SHIFT		0x0
839
-#define I40E_AQ_VSI_TYPE_MASK		(0x3 << I40E_AQ_VSI_TYPE_SHIFT)
840725 #define I40E_AQ_VSI_TYPE_VF		0x0
841726 #define I40E_AQ_VSI_TYPE_VMDQ2		0x1
842727 #define I40E_AQ_VSI_TYPE_PF		0x2
843
-#define I40E_AQ_VSI_TYPE_EMP_MNG	0x3
844
-#define I40E_AQ_VSI_FLAG_CASCADED_PV	0x4
845728 	__le32	addr_high;
846729 	__le32	addr_low;
847730 };
....@@ -865,24 +748,18 @@
865748 #define I40E_AQ_VSI_PROP_SWITCH_VALID		0x0001
866749 #define I40E_AQ_VSI_PROP_SECURITY_VALID		0x0002
867750 #define I40E_AQ_VSI_PROP_VLAN_VALID		0x0004
868
-#define I40E_AQ_VSI_PROP_CAS_PV_VALID		0x0008
869
-#define I40E_AQ_VSI_PROP_INGRESS_UP_VALID	0x0010
870
-#define I40E_AQ_VSI_PROP_EGRESS_UP_VALID	0x0020
871751 #define I40E_AQ_VSI_PROP_QUEUE_MAP_VALID	0x0040
872752 #define I40E_AQ_VSI_PROP_QUEUE_OPT_VALID	0x0080
873
-#define I40E_AQ_VSI_PROP_OUTER_UP_VALID		0x0100
874753 #define I40E_AQ_VSI_PROP_SCHED_VALID		0x0200
875754 	/* switch section */
876755 	__le16	switch_id; /* 12bit id combined with flags below */
877756 #define I40E_AQ_VSI_SW_ID_SHIFT		0x0000
878757 #define I40E_AQ_VSI_SW_ID_MASK		(0xFFF << I40E_AQ_VSI_SW_ID_SHIFT)
879
-#define I40E_AQ_VSI_SW_ID_FLAG_NOT_STAG	0x1000
880758 #define I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB	0x2000
881759 #define I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB	0x4000
882760 	u8	sw_reserved[2];
883761 	/* security section */
884762 	u8	sec_flags;
885
-#define I40E_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD	0x01
886763 #define I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK	0x02
887764 #define I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK	0x04
888765 	u8	sec_reserved;
....@@ -894,78 +771,33 @@
894771 #define I40E_AQ_VSI_PVLAN_MODE_MASK	(0x03 << \
895772 					 I40E_AQ_VSI_PVLAN_MODE_SHIFT)
896773 #define I40E_AQ_VSI_PVLAN_MODE_TAGGED	0x01
897
-#define I40E_AQ_VSI_PVLAN_MODE_UNTAGGED	0x02
898774 #define I40E_AQ_VSI_PVLAN_MODE_ALL	0x03
899775 #define I40E_AQ_VSI_PVLAN_INSERT_PVID	0x04
900776 #define I40E_AQ_VSI_PVLAN_EMOD_SHIFT	0x03
901777 #define I40E_AQ_VSI_PVLAN_EMOD_MASK	(0x3 << \
902778 					 I40E_AQ_VSI_PVLAN_EMOD_SHIFT)
903779 #define I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH	0x0
904
-#define I40E_AQ_VSI_PVLAN_EMOD_STR_UP	0x08
905780 #define I40E_AQ_VSI_PVLAN_EMOD_STR	0x10
906781 #define I40E_AQ_VSI_PVLAN_EMOD_NOTHING	0x18
907782 	u8	pvlan_reserved[3];
908783 	/* ingress egress up sections */
909784 	__le32	ingress_table; /* bitmap, 3 bits per up */
910
-#define I40E_AQ_VSI_UP_TABLE_UP0_SHIFT	0
911
-#define I40E_AQ_VSI_UP_TABLE_UP0_MASK	(0x7 << \
912
-					 I40E_AQ_VSI_UP_TABLE_UP0_SHIFT)
913
-#define I40E_AQ_VSI_UP_TABLE_UP1_SHIFT	3
914
-#define I40E_AQ_VSI_UP_TABLE_UP1_MASK	(0x7 << \
915
-					 I40E_AQ_VSI_UP_TABLE_UP1_SHIFT)
916
-#define I40E_AQ_VSI_UP_TABLE_UP2_SHIFT	6
917
-#define I40E_AQ_VSI_UP_TABLE_UP2_MASK	(0x7 << \
918
-					 I40E_AQ_VSI_UP_TABLE_UP2_SHIFT)
919
-#define I40E_AQ_VSI_UP_TABLE_UP3_SHIFT	9
920
-#define I40E_AQ_VSI_UP_TABLE_UP3_MASK	(0x7 << \
921
-					 I40E_AQ_VSI_UP_TABLE_UP3_SHIFT)
922
-#define I40E_AQ_VSI_UP_TABLE_UP4_SHIFT	12
923
-#define I40E_AQ_VSI_UP_TABLE_UP4_MASK	(0x7 << \
924
-					 I40E_AQ_VSI_UP_TABLE_UP4_SHIFT)
925
-#define I40E_AQ_VSI_UP_TABLE_UP5_SHIFT	15
926
-#define I40E_AQ_VSI_UP_TABLE_UP5_MASK	(0x7 << \
927
-					 I40E_AQ_VSI_UP_TABLE_UP5_SHIFT)
928
-#define I40E_AQ_VSI_UP_TABLE_UP6_SHIFT	18
929
-#define I40E_AQ_VSI_UP_TABLE_UP6_MASK	(0x7 << \
930
-					 I40E_AQ_VSI_UP_TABLE_UP6_SHIFT)
931
-#define I40E_AQ_VSI_UP_TABLE_UP7_SHIFT	21
932
-#define I40E_AQ_VSI_UP_TABLE_UP7_MASK	(0x7 << \
933
-					 I40E_AQ_VSI_UP_TABLE_UP7_SHIFT)
934785 	__le32	egress_table;   /* same defines as for ingress table */
935786 	/* cascaded PV section */
936787 	__le16	cas_pv_tag;
937788 	u8	cas_pv_flags;
938
-#define I40E_AQ_VSI_CAS_PV_TAGX_SHIFT		0x00
939
-#define I40E_AQ_VSI_CAS_PV_TAGX_MASK		(0x03 << \
940
-						 I40E_AQ_VSI_CAS_PV_TAGX_SHIFT)
941
-#define I40E_AQ_VSI_CAS_PV_TAGX_LEAVE		0x00
942
-#define I40E_AQ_VSI_CAS_PV_TAGX_REMOVE		0x01
943
-#define I40E_AQ_VSI_CAS_PV_TAGX_COPY		0x02
944
-#define I40E_AQ_VSI_CAS_PV_INSERT_TAG		0x10
945
-#define I40E_AQ_VSI_CAS_PV_ETAG_PRUNE		0x20
946
-#define I40E_AQ_VSI_CAS_PV_ACCEPT_HOST_TAG	0x40
947789 	u8	cas_pv_reserved;
948790 	/* queue mapping section */
949791 	__le16	mapping_flags;
950792 #define I40E_AQ_VSI_QUE_MAP_CONTIG	0x0
951793 #define I40E_AQ_VSI_QUE_MAP_NONCONTIG	0x1
952794 	__le16	queue_mapping[16];
953
-#define I40E_AQ_VSI_QUEUE_SHIFT		0x0
954
-#define I40E_AQ_VSI_QUEUE_MASK		(0x7FF << I40E_AQ_VSI_QUEUE_SHIFT)
955795 	__le16	tc_mapping[8];
956796 #define I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT	0
957
-#define I40E_AQ_VSI_TC_QUE_OFFSET_MASK	(0x1FF << \
958
-					 I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT)
959797 #define I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT	9
960
-#define I40E_AQ_VSI_TC_QUE_NUMBER_MASK	(0x7 << \
961
-					 I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT)
962798 	/* queueing option section */
963799 	u8	queueing_opt_flags;
964
-#define I40E_AQ_VSI_QUE_OPT_MULTICAST_UDP_ENA	0x04
965
-#define I40E_AQ_VSI_QUE_OPT_UNICAST_UDP_ENA	0x08
966800 #define I40E_AQ_VSI_QUE_OPT_TCP_ENA	0x10
967
-#define I40E_AQ_VSI_QUE_OPT_FCOE_ENA	0x20
968
-#define I40E_AQ_VSI_QUE_OPT_RSS_LUT_PF	0x00
969801 #define I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI	0x40
970802 	u8	queueing_opt_reserved[3];
971803 	/* scheduler section */
....@@ -990,10 +822,6 @@
990822  */
991823 struct i40e_aqc_add_update_pv {
992824 	__le16	command_flags;
993
-#define I40E_AQC_PV_FLAG_PV_TYPE		0x1
994
-#define I40E_AQC_PV_FLAG_FWD_UNKNOWN_STAG_EN	0x2
995
-#define I40E_AQC_PV_FLAG_FWD_UNKNOWN_ETAG_EN	0x4
996
-#define I40E_AQC_PV_FLAG_IS_CTRL_PORT		0x8
997825 	__le16	uplink_seid;
998826 	__le16	connected_seid;
999827 	u8	reserved[10];
....@@ -1004,10 +832,6 @@
1004832 struct i40e_aqc_add_update_pv_completion {
1005833 	/* reserved for update; for add also encodes error if rc == ENOSPC */
1006834 	__le16	pv_seid;
1007
-#define I40E_AQC_PV_ERR_FLAG_NO_PV	0x1
1008
-#define I40E_AQC_PV_ERR_FLAG_NO_SCHED	0x2
1009
-#define I40E_AQC_PV_ERR_FLAG_NO_COUNTER	0x4
1010
-#define I40E_AQC_PV_ERR_FLAG_NO_ENTRY	0x8
1011835 	u8	reserved[14];
1012836 };
1013837 
....@@ -1021,9 +845,6 @@
1021845 	__le16	seid;
1022846 	__le16	default_stag;
1023847 	__le16	pv_flags; /* same flags as add_pv */
1024
-#define I40E_AQC_GET_PV_PV_TYPE			0x1
1025
-#define I40E_AQC_GET_PV_FRWD_UNKNOWN_STAG	0x2
1026
-#define I40E_AQC_GET_PV_FRWD_UNKNOWN_ETAG	0x4
1027848 	u8	reserved[8];
1028849 	__le16	default_port_seid;
1029850 };
....@@ -1036,12 +857,8 @@
1036857 	__le16	downlink_seid;
1037858 	__le16	veb_flags;
1038859 #define I40E_AQC_ADD_VEB_FLOATING		0x1
1039
-#define I40E_AQC_ADD_VEB_PORT_TYPE_SHIFT	1
1040
-#define I40E_AQC_ADD_VEB_PORT_TYPE_MASK		(0x3 << \
1041
-					I40E_AQC_ADD_VEB_PORT_TYPE_SHIFT)
1042860 #define I40E_AQC_ADD_VEB_PORT_TYPE_DEFAULT	0x2
1043861 #define I40E_AQC_ADD_VEB_PORT_TYPE_DATA		0x4
1044
-#define I40E_AQC_ADD_VEB_ENABLE_L2_FILTER	0x8     /* deprecated */
1045862 #define I40E_AQC_ADD_VEB_ENABLE_DISABLE_STATS	0x10
1046863 	u8	enable_tcs;
1047864 	u8	reserved[9];
....@@ -1054,10 +871,6 @@
1054871 	__le16	switch_seid;
1055872 	/* also encodes error if rc == ENOSPC; codes are the same as add_pv */
1056873 	__le16	veb_seid;
1057
-#define I40E_AQC_VEB_ERR_FLAG_NO_VEB		0x1
1058
-#define I40E_AQC_VEB_ERR_FLAG_NO_SCHED		0x2
1059
-#define I40E_AQC_VEB_ERR_FLAG_NO_COUNTER	0x4
1060
-#define I40E_AQC_VEB_ERR_FLAG_NO_ENTRY		0x8
1061874 	__le16	statistic_index;
1062875 	__le16	vebs_used;
1063876 	__le16	vebs_free;
....@@ -1090,9 +903,6 @@
1090903 struct i40e_aqc_macvlan {
1091904 	__le16	num_addresses;
1092905 	__le16	seid[3];
1093
-#define I40E_AQC_MACVLAN_CMD_SEID_NUM_SHIFT	0
1094
-#define I40E_AQC_MACVLAN_CMD_SEID_NUM_MASK	(0x3FF << \
1095
-					I40E_AQC_MACVLAN_CMD_SEID_NUM_SHIFT)
1096906 #define I40E_AQC_MACVLAN_CMD_SEID_VALID		0x8000
1097907 	__le32	addr_high;
1098908 	__le32	addr_low;
....@@ -1106,18 +916,11 @@
1106916 	__le16	vlan_tag;
1107917 	__le16	flags;
1108918 #define I40E_AQC_MACVLAN_ADD_PERFECT_MATCH	0x0001
1109
-#define I40E_AQC_MACVLAN_ADD_HASH_MATCH		0x0002
1110919 #define I40E_AQC_MACVLAN_ADD_IGNORE_VLAN	0x0004
1111
-#define I40E_AQC_MACVLAN_ADD_TO_QUEUE		0x0008
1112920 #define I40E_AQC_MACVLAN_ADD_USE_SHARED_MAC	0x0010
1113921 	__le16	queue_number;
1114
-#define I40E_AQC_MACVLAN_CMD_QUEUE_SHIFT	0
1115
-#define I40E_AQC_MACVLAN_CMD_QUEUE_MASK		(0x7FF << \
1116
-					I40E_AQC_MACVLAN_CMD_SEID_NUM_SHIFT)
1117922 	/* response section */
1118923 	u8	match_method;
1119
-#define I40E_AQC_MM_PERFECT_MATCH	0x01
1120
-#define I40E_AQC_MM_HASH_MATCH		0x02
1121924 #define I40E_AQC_MM_ERR_NO_RES		0xFF
1122925 	u8	reserved1[3];
1123926 };
....@@ -1143,14 +946,10 @@
1143946 	__le16	vlan_tag;
1144947 	u8	flags;
1145948 #define I40E_AQC_MACVLAN_DEL_PERFECT_MATCH	0x01
1146
-#define I40E_AQC_MACVLAN_DEL_HASH_MATCH		0x02
1147949 #define I40E_AQC_MACVLAN_DEL_IGNORE_VLAN	0x08
1148
-#define I40E_AQC_MACVLAN_DEL_ALL_VSIS		0x10
1149950 	u8	reserved[3];
1150951 	/* reply section */
1151952 	u8	error_code;
1152
-#define I40E_AQC_REMOVE_MACVLAN_SUCCESS		0x0
1153
-#define I40E_AQC_REMOVE_MACVLAN_FAIL		0xFF
1154953 	u8	reply_reserved[3];
1155954 };
1156955 
....@@ -1161,30 +960,8 @@
1161960 struct i40e_aqc_add_remove_vlan_element_data {
1162961 	__le16	vlan_tag;
1163962 	u8	vlan_flags;
1164
-/* flags for add VLAN */
1165
-#define I40E_AQC_ADD_VLAN_LOCAL			0x1
1166
-#define I40E_AQC_ADD_PVLAN_TYPE_SHIFT		1
1167
-#define I40E_AQC_ADD_PVLAN_TYPE_MASK	(0x3 << I40E_AQC_ADD_PVLAN_TYPE_SHIFT)
1168
-#define I40E_AQC_ADD_PVLAN_TYPE_REGULAR		0x0
1169
-#define I40E_AQC_ADD_PVLAN_TYPE_PRIMARY		0x2
1170
-#define I40E_AQC_ADD_PVLAN_TYPE_SECONDARY	0x4
1171
-#define I40E_AQC_VLAN_PTYPE_SHIFT		3
1172
-#define I40E_AQC_VLAN_PTYPE_MASK	(0x3 << I40E_AQC_VLAN_PTYPE_SHIFT)
1173
-#define I40E_AQC_VLAN_PTYPE_REGULAR_VSI		0x0
1174
-#define I40E_AQC_VLAN_PTYPE_PROMISC_VSI		0x8
1175
-#define I40E_AQC_VLAN_PTYPE_COMMUNITY_VSI	0x10
1176
-#define I40E_AQC_VLAN_PTYPE_ISOLATED_VSI	0x18
1177
-/* flags for remove VLAN */
1178
-#define I40E_AQC_REMOVE_VLAN_ALL	0x1
1179963 	u8	reserved;
1180964 	u8	result;
1181
-/* flags for add VLAN */
1182
-#define I40E_AQC_ADD_VLAN_SUCCESS	0x0
1183
-#define I40E_AQC_ADD_VLAN_FAIL_REQUEST	0xFE
1184
-#define I40E_AQC_ADD_VLAN_FAIL_RESOURCE	0xFF
1185
-/* flags for remove VLAN */
1186
-#define I40E_AQC_REMOVE_VLAN_SUCCESS	0x0
1187
-#define I40E_AQC_REMOVE_VLAN_FAIL	0xFF
1188965 	u8	reserved1[3];
1189966 };
1190967 
....@@ -1208,9 +985,7 @@
1208985 #define I40E_AQC_SET_VSI_PROMISC_VLAN		0x10
1209986 #define I40E_AQC_SET_VSI_PROMISC_RX_ONLY	0x8000
1210987 	__le16	seid;
1211
-#define I40E_AQC_VSI_PROM_CMD_SEID_MASK		0x3FF
1212988 	__le16	vlan_tag;
1213
-#define I40E_AQC_SET_VSI_VLAN_MASK		0x0FFF
1214989 #define I40E_AQC_SET_VSI_VLAN_VALID		0x8000
1215990 	u8	reserved[8];
1216991 };
....@@ -1222,11 +997,7 @@
1222997  */
1223998 struct i40e_aqc_add_tag {
1224999 	__le16	flags;
1225
-#define I40E_AQC_ADD_TAG_FLAG_TO_QUEUE		0x0001
12261000 	__le16	seid;
1227
-#define I40E_AQC_ADD_TAG_CMD_SEID_NUM_SHIFT	0
1228
-#define I40E_AQC_ADD_TAG_CMD_SEID_NUM_MASK	(0x3FF << \
1229
-					I40E_AQC_ADD_TAG_CMD_SEID_NUM_SHIFT)
12301001 	__le16	tag;
12311002 	__le16	queue_number;
12321003 	u8	reserved[8];
....@@ -1247,9 +1018,6 @@
12471018  */
12481019 struct i40e_aqc_remove_tag {
12491020 	__le16	seid;
1250
-#define I40E_AQC_REMOVE_TAG_CMD_SEID_NUM_SHIFT	0
1251
-#define I40E_AQC_REMOVE_TAG_CMD_SEID_NUM_MASK	(0x3FF << \
1252
-					I40E_AQC_REMOVE_TAG_CMD_SEID_NUM_SHIFT)
12531021 	__le16	tag;
12541022 	u8	reserved[12];
12551023 };
....@@ -1285,9 +1053,6 @@
12851053 /* Update S/E-Tag (direct 0x0259) */
12861054 struct i40e_aqc_update_tag {
12871055 	__le16	seid;
1288
-#define I40E_AQC_UPDATE_TAG_CMD_SEID_NUM_SHIFT	0
1289
-#define I40E_AQC_UPDATE_TAG_CMD_SEID_NUM_MASK	(0x3FF << \
1290
-					I40E_AQC_UPDATE_TAG_CMD_SEID_NUM_SHIFT)
12911056 	__le16	old_tag;
12921057 	__le16	new_tag;
12931058 	u8	reserved[10];
....@@ -1314,13 +1079,8 @@
13141079 	__le16	flags;
13151080 #define I40E_AQC_ADD_CONTROL_PACKET_FLAGS_IGNORE_MAC	0x0001
13161081 #define I40E_AQC_ADD_CONTROL_PACKET_FLAGS_DROP		0x0002
1317
-#define I40E_AQC_ADD_CONTROL_PACKET_FLAGS_TO_QUEUE	0x0004
13181082 #define I40E_AQC_ADD_CONTROL_PACKET_FLAGS_TX		0x0008
1319
-#define I40E_AQC_ADD_CONTROL_PACKET_FLAGS_RX		0x0000
13201083 	__le16	seid;
1321
-#define I40E_AQC_ADD_CONTROL_PACKET_CMD_SEID_NUM_SHIFT	0
1322
-#define I40E_AQC_ADD_CONTROL_PACKET_CMD_SEID_NUM_MASK	(0x3FF << \
1323
-				I40E_AQC_ADD_CONTROL_PACKET_CMD_SEID_NUM_SHIFT)
13241084 	__le16	queue;
13251085 	u8	reserved[2];
13261086 };
....@@ -1346,9 +1106,6 @@
13461106 	u8	num_filters;
13471107 	u8	reserved;
13481108 	__le16	seid;
1349
-#define I40E_AQC_ADD_CLOUD_CMD_SEID_NUM_SHIFT	0
1350
-#define I40E_AQC_ADD_CLOUD_CMD_SEID_NUM_MASK	(0x3FF << \
1351
-					I40E_AQC_ADD_CLOUD_CMD_SEID_NUM_SHIFT)
13521109 	u8	big_buffer_flag;
13531110 #define I40E_AQC_ADD_CLOUD_CMD_BB	1
13541111 	u8	reserved2[3];
....@@ -1375,11 +1132,8 @@
13751132 		} raw_v6;
13761133 	} ipaddr;
13771134 	__le16	flags;
1378
-#define I40E_AQC_ADD_CLOUD_FILTER_SHIFT			0
1379
-#define I40E_AQC_ADD_CLOUD_FILTER_MASK	(0x3F << \
1380
-					I40E_AQC_ADD_CLOUD_FILTER_SHIFT)
13811135 /* 0x0000 reserved */
1382
-#define I40E_AQC_ADD_CLOUD_FILTER_OIP			0x0001
1136
+/* 0x0001 reserved */
13831137 /* 0x0002 reserved */
13841138 #define I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN		0x0003
13851139 #define I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN_TEN_ID	0x0004
....@@ -1391,41 +1145,28 @@
13911145 #define I40E_AQC_ADD_CLOUD_FILTER_IMAC			0x000A
13921146 #define I40E_AQC_ADD_CLOUD_FILTER_OMAC_TEN_ID_IMAC	0x000B
13931147 #define I40E_AQC_ADD_CLOUD_FILTER_IIP			0x000C
1148
+/* 0x000D reserved */
1149
+/* 0x000E reserved */
1150
+/* 0x000F reserved */
13941151 /* 0x0010 to 0x0017 is for custom filters */
13951152 #define I40E_AQC_ADD_CLOUD_FILTER_IP_PORT		0x0010 /* Dest IP + L4 Port */
13961153 #define I40E_AQC_ADD_CLOUD_FILTER_MAC_PORT		0x0011 /* Dest MAC + L4 Port */
13971154 #define I40E_AQC_ADD_CLOUD_FILTER_MAC_VLAN_PORT		0x0012 /* Dest MAC + VLAN + L4 Port */
13981155 
1399
-#define I40E_AQC_ADD_CLOUD_FLAGS_TO_QUEUE		0x0080
1400
-#define I40E_AQC_ADD_CLOUD_VNK_SHIFT			6
1401
-#define I40E_AQC_ADD_CLOUD_VNK_MASK			0x00C0
14021156 #define I40E_AQC_ADD_CLOUD_FLAGS_IPV4			0
14031157 #define I40E_AQC_ADD_CLOUD_FLAGS_IPV6			0x0100
14041158 
14051159 #define I40E_AQC_ADD_CLOUD_TNL_TYPE_SHIFT		9
14061160 #define I40E_AQC_ADD_CLOUD_TNL_TYPE_MASK		0x1E00
1407
-#define I40E_AQC_ADD_CLOUD_TNL_TYPE_VXLAN		0
1408
-#define I40E_AQC_ADD_CLOUD_TNL_TYPE_NVGRE_OMAC		1
14091161 #define I40E_AQC_ADD_CLOUD_TNL_TYPE_GENEVE		2
1410
-#define I40E_AQC_ADD_CLOUD_TNL_TYPE_IP			3
1411
-#define I40E_AQC_ADD_CLOUD_TNL_TYPE_RESERVED		4
1412
-#define I40E_AQC_ADD_CLOUD_TNL_TYPE_VXLAN_GPE		5
14131162 
1414
-#define I40E_AQC_ADD_CLOUD_FLAGS_SHARED_OUTER_MAC	0x2000
1415
-#define I40E_AQC_ADD_CLOUD_FLAGS_SHARED_INNER_MAC	0x4000
1416
-#define I40E_AQC_ADD_CLOUD_FLAGS_SHARED_OUTER_IP	0x8000
14171163 
14181164 	__le32	tenant_id;
14191165 	u8	reserved[4];
14201166 	__le16	queue_number;
1421
-#define I40E_AQC_ADD_CLOUD_QUEUE_SHIFT		0
1422
-#define I40E_AQC_ADD_CLOUD_QUEUE_MASK		(0x7FF << \
1423
-						 I40E_AQC_ADD_CLOUD_QUEUE_SHIFT)
14241167 	u8	reserved2[14];
14251168 	/* response section */
14261169 	u8	allocation_result;
1427
-#define I40E_AQC_ADD_CLOUD_FILTER_SUCCESS	0x0
1428
-#define I40E_AQC_ADD_CLOUD_FILTER_FAIL		0xFF
14291170 	u8	response_reserved[7];
14301171 };
14311172 
....@@ -1437,37 +1178,7 @@
14371178 struct i40e_aqc_cloud_filters_element_bb {
14381179 	struct i40e_aqc_cloud_filters_element_data element;
14391180 	u16     general_fields[32];
1440
-#define I40E_AQC_ADD_CLOUD_FV_FLU_0X10_WORD0	0
1441
-#define I40E_AQC_ADD_CLOUD_FV_FLU_0X10_WORD1	1
1442
-#define I40E_AQC_ADD_CLOUD_FV_FLU_0X10_WORD2	2
1443
-#define I40E_AQC_ADD_CLOUD_FV_FLU_0X11_WORD0	3
1444
-#define I40E_AQC_ADD_CLOUD_FV_FLU_0X11_WORD1	4
1445
-#define I40E_AQC_ADD_CLOUD_FV_FLU_0X11_WORD2	5
1446
-#define I40E_AQC_ADD_CLOUD_FV_FLU_0X12_WORD0	6
1447
-#define I40E_AQC_ADD_CLOUD_FV_FLU_0X12_WORD1	7
1448
-#define I40E_AQC_ADD_CLOUD_FV_FLU_0X12_WORD2	8
1449
-#define I40E_AQC_ADD_CLOUD_FV_FLU_0X13_WORD0	9
1450
-#define I40E_AQC_ADD_CLOUD_FV_FLU_0X13_WORD1	10
1451
-#define I40E_AQC_ADD_CLOUD_FV_FLU_0X13_WORD2	11
1452
-#define I40E_AQC_ADD_CLOUD_FV_FLU_0X14_WORD0	12
1453
-#define I40E_AQC_ADD_CLOUD_FV_FLU_0X14_WORD1	13
1454
-#define I40E_AQC_ADD_CLOUD_FV_FLU_0X14_WORD2	14
14551181 #define I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD0	15
1456
-#define I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD1	16
1457
-#define I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD2	17
1458
-#define I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD3	18
1459
-#define I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD4	19
1460
-#define I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD5	20
1461
-#define I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD6	21
1462
-#define I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD7	22
1463
-#define I40E_AQC_ADD_CLOUD_FV_FLU_0X17_WORD0	23
1464
-#define I40E_AQC_ADD_CLOUD_FV_FLU_0X17_WORD1	24
1465
-#define I40E_AQC_ADD_CLOUD_FV_FLU_0X17_WORD2	25
1466
-#define I40E_AQC_ADD_CLOUD_FV_FLU_0X17_WORD3	26
1467
-#define I40E_AQC_ADD_CLOUD_FV_FLU_0X17_WORD4	27
1468
-#define I40E_AQC_ADD_CLOUD_FV_FLU_0X17_WORD5	28
1469
-#define I40E_AQC_ADD_CLOUD_FV_FLU_0X17_WORD6	29
1470
-#define I40E_AQC_ADD_CLOUD_FV_FLU_0X17_WORD7	30
14711182 };
14721183 
14731184 I40E_CHECK_STRUCT_LEN(0x80, i40e_aqc_cloud_filters_element_bb);
....@@ -1496,11 +1207,6 @@
14961207 
14971208 struct i40e_aqc_replace_cloud_filters_cmd {
14981209 	u8      valid_flags;
1499
-#define I40E_AQC_REPLACE_L1_FILTER		0x0
1500
-#define I40E_AQC_REPLACE_CLOUD_FILTER		0x1
1501
-#define I40E_AQC_GET_CLOUD_FILTERS		0x2
1502
-#define I40E_AQC_MIRROR_CLOUD_FILTER		0x4
1503
-#define I40E_AQC_HIGH_PRIORITY_CLOUD_FILTER	0x8
15041210 	u8      old_filter_type;
15051211 	u8      new_filter_type;
15061212 	u8      tr_bit;
....@@ -1513,25 +1219,6 @@
15131219 
15141220 struct i40e_aqc_replace_cloud_filters_cmd_buf {
15151221 	u8      data[32];
1516
-/* Filter type INPUT codes*/
1517
-#define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_ENTRIES_MAX	3
1518
-#define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED	BIT(7)
1519
-
1520
-/* Field Vector offsets */
1521
-#define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_MAC_DA	0
1522
-#define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_STAG_ETH	6
1523
-#define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_STAG	7
1524
-#define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_VLAN	8
1525
-#define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_STAG_OVLAN	9
1526
-#define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_STAG_IVLAN	10
1527
-#define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_TUNNLE_KEY	11
1528
-#define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_IMAC	12
1529
-/* big FLU */
1530
-#define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_IP_DA	14
1531
-/* big FLU */
1532
-#define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_OIP_DA	15
1533
-
1534
-#define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_INNER_VLAN	37
15351222 	struct i40e_filter_data filters[8];
15361223 };
15371224 
....@@ -1548,8 +1235,6 @@
15481235 #define I40E_AQC_MIRROR_RULE_TYPE_SHIFT		0
15491236 #define I40E_AQC_MIRROR_RULE_TYPE_MASK		(0x7 << \
15501237 						I40E_AQC_MIRROR_RULE_TYPE_SHIFT)
1551
-#define I40E_AQC_MIRROR_RULE_TYPE_VPORT_INGRESS	1
1552
-#define I40E_AQC_MIRROR_RULE_TYPE_VPORT_EGRESS	2
15531238 #define I40E_AQC_MIRROR_RULE_TYPE_VLAN		3
15541239 #define I40E_AQC_MIRROR_RULE_TYPE_ALL_INGRESS	4
15551240 #define I40E_AQC_MIRROR_RULE_TYPE_ALL_EGRESS	5
....@@ -1592,8 +1277,6 @@
15921277 
15931278 struct i40e_aqc_get_applied_profiles {
15941279 	u8      flags;
1595
-#define I40E_AQC_GET_DDP_GET_CONF	0x1
1596
-#define I40E_AQC_GET_DDP_GET_RDPU_CONF	0x2
15971280 	u8      rsv[3];
15981281 	__le32  reserved;
15991282 	__le32  addr_high;
....@@ -1610,8 +1293,6 @@
16101293 struct i40e_aqc_pfc_ignore {
16111294 	u8	tc_bitmap;
16121295 	u8	command_flags; /* unused on response */
1613
-#define I40E_AQC_PFC_IGNORE_SET		0x80
1614
-#define I40E_AQC_PFC_IGNORE_CLEAR	0x0
16151296 	u8	reserved[14];
16161297 };
16171298 
....@@ -1728,7 +1409,6 @@
17281409 	u8	reserved[4];
17291410 	u8	tc_valid_bits;
17301411 	u8	seepage;
1731
-#define I40E_AQ_ETS_SEEPAGE_EN_MASK	0x1
17321412 	u8	tc_strict_priority_flags;
17331413 	u8	reserved1[17];
17341414 	u8	tc_bw_share_credits[8];
....@@ -1885,6 +1565,10 @@
18851565 	I40E_PHY_TYPE_25GBASE_LR		= 0x22,
18861566 	I40E_PHY_TYPE_25GBASE_AOC		= 0x23,
18871567 	I40E_PHY_TYPE_25GBASE_ACC		= 0x24,
1568
+	I40E_PHY_TYPE_2_5GBASE_T		= 0x26,
1569
+	I40E_PHY_TYPE_5GBASE_T			= 0x27,
1570
+	I40E_PHY_TYPE_2_5GBASE_T_LINK_STATUS	= 0x30,
1571
+	I40E_PHY_TYPE_5GBASE_T_LINK_STATUS	= 0x31,
18881572 	I40E_PHY_TYPE_MAX,
18891573 	I40E_PHY_TYPE_NOT_SUPPORTED_HIGH_TEMP	= 0xFD,
18901574 	I40E_PHY_TYPE_EMPTY			= 0xFE,
....@@ -1926,19 +1610,25 @@
19261610 				BIT_ULL(I40E_PHY_TYPE_25GBASE_SR) | \
19271611 				BIT_ULL(I40E_PHY_TYPE_25GBASE_LR) | \
19281612 				BIT_ULL(I40E_PHY_TYPE_25GBASE_AOC) | \
1929
-				BIT_ULL(I40E_PHY_TYPE_25GBASE_ACC))
1613
+				BIT_ULL(I40E_PHY_TYPE_25GBASE_ACC) | \
1614
+				BIT_ULL(I40E_PHY_TYPE_2_5GBASE_T) | \
1615
+				BIT_ULL(I40E_PHY_TYPE_5GBASE_T))
19301616 
1617
+#define I40E_LINK_SPEED_2_5GB_SHIFT	0x0
19311618 #define I40E_LINK_SPEED_100MB_SHIFT	0x1
19321619 #define I40E_LINK_SPEED_1000MB_SHIFT	0x2
19331620 #define I40E_LINK_SPEED_10GB_SHIFT	0x3
19341621 #define I40E_LINK_SPEED_40GB_SHIFT	0x4
19351622 #define I40E_LINK_SPEED_20GB_SHIFT	0x5
19361623 #define I40E_LINK_SPEED_25GB_SHIFT	0x6
1624
+#define I40E_LINK_SPEED_5GB_SHIFT	0x7
19371625 
19381626 enum i40e_aq_link_speed {
19391627 	I40E_LINK_SPEED_UNKNOWN	= 0,
19401628 	I40E_LINK_SPEED_100MB	= BIT(I40E_LINK_SPEED_100MB_SHIFT),
19411629 	I40E_LINK_SPEED_1GB	= BIT(I40E_LINK_SPEED_1000MB_SHIFT),
1630
+	I40E_LINK_SPEED_2_5GB	= (1 << I40E_LINK_SPEED_2_5GB_SHIFT),
1631
+	I40E_LINK_SPEED_5GB	= (1 << I40E_LINK_SPEED_5GB_SHIFT),
19421632 	I40E_LINK_SPEED_10GB	= BIT(I40E_LINK_SPEED_10GB_SHIFT),
19431633 	I40E_LINK_SPEED_40GB	= BIT(I40E_LINK_SPEED_40GB_SHIFT),
19441634 	I40E_LINK_SPEED_20GB	= BIT(I40E_LINK_SPEED_20GB_SHIFT),
....@@ -1961,38 +1651,18 @@
19611651 	u8	abilities;
19621652 #define I40E_AQ_PHY_FLAG_PAUSE_TX	0x01
19631653 #define I40E_AQ_PHY_FLAG_PAUSE_RX	0x02
1964
-#define I40E_AQ_PHY_FLAG_LOW_POWER	0x04
1965
-#define I40E_AQ_PHY_LINK_ENABLED	0x08
1966
-#define I40E_AQ_PHY_AN_ENABLED		0x10
1967
-#define I40E_AQ_PHY_FLAG_MODULE_QUAL	0x20
1968
-#define I40E_AQ_PHY_FEC_ABILITY_KR	0x40
1969
-#define I40E_AQ_PHY_FEC_ABILITY_RS	0x80
19701654 	__le16	eee_capability;
1971
-#define I40E_AQ_EEE_100BASE_TX		0x0002
1972
-#define I40E_AQ_EEE_1000BASE_T		0x0004
1973
-#define I40E_AQ_EEE_10GBASE_T		0x0008
1974
-#define I40E_AQ_EEE_1000BASE_KX		0x0010
1975
-#define I40E_AQ_EEE_10GBASE_KX4		0x0020
1976
-#define I40E_AQ_EEE_10GBASE_KR		0x0040
19771655 	__le32	eeer_val;
19781656 	u8	d3_lpan;
1979
-#define I40E_AQ_SET_PHY_D3_LPAN_ENA	0x01
19801657 	u8	phy_type_ext;
19811658 #define I40E_AQ_PHY_TYPE_EXT_25G_KR	0X01
19821659 #define I40E_AQ_PHY_TYPE_EXT_25G_CR	0X02
19831660 #define I40E_AQ_PHY_TYPE_EXT_25G_SR	0x04
19841661 #define I40E_AQ_PHY_TYPE_EXT_25G_LR	0x08
1985
-#define I40E_AQ_PHY_TYPE_EXT_25G_AOC	0x10
1986
-#define I40E_AQ_PHY_TYPE_EXT_25G_ACC	0x20
19871662 	u8	fec_cfg_curr_mod_ext_info;
1988
-#define I40E_AQ_ENABLE_FEC_KR		0x01
1989
-#define I40E_AQ_ENABLE_FEC_RS		0x02
19901663 #define I40E_AQ_REQUEST_FEC_KR		0x04
19911664 #define I40E_AQ_REQUEST_FEC_RS		0x08
19921665 #define I40E_AQ_ENABLE_FEC_AUTO		0x10
1993
-#define I40E_AQ_FEC
1994
-#define I40E_AQ_MODULE_TYPE_EXT_MASK	0xE0
1995
-#define I40E_AQ_MODULE_TYPE_EXT_SHIFT	5
19961666 
19971667 	u8	ext_comp_code;
19981668 	u8	phy_id[4];
....@@ -2038,20 +1708,6 @@
20381708 struct i40e_aq_set_mac_config {
20391709 	__le16	max_frame_size;
20401710 	u8	params;
2041
-#define I40E_AQ_SET_MAC_CONFIG_CRC_EN		0x04
2042
-#define I40E_AQ_SET_MAC_CONFIG_PACING_MASK	0x78
2043
-#define I40E_AQ_SET_MAC_CONFIG_PACING_SHIFT	3
2044
-#define I40E_AQ_SET_MAC_CONFIG_PACING_NONE	0x0
2045
-#define I40E_AQ_SET_MAC_CONFIG_PACING_1B_13TX	0xF
2046
-#define I40E_AQ_SET_MAC_CONFIG_PACING_1DW_9TX	0x9
2047
-#define I40E_AQ_SET_MAC_CONFIG_PACING_1DW_4TX	0x8
2048
-#define I40E_AQ_SET_MAC_CONFIG_PACING_3DW_7TX	0x7
2049
-#define I40E_AQ_SET_MAC_CONFIG_PACING_2DW_3TX	0x6
2050
-#define I40E_AQ_SET_MAC_CONFIG_PACING_1DW_1TX	0x5
2051
-#define I40E_AQ_SET_MAC_CONFIG_PACING_3DW_2TX	0x4
2052
-#define I40E_AQ_SET_MAC_CONFIG_PACING_7DW_3TX	0x3
2053
-#define I40E_AQ_SET_MAC_CONFIG_PACING_4DW_1TX	0x2
2054
-#define I40E_AQ_SET_MAC_CONFIG_PACING_9DW_1TX	0x1
20551711 	u8	tx_timer_priority; /* bitmap */
20561712 	__le16	tx_timer_value;
20571713 	__le16	fc_refresh_threshold;
....@@ -2073,8 +1729,6 @@
20731729 /* Get Link Status cmd & response data structure (direct 0x0607) */
20741730 struct i40e_aqc_get_link_status {
20751731 	__le16	command_flags; /* only field set on command */
2076
-#define I40E_AQ_LSE_MASK		0x3
2077
-#define I40E_AQ_LSE_NOP			0x0
20781732 #define I40E_AQ_LSE_DISABLE		0x2
20791733 #define I40E_AQ_LSE_ENABLE		0x3
20801734 /* only response uses this flag */
....@@ -2083,44 +1737,16 @@
20831737 	u8	link_speed;  /* i40e_aq_link_speed */
20841738 	u8	link_info;
20851739 #define I40E_AQ_LINK_UP			0x01    /* obsolete */
2086
-#define I40E_AQ_LINK_UP_FUNCTION	0x01
2087
-#define I40E_AQ_LINK_FAULT		0x02
2088
-#define I40E_AQ_LINK_FAULT_TX		0x04
2089
-#define I40E_AQ_LINK_FAULT_RX		0x08
2090
-#define I40E_AQ_LINK_FAULT_REMOTE	0x10
2091
-#define I40E_AQ_LINK_UP_PORT		0x20
20921740 #define I40E_AQ_MEDIA_AVAILABLE		0x40
2093
-#define I40E_AQ_SIGNAL_DETECT		0x80
20941741 	u8	an_info;
20951742 #define I40E_AQ_AN_COMPLETED		0x01
2096
-#define I40E_AQ_LP_AN_ABILITY		0x02
2097
-#define I40E_AQ_PD_FAULT		0x04
2098
-#define I40E_AQ_FEC_EN			0x08
2099
-#define I40E_AQ_PHY_LOW_POWER		0x10
21001743 #define I40E_AQ_LINK_PAUSE_TX		0x20
21011744 #define I40E_AQ_LINK_PAUSE_RX		0x40
21021745 #define I40E_AQ_QUALIFIED_MODULE	0x80
21031746 	u8	ext_info;
2104
-#define I40E_AQ_LINK_PHY_TEMP_ALARM	0x01
2105
-#define I40E_AQ_LINK_XCESSIVE_ERRORS	0x02
2106
-#define I40E_AQ_LINK_TX_SHIFT		0x02
2107
-#define I40E_AQ_LINK_TX_MASK		(0x03 << I40E_AQ_LINK_TX_SHIFT)
2108
-#define I40E_AQ_LINK_TX_ACTIVE		0x00
2109
-#define I40E_AQ_LINK_TX_DRAINED		0x01
2110
-#define I40E_AQ_LINK_TX_FLUSHED		0x03
2111
-#define I40E_AQ_LINK_FORCED_40G		0x10
2112
-/* 25G Error Codes */
2113
-#define I40E_AQ_25G_NO_ERR		0X00
2114
-#define I40E_AQ_25G_NOT_PRESENT		0X01
2115
-#define I40E_AQ_25G_NVM_CRC_ERR		0X02
2116
-#define I40E_AQ_25G_SBUS_UCODE_ERR	0X03
2117
-#define I40E_AQ_25G_SERDES_UCODE_ERR	0X04
2118
-#define I40E_AQ_25G_NIMB_UCODE_ERR	0X05
21191747 	u8	loopback; /* use defines from i40e_aqc_set_lb_mode */
21201748 /* Since firmware API 1.7 loopback field keeps power class info as well */
21211749 #define I40E_AQ_LOOPBACK_MASK		0x07
2122
-#define I40E_AQ_PWR_CLASS_SHIFT_LB	6
2123
-#define I40E_AQ_PWR_CLASS_MASK_LB	(0x03 << I40E_AQ_PWR_CLASS_SHIFT_LB)
21241750 	__le16	max_frame_size;
21251751 	u8	config;
21261752 #define I40E_AQ_CONFIG_FEC_KR_ENA	0x01
....@@ -2130,11 +1756,6 @@
21301756 	union {
21311757 		struct {
21321758 			u8	power_desc;
2133
-#define I40E_AQ_LINK_POWER_CLASS_1	0x00
2134
-#define I40E_AQ_LINK_POWER_CLASS_2	0x01
2135
-#define I40E_AQ_LINK_POWER_CLASS_3	0x02
2136
-#define I40E_AQ_LINK_POWER_CLASS_4	0x03
2137
-#define I40E_AQ_PWR_CLASS_MASK		0x03
21381759 			u8	reserved[4];
21391760 		};
21401761 		struct {
....@@ -2152,13 +1773,7 @@
21521773 	__le16	event_mask;
21531774 #define I40E_AQ_EVENT_LINK_UPDOWN	0x0002
21541775 #define I40E_AQ_EVENT_MEDIA_NA		0x0004
2155
-#define I40E_AQ_EVENT_LINK_FAULT	0x0008
2156
-#define I40E_AQ_EVENT_PHY_TEMP_ALARM	0x0010
2157
-#define I40E_AQ_EVENT_EXCESSIVE_ERRORS	0x0020
2158
-#define I40E_AQ_EVENT_SIGNAL_DETECT	0x0040
2159
-#define I40E_AQ_EVENT_AN_COMPLETED	0x0080
21601776 #define I40E_AQ_EVENT_MODULE_QUAL_FAIL	0x0100
2161
-#define I40E_AQ_EVENT_PORT_TX_SUSPENDED	0x0200
21621777 	u8	reserved1[6];
21631778 };
21641779 
....@@ -2190,13 +1805,6 @@
21901805 /* Set PHY Debug command (0x0622) */
21911806 struct i40e_aqc_set_phy_debug {
21921807 	u8	command_flags;
2193
-#define I40E_AQ_PHY_DEBUG_RESET_INTERNAL	0x02
2194
-#define I40E_AQ_PHY_DEBUG_RESET_EXTERNAL_SHIFT	2
2195
-#define I40E_AQ_PHY_DEBUG_RESET_EXTERNAL_MASK	(0x03 << \
2196
-					I40E_AQ_PHY_DEBUG_RESET_EXTERNAL_SHIFT)
2197
-#define I40E_AQ_PHY_DEBUG_RESET_EXTERNAL_NONE	0x00
2198
-#define I40E_AQ_PHY_DEBUG_RESET_EXTERNAL_HARD	0x01
2199
-#define I40E_AQ_PHY_DEBUG_RESET_EXTERNAL_SOFT	0x02
22001808 /* Disable link manageability on a single port */
22011809 #define I40E_AQ_PHY_DEBUG_DISABLE_LINK_FW	0x10
22021810 /* Disable link manageability on all ports */
....@@ -2228,11 +1836,16 @@
22281836 /* Get PHY Register command (0x0629) */
22291837 struct i40e_aqc_phy_register_access {
22301838 	u8	phy_interface;
2231
-#define I40E_AQ_PHY_REG_ACCESS_INTERNAL	0
22321839 #define I40E_AQ_PHY_REG_ACCESS_EXTERNAL	1
22331840 #define I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE	2
22341841 	u8	dev_address;
2235
-	u8	reserved1[2];
1842
+	u8	cmd_flags;
1843
+#define I40E_AQ_PHY_REG_ACCESS_DONT_CHANGE_QSFP_PAGE	0x01
1844
+#define I40E_AQ_PHY_REG_ACCESS_SET_MDIO_IF_NUMBER	0x02
1845
+#define I40E_AQ_PHY_REG_ACCESS_MDIO_IF_NUMBER_SHIFT	2
1846
+#define I40E_AQ_PHY_REG_ACCESS_MDIO_IF_NUMBER_MASK	(0x3 << \
1847
+		I40E_AQ_PHY_REG_ACCESS_MDIO_IF_NUMBER_SHIFT)
1848
+	u8	reserved1;
22361849 	__le32	reg_address;
22371850 	__le32	reg_value;
22381851 	u8	reserved2[4];
....@@ -2249,9 +1862,7 @@
22491862 #define I40E_AQ_NVM_LAST_CMD			0x01
22501863 #define I40E_AQ_NVM_REARRANGE_TO_FLAT		0x20
22511864 #define I40E_AQ_NVM_REARRANGE_TO_STRUCT		0x40
2252
-#define I40E_AQ_NVM_FLASH_ONLY			0x80
22531865 #define I40E_AQ_NVM_PRESERVATION_FLAGS_SHIFT	1
2254
-#define I40E_AQ_NVM_PRESERVATION_FLAGS_MASK	0x03
22551866 #define I40E_AQ_NVM_PRESERVATION_FLAGS_SELECTED	0x03
22561867 #define I40E_AQ_NVM_PRESERVATION_FLAGS_ALL	0x01
22571868 	u8	module_pointer;
....@@ -2266,9 +1877,6 @@
22661877 /* NVM Config Read (indirect 0x0704) */
22671878 struct i40e_aqc_nvm_config_read {
22681879 	__le16	cmd_flags;
2269
-#define I40E_AQ_ANVM_SINGLE_OR_MULTIPLE_FEATURES_MASK	1 
2270
-#define I40E_AQ_ANVM_READ_SINGLE_FEATURE		0 
2271
-#define I40E_AQ_ANVM_READ_MULTIPLE_FEATURES		1
22721880 	__le16	element_count;
22731881 	__le16	element_id;	/* Feature/field ID */
22741882 	__le16	element_id_msw;	/* MSWord of field ID */
....@@ -2290,16 +1898,8 @@
22901898 I40E_CHECK_CMD_LENGTH(i40e_aqc_nvm_config_write);
22911899 
22921900 /* Used for 0x0704 as well as for 0x0705 commands */
2293
-#define I40E_AQ_ANVM_FEATURE_OR_IMMEDIATE_SHIFT		1
2294
-#define I40E_AQ_ANVM_FEATURE_OR_IMMEDIATE_MASK \
2295
-				BIT(I40E_AQ_ANVM_FEATURE_OR_IMMEDIATE_SHIFT)
2296
-#define I40E_AQ_ANVM_FEATURE		0
2297
-#define I40E_AQ_ANVM_IMMEDIATE_FIELD	BIT(FEATURE_OR_IMMEDIATE_SHIFT)
22981901 struct i40e_aqc_nvm_config_data_feature {
22991902 	__le16 feature_id;
2300
-#define I40E_AQ_ANVM_FEATURE_OPTION_OEM_ONLY		0x01
2301
-#define I40E_AQ_ANVM_FEATURE_OPTION_DWORD_MAP		0x08
2302
-#define I40E_AQ_ANVM_FEATURE_OPTION_POR_CSR		0x10
23031903 	__le16 feature_options;
23041904 	__le16 feature_selection;
23051905 };
....@@ -2319,7 +1919,6 @@
23191919  * no command data struct used
23201920  */
23211921 struct i40e_aqc_nvm_oem_post_update {
2322
-#define I40E_AQ_NVM_OEM_POST_UPDATE_EXTERNAL_DATA	0x01
23231922 	u8 sel_data;
23241923 	u8 reserved[7];
23251924 };
....@@ -2341,9 +1940,6 @@
23411940  */
23421941 struct i40e_aqc_thermal_sensor {
23431942 	u8 sensor_action;
2344
-#define I40E_AQ_THERMAL_SENSOR_READ_CONFIG	0
2345
-#define I40E_AQ_THERMAL_SENSOR_SET_CONFIG	1
2346
-#define I40E_AQ_THERMAL_SENSOR_READ_TEMP	2
23471943 	u8 reserved[7];
23481944 	__le32	addr_high;
23491945 	__le32	addr_low;
....@@ -2396,10 +1992,6 @@
23961992  */
23971993 struct i40e_aqc_alternate_write_done {
23981994 	__le16	cmd_flags;
2399
-#define I40E_AQ_ALTERNATE_MODE_BIOS_MASK	1
2400
-#define I40E_AQ_ALTERNATE_MODE_BIOS_LEGACY	0
2401
-#define I40E_AQ_ALTERNATE_MODE_BIOS_UEFI	1
2402
-#define I40E_AQ_ALTERNATE_RESET_NEEDED		2
24031995 	u8	reserved[14];
24041996 };
24051997 
....@@ -2408,8 +2000,6 @@
24082000 /* Set OEM mode (direct 0x0905) */
24092001 struct i40e_aqc_alternate_set_mode {
24102002 	__le32	mode;
2411
-#define I40E_AQ_ALTERNATE_MODE_NONE	0
2412
-#define I40E_AQ_ALTERNATE_MODE_OEM	1
24132003 	u8	reserved[12];
24142004 };
24152005 
....@@ -2435,13 +2025,9 @@
24352025 #define I40E_AQ_LLDP_MIB_TYPE_MASK		0x3
24362026 #define I40E_AQ_LLDP_MIB_LOCAL			0x0
24372027 #define I40E_AQ_LLDP_MIB_REMOTE			0x1
2438
-#define I40E_AQ_LLDP_MIB_LOCAL_AND_REMOTE	0x2
24392028 #define I40E_AQ_LLDP_BRIDGE_TYPE_MASK		0xC
24402029 #define I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT		0x2
24412030 #define I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE	0x0
2442
-#define I40E_AQ_LLDP_BRIDGE_TYPE_NON_TPMR	0x1
2443
-#define I40E_AQ_LLDP_TX_SHIFT			0x4
2444
-#define I40E_AQ_LLDP_TX_MASK			(0x03 << I40E_AQ_LLDP_TX_SHIFT)
24452031 /* TX pause flags use I40E_AQ_LINK_TX_* above */
24462032 	__le16	local_len;
24472033 	__le16	remote_len;
....@@ -2457,7 +2043,6 @@
24572043  */
24582044 struct i40e_aqc_lldp_update_mib {
24592045 	u8	command;
2460
-#define I40E_AQ_LLDP_MIB_UPDATE_ENABLE	0x0
24612046 #define I40E_AQ_LLDP_MIB_UPDATE_DISABLE	0x1
24622047 	u8	reserved[7];
24632048 	__le32	addr_high;
....@@ -2496,18 +2081,18 @@
24962081 /* Stop LLDP (direct 0x0A05) */
24972082 struct i40e_aqc_lldp_stop {
24982083 	u8	command;
2499
-#define I40E_AQ_LLDP_AGENT_STOP		0x0
2500
-#define I40E_AQ_LLDP_AGENT_SHUTDOWN	0x1
2084
+#define I40E_AQ_LLDP_AGENT_SHUTDOWN		0x1
2085
+#define I40E_AQ_LLDP_AGENT_STOP_PERSIST		0x2
25012086 	u8	reserved[15];
25022087 };
25032088 
25042089 I40E_CHECK_CMD_LENGTH(i40e_aqc_lldp_stop);
25052090 
25062091 /* Start LLDP (direct 0x0A06) */
2507
-
25082092 struct i40e_aqc_lldp_start {
25092093 	u8	command;
2510
-#define I40E_AQ_LLDP_AGENT_START	0x1
2094
+#define I40E_AQ_LLDP_AGENT_START		0x1
2095
+#define I40E_AQ_LLDP_AGENT_START_PERSIST	0x2
25112096 	u8	reserved[15];
25122097 };
25132098 
....@@ -2601,13 +2186,6 @@
26012186  *	Used to replace the local MIB of a given LLDP agent. e.g. DCBx
26022187  */
26032188 struct i40e_aqc_lldp_set_local_mib {
2604
-#define SET_LOCAL_MIB_AC_TYPE_DCBX_SHIFT	0
2605
-#define SET_LOCAL_MIB_AC_TYPE_DCBX_MASK	BIT(SET_LOCAL_MIB_AC_TYPE_DCBX_SHIFT)
2606
-#define SET_LOCAL_MIB_AC_TYPE_LOCAL_MIB	0x0
2607
-#define SET_LOCAL_MIB_AC_TYPE_NON_WILLING_APPS_SHIFT	(1)
2608
-#define SET_LOCAL_MIB_AC_TYPE_NON_WILLING_APPS_MASK \
2609
-			BIT(SET_LOCAL_MIB_AC_TYPE_NON_WILLING_APPS_SHIFT)
2610
-#define SET_LOCAL_MIB_AC_TYPE_NON_WILLING_APPS		0x1
26112189 	u8	type;
26122190 	u8	reserved0;
26132191 	__le16	length;
....@@ -2622,14 +2200,20 @@
26222200  *	Used for stopping/starting specific LLDP agent. e.g. DCBx
26232201  */
26242202 struct i40e_aqc_lldp_stop_start_specific_agent {
2625
-#define I40E_AQC_START_SPECIFIC_AGENT_SHIFT	0
2626
-#define I40E_AQC_START_SPECIFIC_AGENT_MASK \
2627
-				BIT(I40E_AQC_START_SPECIFIC_AGENT_SHIFT)
26282203 	u8	command;
26292204 	u8	reserved[15];
26302205 };
26312206 
26322207 I40E_CHECK_CMD_LENGTH(i40e_aqc_lldp_stop_start_specific_agent);
2208
+
2209
+/* Restore LLDP Agent factory settings (direct 0x0A0A) */
2210
+struct i40e_aqc_lldp_restore {
2211
+	u8	command;
2212
+#define I40E_AQ_LLDP_AGENT_RESTORE		0x1
2213
+	u8	reserved[15];
2214
+};
2215
+
2216
+I40E_CHECK_CMD_LENGTH(i40e_aqc_lldp_restore);
26332217 
26342218 /* Add Udp Tunnel command and completion (direct 0x0B00) */
26352219 struct i40e_aqc_add_udp_tunnel {
....@@ -2638,8 +2222,6 @@
26382222 	u8	protocol_type;
26392223 #define I40E_AQC_TUNNEL_TYPE_VXLAN	0x00
26402224 #define I40E_AQC_TUNNEL_TYPE_NGE	0x01
2641
-#define I40E_AQC_TUNNEL_TYPE_TEREDO	0x10
2642
-#define I40E_AQC_TUNNEL_TYPE_VXLAN_GPE	0x11
26432225 	u8	reserved1[10];
26442226 };
26452227 
....@@ -2649,8 +2231,6 @@
26492231 	__le16	udp_port;
26502232 	u8	filter_entry_index;
26512233 	u8	multiple_pfs;
2652
-#define I40E_AQC_SINGLE_PF		0x0
2653
-#define I40E_AQC_MULTIPLE_PFS		0x1
26542234 	u8	total_filters;
26552235 	u8	reserved[11];
26562236 };
....@@ -2723,16 +2303,7 @@
27232303 	u8	key1_len;  /* 0 to 15 */
27242304 	u8	key2_len;  /* 0 to 15 */
27252305 	u8	flags;
2726
-#define I40E_AQC_TUNNEL_KEY_STRUCT_OVERRIDE	0x01
2727
-/* response flags */
2728
-#define I40E_AQC_TUNNEL_KEY_STRUCT_SUCCESS	0x01
2729
-#define I40E_AQC_TUNNEL_KEY_STRUCT_MODIFIED	0x02
2730
-#define I40E_AQC_TUNNEL_KEY_STRUCT_OVERRIDDEN	0x03
27312306 	u8	network_key_index;
2732
-#define I40E_AQC_NETWORK_KEY_INDEX_VXLAN		0x0
2733
-#define I40E_AQC_NETWORK_KEY_INDEX_NGE			0x1
2734
-#define I40E_AQC_NETWORK_KEY_INDEX_FLEX_MAC_IN_UDP	0x2
2735
-#define I40E_AQC_NETWORK_KEY_INDEX_GRE			0x3
27362307 	u8	reserved[10];
27372308 };
27382309 
....@@ -2741,9 +2312,6 @@
27412312 /* OEM mode commands (direct 0xFE0x) */
27422313 struct i40e_aqc_oem_param_change {
27432314 	__le32	param_type;
2744
-#define I40E_AQ_OEM_PARAM_TYPE_PF_CTL	0
2745
-#define I40E_AQ_OEM_PARAM_TYPE_BW_CTL	1
2746
-#define I40E_AQ_OEM_PARAM_MAC		2
27472315 	__le32	param_value1;
27482316 	__le16	param_value2;
27492317 	u8	reserved[6];
....@@ -2753,8 +2321,6 @@
27532321 
27542322 struct i40e_aqc_oem_state_change {
27552323 	__le32	state;
2756
-#define I40E_AQ_OEM_STATE_LINK_DOWN	0x0
2757
-#define I40E_AQ_OEM_STATE_LINK_UP	0x1
27582324 	u8	reserved[12];
27592325 };
27602326 
....@@ -2790,14 +2356,8 @@
27902356 
27912357 struct i40e_acq_set_test_mode {
27922358 	u8	mode;
2793
-#define I40E_AQ_TEST_PARTIAL	0
2794
-#define I40E_AQ_TEST_FULL	1
2795
-#define I40E_AQ_TEST_NVM	2
27962359 	u8	reserved[3];
27972360 	u8	command;
2798
-#define I40E_AQ_TEST_OPEN	0
2799
-#define I40E_AQ_TEST_CLOSE	1
2800
-#define I40E_AQ_TEST_INC	2
28012361 	u8	reserved2[3];
28022362 	__le32	address_high;
28032363 	__le32	address_low;
....@@ -2838,20 +2398,6 @@
28382398 I40E_CHECK_CMD_LENGTH(i40e_aqc_debug_modify_reg);
28392399 
28402400 /* dump internal data (0xFF08, indirect) */
2841
-
2842
-#define I40E_AQ_CLUSTER_ID_AUX		0
2843
-#define I40E_AQ_CLUSTER_ID_SWITCH_FLU	1
2844
-#define I40E_AQ_CLUSTER_ID_TXSCHED	2
2845
-#define I40E_AQ_CLUSTER_ID_HMC		3
2846
-#define I40E_AQ_CLUSTER_ID_MAC0		4
2847
-#define I40E_AQ_CLUSTER_ID_MAC1		5
2848
-#define I40E_AQ_CLUSTER_ID_MAC2		6
2849
-#define I40E_AQ_CLUSTER_ID_MAC3		7
2850
-#define I40E_AQ_CLUSTER_ID_DCB		8
2851
-#define I40E_AQ_CLUSTER_ID_EMP_MEM	9
2852
-#define I40E_AQ_CLUSTER_ID_PKT_BUF	10
2853
-#define I40E_AQ_CLUSTER_ID_ALTRAM	11
2854
-
28552401 struct i40e_aqc_debug_dump_internals {
28562402 	u8	cluster_id;
28572403 	u8	table_id;