kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/drivers/net/ethernet/intel/e1000/e1000_hw.c
..
..
@@ -129,7 +129,6 @@
129
129
  */
130
130
 static void e1000_phy_init_script(struct e1000_hw *hw)
131
131
 {
132
-	u32 ret_val;
133
132
 	u16 phy_saved_data;
134
133
 
135
134
 	if (hw->phy_init_script) {
..
..
@@ -138,7 +137,7 @@
138
137
 		/* Save off the current value of register 0x2F5B to be restored
139
138
 		 * at the end of this routine.
140
139
 		 */
141
-		ret_val = e1000_read_phy_reg(hw, 0x2F5B, &phy_saved_data);
140
+		e1000_read_phy_reg(hw, 0x2F5B, &phy_saved_data);
142
141
 
143
142
 		/* Disabled the PHY transmitter */
144
143
 		e1000_write_phy_reg(hw, 0x2F5B, 0x0003);
..
..
@@ -377,7 +376,6 @@
377
376
 {
378
377
 	u32 ctrl;
379
378
 	u32 ctrl_ext;
380
-	u32 icr;
381
379
 	u32 manc;
382
380
 	u32 led_ctrl;
383
381
 	s32 ret_val;
..
..
@@ -502,7 +500,7 @@
502
500
 	ew32(IMC, 0xffffffff);
503
501
 
504
502
 	/* Clear any pending interrupt events. */
505
-	icr = er32(ICR);
503
+	er32(ICR);
506
504
 
507
505
 	/* If MWI was previously enabled, reenable it. */
508
506
 	if (hw->mac_type == e1000_82542_rev2_0) {
..
..
@@ -1897,7 +1895,6 @@
1897
1895
 /**
1898
1896
  * e1000_config_mac_to_phy - sync phy and mac settings
1899
1897
  * @hw: Struct containing variables accessed by shared code
1900
- * @mii_reg: data to write to the MII control register
1901
1898
  *
1902
1899
  * Sets MAC speed and duplex settings to reflect the those in the PHY
1903
1900
  * The contents of the PHY register containing the needed information need to
..
..
@@ -2370,16 +2367,13 @@
2370
2367
  */
2371
2368
 s32 e1000_check_for_link(struct e1000_hw *hw)
2372
2369
 {
2373
-	u32 rxcw = 0;
2374
-	u32 ctrl;
2375
2370
 	u32 status;
2376
2371
 	u32 rctl;
2377
2372
 	u32 icr;
2378
-	u32 signal = 0;
2379
2373
 	s32 ret_val;
2380
2374
 	u16 phy_data;
2381
2375
 
2382
-	ctrl = er32(CTRL);
2376
+	er32(CTRL);
2383
2377
 	status = er32(STATUS);
2384
2378
 
2385
2379
 	/* On adapters with a MAC newer than 82544, SW Definable pin 1 will be
..
..
@@ -2388,12 +2382,9 @@
2388
2382
 	 */
2389
2383
 	if ((hw->media_type == e1000_media_type_fiber) ||
2390
2384
 	    (hw->media_type == e1000_media_type_internal_serdes)) {
2391
-		rxcw = er32(RXCW);
2385
+		er32(RXCW);
2392
2386
 
2393
2387
 		if (hw->media_type == e1000_media_type_fiber) {
2394
-			signal =
2395
-			    (hw->mac_type >
2396
-			     e1000_82544) ? E1000_CTRL_SWDPIN1 : 0;
2397
2388
 			if (status & E1000_STATUS_LU)
2398
2389
 				hw->get_link_status = false;
2399
2390
 		}
..
..
@@ -2922,7 +2913,7 @@
2922
2913
  *
2923
2914
  * @hw: Struct containing variables accessed by shared code
2924
2915
  * @reg_addr: address of the PHY register to write
2925
- * @data: data to write to the PHY
2916
+ * @phy_data: data to write to the PHY
2926
2917
  *
2927
2918
  * Writes a value to a PHY register
2928
2919
  */
..
..
@@ -3960,7 +3951,7 @@
3960
3951
  * @hw: Struct containing variables accessed by shared code
3961
3952
  *
3962
3953
  * Reads the first 64 16 bit words of the EEPROM and sums the values read.
3963
- * If the the sum of the 64 16 bit words is 0xBABA, the EEPROM's checksum is
3954
+ * If the sum of the 64 16 bit words is 0xBABA, the EEPROM's checksum is
3964
3955
  * valid.
3965
3956
  */
3966
3957
 s32 e1000_validate_eeprom_checksum(struct e1000_hw *hw)
..
..
@@ -4410,17 +4401,9 @@
4410
4401
 static void e1000_clear_vfta(struct e1000_hw *hw)
4411
4402
 {
4412
4403
 	u32 offset;
4413
-	u32 vfta_value = 0;
4414
-	u32 vfta_offset = 0;
4415
-	u32 vfta_bit_in_reg = 0;
4416
4404
 
4417
4405
 	for (offset = 0; offset < E1000_VLAN_FILTER_TBL_SIZE; offset++) {
4418
-		/* If the offset we want to clear is the same offset of the
4419
-		 * manageability VLAN ID, then clear all bits except that of the
4420
-		 * manageability unit
4421
-		 */
4422
-		vfta_value = (offset == vfta_offset) ? vfta_bit_in_reg : 0;
4423
-		E1000_WRITE_REG_ARRAY(hw, VFTA, offset, vfta_value);
4406
+		E1000_WRITE_REG_ARRAY(hw, VFTA, offset, 0);
4424
4407
 		E1000_WRITE_FLUSH();
4425
4408
 	}
4426
4409
 }
..
..
@@ -4526,7 +4509,7 @@
4526
4509
 						     ~IGP01E1000_GMII_SPD));
4527
4510
 		if (ret_val)
4528
4511
 			return ret_val;
4529
-		/* Fall Through */
4512
+		fallthrough;
4530
4513
 	default:
4531
4514
 		if (hw->media_type == e1000_media_type_fiber) {
4532
4515
 			ledctl = er32(LEDCTL);
..
..
@@ -4571,7 +4554,7 @@
4571
4554
 					      hw->phy_spd_default);
4572
4555
 		if (ret_val)
4573
4556
 			return ret_val;
4574
-		/* Fall Through */
4557
+		fallthrough;
4575
4558
 	default:
4576
4559
 		/* Restore LEDCTL settings */
4577
4560
 		ew32(LEDCTL, hw->ledctl_default);
..
..
@@ -4675,78 +4658,76 @@
4675
4658
  */
4676
4659
 static void e1000_clear_hw_cntrs(struct e1000_hw *hw)
4677
4660
 {
4678
-	volatile u32 temp;
4661
+	er32(CRCERRS);
4662
+	er32(SYMERRS);
4663
+	er32(MPC);
4664
+	er32(SCC);
4665
+	er32(ECOL);
4666
+	er32(MCC);
4667
+	er32(LATECOL);
4668
+	er32(COLC);
4669
+	er32(DC);
4670
+	er32(SEC);
4671
+	er32(RLEC);
4672
+	er32(XONRXC);
4673
+	er32(XONTXC);
4674
+	er32(XOFFRXC);
4675
+	er32(XOFFTXC);
4676
+	er32(FCRUC);
4679
4677
 
4680
-	temp = er32(CRCERRS);
4681
-	temp = er32(SYMERRS);
4682
-	temp = er32(MPC);
4683
-	temp = er32(SCC);
4684
-	temp = er32(ECOL);
4685
-	temp = er32(MCC);
4686
-	temp = er32(LATECOL);
4687
-	temp = er32(COLC);
4688
-	temp = er32(DC);
4689
-	temp = er32(SEC);
4690
-	temp = er32(RLEC);
4691
-	temp = er32(XONRXC);
4692
-	temp = er32(XONTXC);
4693
-	temp = er32(XOFFRXC);
4694
-	temp = er32(XOFFTXC);
4695
-	temp = er32(FCRUC);
4678
+	er32(PRC64);
4679
+	er32(PRC127);
4680
+	er32(PRC255);
4681
+	er32(PRC511);
4682
+	er32(PRC1023);
4683
+	er32(PRC1522);
4696
4684
 
4697
-	temp = er32(PRC64);
4698
-	temp = er32(PRC127);
4699
-	temp = er32(PRC255);
4700
-	temp = er32(PRC511);
4701
-	temp = er32(PRC1023);
4702
-	temp = er32(PRC1522);
4685
+	er32(GPRC);
4686
+	er32(BPRC);
4687
+	er32(MPRC);
4688
+	er32(GPTC);
4689
+	er32(GORCL);
4690
+	er32(GORCH);
4691
+	er32(GOTCL);
4692
+	er32(GOTCH);
4693
+	er32(RNBC);
4694
+	er32(RUC);
4695
+	er32(RFC);
4696
+	er32(ROC);
4697
+	er32(RJC);
4698
+	er32(TORL);
4699
+	er32(TORH);
4700
+	er32(TOTL);
4701
+	er32(TOTH);
4702
+	er32(TPR);
4703
+	er32(TPT);
4703
4704
 
4704
-	temp = er32(GPRC);
4705
-	temp = er32(BPRC);
4706
-	temp = er32(MPRC);
4707
-	temp = er32(GPTC);
4708
-	temp = er32(GORCL);
4709
-	temp = er32(GORCH);
4710
-	temp = er32(GOTCL);
4711
-	temp = er32(GOTCH);
4712
-	temp = er32(RNBC);
4713
-	temp = er32(RUC);
4714
-	temp = er32(RFC);
4715
-	temp = er32(ROC);
4716
-	temp = er32(RJC);
4717
-	temp = er32(TORL);
4718
-	temp = er32(TORH);
4719
-	temp = er32(TOTL);
4720
-	temp = er32(TOTH);
4721
-	temp = er32(TPR);
4722
-	temp = er32(TPT);
4705
+	er32(PTC64);
4706
+	er32(PTC127);
4707
+	er32(PTC255);
4708
+	er32(PTC511);
4709
+	er32(PTC1023);
4710
+	er32(PTC1522);
4723
4711
 
4724
-	temp = er32(PTC64);
4725
-	temp = er32(PTC127);
4726
-	temp = er32(PTC255);
4727
-	temp = er32(PTC511);
4728
-	temp = er32(PTC1023);
4729
-	temp = er32(PTC1522);
4730
-
4731
-	temp = er32(MPTC);
4732
-	temp = er32(BPTC);
4712
+	er32(MPTC);
4713
+	er32(BPTC);
4733
4714
 
4734
4715
 	if (hw->mac_type < e1000_82543)
4735
4716
 		return;
4736
4717
 
4737
-	temp = er32(ALGNERRC);
4738
-	temp = er32(RXERRC);
4739
-	temp = er32(TNCRS);
4740
-	temp = er32(CEXTERR);
4741
-	temp = er32(TSCTC);
4742
-	temp = er32(TSCTFC);
4718
+	er32(ALGNERRC);
4719
+	er32(RXERRC);
4720
+	er32(TNCRS);
4721
+	er32(CEXTERR);
4722
+	er32(TSCTC);
4723
+	er32(TSCTFC);
4743
4724
 
4744
4725
 	if (hw->mac_type <= e1000_82544)
4745
4726
 		return;
4746
4727
 
4747
-	temp = er32(MGTPRC);
4748
-	temp = er32(MGTPDC);
4749
-	temp = er32(MGTPTC);
4728
+	er32(MGTPRC);
4729
+	er32(MGTPDC);
4730
+	er32(MGTPTC);
4750
4731
 }
4751
4732
 
4752
4733
 /**
..
..
@@ -4778,8 +4759,6 @@
4778
4759
 /**
4779
4760
  * e1000_update_adaptive - update adaptive IFS
4780
4761
  * @hw: Struct containing variables accessed by shared code
4781
- * @tx_packets: Number of transmits since last callback
4782
- * @total_collisions: Number of collisions since last callback
4783
4762
  *
4784
4763
  * Called during the callback/watchdog routine to update IFS value based on
4785
4764
  * the ratio of transmits to collisions.
..
..
@@ -5064,8 +5043,6 @@
5064
5043
 /**
5065
5044
  * e1000_check_downshift - Check if Downshift occurred
5066
5045
  * @hw: Struct containing variables accessed by shared code
5067
- * @downshift: output parameter : 0 - No Downshift occurred.
5068
- *                                1 - Downshift occurred.
5069
5046
  *
5070
5047
  * returns: - E1000_ERR_XXX
5071
5048
  *            E1000_SUCCESS