hc
2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f
kernel/drivers/net/ethernet/chelsio/cxgb4/t4_msg.h
....@@ -47,6 +47,7 @@
4747 CPL_CLOSE_LISTSRV_REQ = 0x9,
4848 CPL_ABORT_REQ = 0xA,
4949 CPL_ABORT_RPL = 0xB,
50
+ CPL_TX_DATA = 0xC,
5051 CPL_RX_DATA_ACK = 0xD,
5152 CPL_TX_PKT = 0xE,
5253 CPL_L2T_WRITE_REQ = 0x12,
....@@ -56,6 +57,7 @@
5657 CPL_TX_DATA_ISO = 0x1F,
5758
5859 CPL_CLOSE_LISTSRV_RPL = 0x20,
60
+ CPL_GET_TCB_RPL = 0x22,
5961 CPL_L2T_WRITE_RPL = 0x23,
6062 CPL_PASS_OPEN_RPL = 0x24,
6163 CPL_ACT_OPEN_RPL = 0x25,
....@@ -688,8 +690,23 @@
688690 #define NO_REPLY_V(x) ((x) << NO_REPLY_S)
689691 #define NO_REPLY_F NO_REPLY_V(1U)
690692
693
+struct cpl_get_tcb_rpl {
694
+ union opcode_tid ot;
695
+ __u8 cookie;
696
+ __u8 status;
697
+ __be16 len;
698
+};
699
+
691700 struct cpl_set_tcb_field {
692701 WR_HDR;
702
+ union opcode_tid ot;
703
+ __be16 reply_ctrl;
704
+ __be16 word_cookie;
705
+ __be64 mask;
706
+ __be64 val;
707
+};
708
+
709
+struct cpl_set_tcb_field_core {
693710 union opcode_tid ot;
694711 __be16 reply_ctrl;
695712 __be16 word_cookie;
....@@ -1413,6 +1430,11 @@
14131430 CPL_FW4_ACK_FLAGS_FLOWC = 0x4, /* fw_flowc_wr complete */
14141431 };
14151432
1433
+#define CPL_FW4_ACK_FLOWID_S 0
1434
+#define CPL_FW4_ACK_FLOWID_M 0xffffff
1435
+#define CPL_FW4_ACK_FLOWID_G(x) \
1436
+ (((x) >> CPL_FW4_ACK_FLOWID_S) & CPL_FW4_ACK_FLOWID_M)
1437
+
14161438 struct cpl_fw6_msg {
14171439 u8 opcode;
14181440 u8 type;
....@@ -1449,12 +1471,34 @@
14491471 #define TX_FORCE_S 13
14501472 #define TX_FORCE_V(x) ((x) << TX_FORCE_S)
14511473
1474
+#define TX_DATA_MSS_S 16
1475
+#define TX_DATA_MSS_M 0xFFFF
1476
+#define TX_DATA_MSS_V(x) ((x) << TX_DATA_MSS_S)
1477
+#define TX_DATA_MSS_G(x) (((x) >> TX_DATA_MSS_S) & TX_DATA_MSS_M)
1478
+
1479
+#define TX_LENGTH_S 0
1480
+#define TX_LENGTH_M 0xFFFF
1481
+#define TX_LENGTH_V(x) ((x) << TX_LENGTH_S)
1482
+#define TX_LENGTH_G(x) (((x) >> TX_LENGTH_S) & TX_LENGTH_M)
1483
+
14521484 #define T6_TX_FORCE_S 20
14531485 #define T6_TX_FORCE_V(x) ((x) << T6_TX_FORCE_S)
14541486 #define T6_TX_FORCE_F T6_TX_FORCE_V(1U)
14551487
1488
+#define TX_URG_S 16
1489
+#define TX_URG_V(x) ((x) << TX_URG_S)
1490
+
14561491 #define TX_SHOVE_S 14
14571492 #define TX_SHOVE_V(x) ((x) << TX_SHOVE_S)
1493
+#define TX_SHOVE_F TX_SHOVE_V(1U)
1494
+
1495
+#define TX_BYPASS_S 21
1496
+#define TX_BYPASS_V(x) ((x) << TX_BYPASS_S)
1497
+#define TX_BYPASS_F TX_BYPASS_V(1U)
1498
+
1499
+#define TX_PUSH_S 22
1500
+#define TX_PUSH_V(x) ((x) << TX_PUSH_S)
1501
+#define TX_PUSH_F TX_PUSH_V(1U)
14581502
14591503 #define TX_ULP_MODE_S 10
14601504 #define TX_ULP_MODE_M 0x7
....@@ -1495,7 +1539,7 @@
14951539 __be32 cmd_nsge;
14961540 __be32 len0;
14971541 __be64 addr0;
1498
- struct ulptx_sge_pair sge[0];
1542
+ struct ulptx_sge_pair sge[];
14991543 };
15001544
15011545 struct ulptx_idata {