.. | .. |
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47 | 47 | CPL_CLOSE_LISTSRV_REQ = 0x9, |
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48 | 48 | CPL_ABORT_REQ = 0xA, |
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49 | 49 | CPL_ABORT_RPL = 0xB, |
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| 50 | + CPL_TX_DATA = 0xC, |
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50 | 51 | CPL_RX_DATA_ACK = 0xD, |
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51 | 52 | CPL_TX_PKT = 0xE, |
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52 | 53 | CPL_L2T_WRITE_REQ = 0x12, |
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.. | .. |
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56 | 57 | CPL_TX_DATA_ISO = 0x1F, |
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57 | 58 | |
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58 | 59 | CPL_CLOSE_LISTSRV_RPL = 0x20, |
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| 60 | + CPL_GET_TCB_RPL = 0x22, |
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59 | 61 | CPL_L2T_WRITE_RPL = 0x23, |
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60 | 62 | CPL_PASS_OPEN_RPL = 0x24, |
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61 | 63 | CPL_ACT_OPEN_RPL = 0x25, |
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.. | .. |
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688 | 690 | #define NO_REPLY_V(x) ((x) << NO_REPLY_S) |
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689 | 691 | #define NO_REPLY_F NO_REPLY_V(1U) |
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690 | 692 | |
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| 693 | +struct cpl_get_tcb_rpl { |
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| 694 | + union opcode_tid ot; |
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| 695 | + __u8 cookie; |
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| 696 | + __u8 status; |
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| 697 | + __be16 len; |
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| 698 | +}; |
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| 699 | + |
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691 | 700 | struct cpl_set_tcb_field { |
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692 | 701 | WR_HDR; |
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| 702 | + union opcode_tid ot; |
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| 703 | + __be16 reply_ctrl; |
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| 704 | + __be16 word_cookie; |
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| 705 | + __be64 mask; |
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| 706 | + __be64 val; |
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| 707 | +}; |
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| 708 | + |
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| 709 | +struct cpl_set_tcb_field_core { |
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693 | 710 | union opcode_tid ot; |
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694 | 711 | __be16 reply_ctrl; |
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695 | 712 | __be16 word_cookie; |
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.. | .. |
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1413 | 1430 | CPL_FW4_ACK_FLAGS_FLOWC = 0x4, /* fw_flowc_wr complete */ |
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1414 | 1431 | }; |
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1415 | 1432 | |
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| 1433 | +#define CPL_FW4_ACK_FLOWID_S 0 |
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| 1434 | +#define CPL_FW4_ACK_FLOWID_M 0xffffff |
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| 1435 | +#define CPL_FW4_ACK_FLOWID_G(x) \ |
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| 1436 | + (((x) >> CPL_FW4_ACK_FLOWID_S) & CPL_FW4_ACK_FLOWID_M) |
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| 1437 | + |
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1416 | 1438 | struct cpl_fw6_msg { |
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1417 | 1439 | u8 opcode; |
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1418 | 1440 | u8 type; |
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.. | .. |
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1449 | 1471 | #define TX_FORCE_S 13 |
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1450 | 1472 | #define TX_FORCE_V(x) ((x) << TX_FORCE_S) |
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1451 | 1473 | |
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| 1474 | +#define TX_DATA_MSS_S 16 |
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| 1475 | +#define TX_DATA_MSS_M 0xFFFF |
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| 1476 | +#define TX_DATA_MSS_V(x) ((x) << TX_DATA_MSS_S) |
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| 1477 | +#define TX_DATA_MSS_G(x) (((x) >> TX_DATA_MSS_S) & TX_DATA_MSS_M) |
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| 1478 | + |
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| 1479 | +#define TX_LENGTH_S 0 |
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| 1480 | +#define TX_LENGTH_M 0xFFFF |
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| 1481 | +#define TX_LENGTH_V(x) ((x) << TX_LENGTH_S) |
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| 1482 | +#define TX_LENGTH_G(x) (((x) >> TX_LENGTH_S) & TX_LENGTH_M) |
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| 1483 | + |
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1452 | 1484 | #define T6_TX_FORCE_S 20 |
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1453 | 1485 | #define T6_TX_FORCE_V(x) ((x) << T6_TX_FORCE_S) |
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1454 | 1486 | #define T6_TX_FORCE_F T6_TX_FORCE_V(1U) |
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1455 | 1487 | |
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| 1488 | +#define TX_URG_S 16 |
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| 1489 | +#define TX_URG_V(x) ((x) << TX_URG_S) |
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| 1490 | + |
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1456 | 1491 | #define TX_SHOVE_S 14 |
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1457 | 1492 | #define TX_SHOVE_V(x) ((x) << TX_SHOVE_S) |
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| 1493 | +#define TX_SHOVE_F TX_SHOVE_V(1U) |
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| 1494 | + |
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| 1495 | +#define TX_BYPASS_S 21 |
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| 1496 | +#define TX_BYPASS_V(x) ((x) << TX_BYPASS_S) |
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| 1497 | +#define TX_BYPASS_F TX_BYPASS_V(1U) |
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| 1498 | + |
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| 1499 | +#define TX_PUSH_S 22 |
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| 1500 | +#define TX_PUSH_V(x) ((x) << TX_PUSH_S) |
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| 1501 | +#define TX_PUSH_F TX_PUSH_V(1U) |
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1458 | 1502 | |
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1459 | 1503 | #define TX_ULP_MODE_S 10 |
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1460 | 1504 | #define TX_ULP_MODE_M 0x7 |
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.. | .. |
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1495 | 1539 | __be32 cmd_nsge; |
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1496 | 1540 | __be32 len0; |
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1497 | 1541 | __be64 addr0; |
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1498 | | - struct ulptx_sge_pair sge[0]; |
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| 1542 | + struct ulptx_sge_pair sge[]; |
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1499 | 1543 | }; |
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1500 | 1544 | |
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1501 | 1545 | struct ulptx_idata { |
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